source: rtems/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c @ b094233

4.104.115
Last change on this file since b094233 was b094233, checked in by Till Straumann <strauman@…>, on Sep 11, 2009 at 5:13:42 PM

2009-09-11 Till Straumann <strauman@…>

  • Makefile.am, preinstall.am, irq/no_pic.c (REMOVED), irq/irq.h, irq/irq_init.c: use openpic from 'shared' area instead of no_pic.
  • inlude/psim.h: use openpic from 'shared' area instead of no_pic. Added 'extern' declaration for (linker-script defined) RamBase? and RamSize? symbols. Let CPP macros expand to these symbols instead of static constants. Added register definitions for OpenPIC in the register area. Added register definitions for ethernet controller in the register area.
  • startup/linkcmds: Increased RamSize? to 16M. Increased 'RAM' memory region to 32M (there is really no disadvantage in making this large). Added comment explaining the inter-relation between RamSize?, the size of the memory region, the device-tree property "oea-memory-size" and the DBAT setting.
  • tools/psim-shared: Try to determine RamSize? from executable and set 'oea-memory-size' accordingly. May be overridden if 'RAM_SIZE' envvar is set. Added openpic to device-tree. Added ethernet controller to device-tree (commented because a PSIM patch is currently required to use this device).
  • startup/bspstart: Increase DBAT0 mapping to size of 32M.
  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 *  This set of routines starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before any of these are invoked.
6 *
7 *  COPYRIGHT (c) 1989-2008.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  $Id$
15 */
16
17#include <string.h>
18#include <fcntl.h>
19#include <bsp.h>
20#include <bsp/irq.h>
21#include <psim.h>
22#include <bsp/bootcard.h>
23#include <rtems/bspIo.h>
24#include <rtems/powerpc/powerpc.h>
25
26#include <libcpu/cpuIdent.h>
27#include <libcpu/bat.h>
28#include <libcpu/spr.h>
29
30SPR_RW(SPRG1)
31
32/*  On psim, each click of the decrementer register corresponds
33 *  to 1 instruction.  By setting this to 100, we are indicating
34 *  that we are assuming it can execute 100 instructions per
35 *  microsecond.  This corresponds to sustaining 1 instruction
36 *  per cycle at 100 Mhz.  Whether this is a good guess or not
37 *  is anyone's guess.
38 */
39extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
40
41/*
42 * PCI Bus Frequency
43 */
44unsigned int BSP_bus_frequency;
45
46/*
47 *  Driver configuration parameters
48 */
49uint32_t   bsp_clicks_per_usec;
50
51/*
52 * Memory on this board.
53 */
54uint32_t BSP_mem_size = (uint32_t)RamSize;
55
56/*
57 * Time base divisior (how many tick for 1 second).
58 */
59unsigned int BSP_time_base_divisor;
60
61void BSP_panic(char *s)
62{
63  printk("%s PANIC %s\n",_RTEMS_version, s);
64  __asm__ __volatile ("sc");
65}
66
67void _BSP_Fatal_error(unsigned int v)
68{
69  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
70  __asm__ __volatile ("sc");
71}
72
73/*
74 *  bsp_start
75 *
76 *  This routine does the bulk of the system initialization.
77 */
78
79void bsp_start( void )
80{
81  extern unsigned long __rtems_end[];
82  uint32_t intrStackStart;
83  uint32_t intrStackSize;
84
85  /*
86   * Note we can not get CPU identification dynamically, so
87   * force current_ppc_cpu.
88   */
89  current_ppc_cpu = PPC_PSIM;
90
91  /*
92   *  initialize the device driver parameters
93   */
94  BSP_bus_frequency        = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND;
95  bsp_clicks_per_usec      = BSP_bus_frequency;
96  BSP_time_base_divisor    = 1;
97
98  /*
99   *  The simulator likes the exception table to be at 0xfff00000.
100   */
101  bsp_exceptions_in_RAM = FALSE;
102
103  /*
104   * Initialize the interrupt related settings.
105   */
106  intrStackStart = (uint32_t) __rtems_end;
107  intrStackSize = rtems_configuration_get_interrupt_stack_size();
108
109  BSP_mem_size = RamSize;
110
111  /*
112   * Initialize default raw exception handlers.
113   */
114  ppc_exc_initialize(
115    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
116    intrStackStart,
117    intrStackSize
118  );
119
120  /*
121   * Initalize RTEMS IRQ system
122   */
123  BSP_rtems_irq_mng_init(0);
124
125  /*
126   * Setup BATs and enable MMU
127   */
128  /* Memory */
129  setdbat(0, 0x0<<24, 0x0<<24, 2<<24, _PAGE_RW);
130  setibat(0, 0x0<<24, 0x0<<24, 2<<24,        0);
131  /* PCI    */
132  setdbat(1, 0x8<<24, 0x8<<24, 1<<24,  IO_PAGE);
133  setdbat(2, 0xc<<24, 0xc<<24, 1<<24,  IO_PAGE);
134
135  _write_MSR(_read_MSR() | MSR_DR | MSR_IR);
136  asm volatile("sync; isync");
137}
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