source: rtems/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c @ 77f842d

4.104.115
Last change on this file since 77f842d was 77f842d, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 28, 2009 at 6:21:20 PM

2009-08-28 Joel Sherrill <joel.sherrill@…>

  • startup/bspstart.c: Spacing.
  • Property mode set to 100644
File size: 3.1 KB
Line 
1/*
2 *  This set of routines starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before any of these are invoked.
6 *
7 *  COPYRIGHT (c) 1989-2008.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  $Id$
15 */
16
17#include <string.h>
18#include <fcntl.h>
19#include <bsp.h>
20#include <bsp/irq.h>
21#include <bsp/bootcard.h>
22#include <rtems/bspIo.h>
23#include <rtems/powerpc/powerpc.h>
24
25#include <libcpu/cpuIdent.h>
26#include <libcpu/bat.h>
27#include <libcpu/spr.h>
28
29SPR_RW(SPRG1)
30
31/*  On psim, each click of the decrementer register corresponds
32 *  to 1 instruction.  By setting this to 100, we are indicating
33 *  that we are assuming it can execute 100 instructions per
34 *  microsecond.  This corresponds to sustaining 1 instruction
35 *  per cycle at 100 Mhz.  Whether this is a good guess or not
36 *  is anyone's guess.
37 */
38extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
39
40/*
41 * PCI Bus Frequency
42 */
43unsigned int BSP_bus_frequency;
44
45/*
46 *  Driver configuration parameters
47 */
48uint32_t   bsp_clicks_per_usec;
49
50/*
51 * Memory on this board.
52 */
53extern char RamSize[];
54uint32_t BSP_mem_size;
55
56/*
57 * Time base divisior (how many tick for 1 second).
58 */
59unsigned int BSP_time_base_divisor;
60
61void BSP_panic(char *s)
62{
63  printk("%s PANIC %s\n",_RTEMS_version, s);
64  __asm__ __volatile ("sc");
65}
66
67void _BSP_Fatal_error(unsigned int v)
68{
69  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
70  __asm__ __volatile ("sc");
71}
72
73/*
74 *  bsp_start
75 *
76 *  This routine does the bulk of the system initialization.
77 */
78
79void bsp_start( void )
80{
81  extern unsigned long __rtems_end[];
82  uint32_t intrStackStart;
83  uint32_t intrStackSize;
84
85  /*
86   * Note we can not get CPU identification dynamically, so
87   * force current_ppc_cpu.
88   */
89  current_ppc_cpu = PPC_PSIM;
90
91  /*
92   *  initialize the device driver parameters
93   */
94  BSP_bus_frequency        = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND;
95  bsp_clicks_per_usec      = BSP_bus_frequency;
96  BSP_time_base_divisor    = 1;
97
98  /*
99   *  The simulator likes the exception table to be at 0xfff00000.
100   */
101  bsp_exceptions_in_RAM = FALSE;
102
103  /*
104   * Initialize the interrupt related settings.
105   */
106  intrStackStart = (uint32_t) __rtems_end;
107  intrStackSize = rtems_configuration_get_interrupt_stack_size();
108
109  BSP_mem_size = RamSize;
110
111  /*
112   * Initialize default raw exception handlers.
113   */
114  ppc_exc_initialize(
115    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
116    intrStackStart,
117    intrStackSize
118  );
119
120  /*
121   * Initalize RTEMS IRQ system
122   */
123  BSP_rtems_irq_mng_init(0);
124
125  /*
126   * Setup BATs and enable MMU
127   */
128  /* Memory */
129  setdbat(0, 0x0<<24, 0x0<<24, 1<<24, _PAGE_RW);
130  setibat(0, 0x0<<24, 0x0<<24, 1<<24,        0);
131  /* PCI    */
132  setdbat(1, 0x8<<24, 0x8<<24, 1<<24,  IO_PAGE);
133  setdbat(2, 0xc<<24, 0xc<<24, 1<<24,  IO_PAGE);
134
135  _write_MSR(_read_MSR() | MSR_DR | MSR_IR);
136  asm volatile("sync; isync");
137}
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