1 | /* |
---|
2 | * This set of routines starts the application. It includes application, |
---|
3 | * board, and monitor specific initialization and configuration. |
---|
4 | * The generic CPU dependent initialization has been performed |
---|
5 | * before any of these are invoked. |
---|
6 | * |
---|
7 | * COPYRIGHT (c) 1989-2007. |
---|
8 | * On-Line Applications Research Corporation (OAR). |
---|
9 | * |
---|
10 | * The license and distribution terms for this file may be |
---|
11 | * found in the file LICENSE in this distribution or at |
---|
12 | * http://www.rtems.com/license/LICENSE. |
---|
13 | * |
---|
14 | * $Id$ |
---|
15 | */ |
---|
16 | |
---|
17 | #include <string.h> |
---|
18 | #include <fcntl.h> |
---|
19 | #include <bsp.h> |
---|
20 | #include <bsp/irq.h> |
---|
21 | #include <rtems/libio.h> |
---|
22 | #include <rtems/libcsupport.h> |
---|
23 | #include <rtems/bspIo.h> |
---|
24 | #include <rtems/powerpc/powerpc.h> |
---|
25 | |
---|
26 | #include <libcpu/cpuIdent.h> |
---|
27 | #include <libcpu/bat.h> |
---|
28 | #include <libcpu/spr.h> |
---|
29 | |
---|
30 | SPR_RW(SPRG0) |
---|
31 | SPR_RW(SPRG1) |
---|
32 | |
---|
33 | extern unsigned long __rtems_end[]; |
---|
34 | |
---|
35 | void initialize_exceptions(void); |
---|
36 | |
---|
37 | /* On psim, each click of the decrementer register corresponds |
---|
38 | * to 1 instruction. By setting this to 100, we are indicating |
---|
39 | * that we are assuming it can execute 100 instructions per |
---|
40 | * microsecond. This corresponds to sustaining 1 instruction |
---|
41 | * per cycle at 100 Mhz. Whether this is a good guess or not |
---|
42 | * is anyone's guess. |
---|
43 | */ |
---|
44 | |
---|
45 | extern int PSIM_INSTRUCTIONS_PER_MICROSECOND; |
---|
46 | |
---|
47 | /* |
---|
48 | * PCI Bus Frequency |
---|
49 | */ |
---|
50 | unsigned int BSP_bus_frequency; |
---|
51 | |
---|
52 | /* |
---|
53 | * Time base divisior (how many tick for 1 second). |
---|
54 | */ |
---|
55 | unsigned int BSP_time_base_divisor; |
---|
56 | |
---|
57 | /* |
---|
58 | * Use the shared implementations of the following routines |
---|
59 | */ |
---|
60 | |
---|
61 | void bsp_libc_init( void *, uint32_t, int ); |
---|
62 | |
---|
63 | /* |
---|
64 | * system init stack |
---|
65 | */ |
---|
66 | #define INIT_STACK_SIZE 0x1000 |
---|
67 | |
---|
68 | void BSP_panic(char *s) |
---|
69 | { |
---|
70 | printk("%s PANIC %s\n",_RTEMS_version, s); |
---|
71 | __asm__ __volatile ("sc"); |
---|
72 | } |
---|
73 | |
---|
74 | void _BSP_Fatal_error(unsigned int v) |
---|
75 | { |
---|
76 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
---|
77 | __asm__ __volatile ("sc"); |
---|
78 | } |
---|
79 | |
---|
80 | /* |
---|
81 | * bsp_pretasking_hook |
---|
82 | * |
---|
83 | * BSP pretasking hook. Called just before drivers are initialized. |
---|
84 | * Used to setup libc and install any BSP extensions. |
---|
85 | */ |
---|
86 | |
---|
87 | void bsp_pretasking_hook(void) |
---|
88 | { |
---|
89 | extern int end; |
---|
90 | uint32_t heap_start; |
---|
91 | uint32_t heap_size; |
---|
92 | |
---|
93 | heap_start = (uint32_t) &end; |
---|
94 | if (heap_start & (CPU_ALIGNMENT-1)) |
---|
95 | heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); |
---|
96 | |
---|
97 | heap_size = Configuration.work_space_start - (void *)&end; |
---|
98 | heap_size &= 0xfffffff0; /* keep it as a multiple of 16 bytes */ |
---|
99 | |
---|
100 | bsp_libc_init((void *) heap_start, heap_size, 0); |
---|
101 | |
---|
102 | #ifdef RTEMS_DEBUG |
---|
103 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
---|
104 | #endif |
---|
105 | } |
---|
106 | |
---|
107 | /* |
---|
108 | * bsp_start |
---|
109 | * |
---|
110 | * This routine does the bulk of the system initialization. |
---|
111 | */ |
---|
112 | |
---|
113 | void bsp_start( void ) |
---|
114 | { |
---|
115 | unsigned char *work_space_start; |
---|
116 | register uint32_t intrStack; |
---|
117 | register uint32_t *intrStackPtr; |
---|
118 | |
---|
119 | /* |
---|
120 | * Note we can not get CPU identification dynamically, so |
---|
121 | * force current_ppc_cpu. |
---|
122 | */ |
---|
123 | current_ppc_cpu = PPC_PSIM; |
---|
124 | |
---|
125 | /* |
---|
126 | * initialize the device driver parameters |
---|
127 | */ |
---|
128 | BSP_bus_frequency = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND; |
---|
129 | BSP_time_base_divisor = 1; |
---|
130 | |
---|
131 | /* |
---|
132 | * The simulator likes the exception table to be at 0xfff00000. |
---|
133 | */ |
---|
134 | |
---|
135 | bsp_exceptions_in_RAM = FALSE; |
---|
136 | |
---|
137 | rtems_configuration_get_work_space_size() += 1024; |
---|
138 | |
---|
139 | work_space_start = |
---|
140 | (unsigned char *)&RAM_END - rtems_configuration_get_work_space_size(); |
---|
141 | |
---|
142 | if ( work_space_start <= (unsigned char *)&end ) { |
---|
143 | printk( "bspstart: Not enough RAM!!!\n" ); |
---|
144 | bsp_cleanup(); |
---|
145 | } |
---|
146 | |
---|
147 | Configuration.work_space_start = work_space_start; |
---|
148 | #if (BSP_DIRTY_MEMORY == 1) |
---|
149 | { |
---|
150 | memset(&end, 0xCF, (unsigned char *)&RAM_END - (unsigned char *)&end ); |
---|
151 | } |
---|
152 | #endif |
---|
153 | |
---|
154 | /* |
---|
155 | * Initialize the interrupt related settings |
---|
156 | * SPRG1 = software managed IRQ stack |
---|
157 | * |
---|
158 | * This could be done latter (e.g in IRQ_INIT) but it helps to understand |
---|
159 | * some settings below... |
---|
160 | */ |
---|
161 | intrStack = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + |
---|
162 | rtems_configuration_get_interrupt_stack_size() - |
---|
163 | PPC_MINIMUM_STACK_FRAME_SIZE; |
---|
164 | |
---|
165 | /* make sure it's properly aligned */ |
---|
166 | intrStack &= ~(CPU_STACK_ALIGNMENT-1); |
---|
167 | |
---|
168 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
---|
169 | intrStackPtr = (uint32_t*) intrStack; |
---|
170 | *intrStackPtr = 0; |
---|
171 | |
---|
172 | _write_SPRG1(intrStack); |
---|
173 | |
---|
174 | /* signal them that we have fixed PR288 - eventually, this should go away */ |
---|
175 | _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); |
---|
176 | |
---|
177 | /* |
---|
178 | * Initialize default raw exception handlers. See vectors/vectors_init.c |
---|
179 | */ |
---|
180 | initialize_exceptions(); |
---|
181 | |
---|
182 | /* |
---|
183 | * Initalize RTEMS IRQ system |
---|
184 | */ |
---|
185 | BSP_rtems_irq_mng_init(0); |
---|
186 | |
---|
187 | /* |
---|
188 | * Setup BATs and enable MMU |
---|
189 | */ |
---|
190 | /* Memory */ |
---|
191 | setdbat(0, 0x0<<24, 0x0<<24, 1<<24, _PAGE_RW); |
---|
192 | setibat(0, 0x0<<24, 0x0<<24, 1<<24, 0); |
---|
193 | /* PCI */ |
---|
194 | setdbat(1, 0x8<<24, 0x8<<24, 1<<24, IO_PAGE); |
---|
195 | setdbat(2, 0xc<<24, 0xc<<24, 1<<24, IO_PAGE); |
---|
196 | |
---|
197 | _write_MSR(_read_MSR() | MSR_DR | MSR_IR); |
---|
198 | asm volatile("sync; isync"); |
---|
199 | |
---|
200 | } |
---|