source: rtems/c/src/lib/libbsp/powerpc/psim/irq/irq.h @ 6ef01b4

4.104.114.84.95
Last change on this file since 6ef01b4 was 6ef01b4, checked in by Jennifer Averett <Jennifer.Averett@…>, on 04/15/05 at 18:13:36

2005-04-15 Jennifer Averett <jennifer.averett@…>

PR 779/bsp

  • irq/irq.c, irq/irq.h, irq/irq_init.c: add parameter to new exception interrupt handlers in powerpc bsps
  • Property mode set to 100644
File size: 11.4 KB
Line 
1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to write interrupt handlers.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  irq.h,v 1.2.4.2 2003/09/04 18:45:20 joel Exp
19 */
20
21#ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
22#define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
23
24
25/*
26 * 8259 edge/level control definitions at VIA
27 */
28#define ISA8259_M_ELCR          0x4d0
29#define ISA8259_S_ELCR          0x4d1
30
31#define ELCRS_INT15_LVL         0x80
32#define ELCRS_INT14_LVL         0x40
33#define ELCRS_INT13_LVL         0x20
34#define ELCRS_INT12_LVL         0x10
35#define ELCRS_INT11_LVL         0x08
36#define ELCRS_INT10_LVL         0x04
37#define ELCRS_INT9_LVL          0x02
38#define ELCRS_INT8_LVL          0x01
39#define ELCRM_INT7_LVL          0x80
40#define ELCRM_INT6_LVL          0x40
41#define ELCRM_INT5_LVL          0x20
42#define ELCRM_INT4_LVL          0x10
43#define ELCRM_INT3_LVL          0x8
44#define ELCRM_INT2_LVL          0x4
45#define ELCRM_INT1_LVL          0x2
46#define ELCRM_INT0_LVL          0x1
47
48#define BSP_ASM_IRQ_VECTOR_BASE 0x0
49    /* PIC's command and mask registers */
50#define PIC_MASTER_COMMAND_IO_PORT              0x20    /* Master PIC command register */
51#define PIC_SLAVE_COMMAND_IO_PORT               0xa0    /* Slave PIC command register */
52#define PIC_MASTER_IMR_IO_PORT                  0x21    /* Master PIC Interrupt Mask Register */
53#define PIC_SLAVE_IMR_IO_PORT                   0xa1    /* Slave PIC Interrupt Mask Register */
54
55    /* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
56#define PIC_EOSI        0x60    /* End of Specific Interrupt (EOSI) */
57#define SLAVE_PIC_EOSI  0x62    /* End of Specific Interrupt (EOSI) for cascade */
58#define PIC_EOI         0x20    /* Generic End of Interrupt (EOI) */
59
60#ifndef ASM
61
62
63/*
64 * Symblolic IRQ names and related definitions.
65 */
66
67typedef enum {
68  /* Base vector for our ISA IRQ handlers. */
69  BSP_ISA_IRQ_VECTOR_BASE       =       BSP_ASM_IRQ_VECTOR_BASE,
70  /*
71   * ISA IRQ handler related definitions
72   */
73  BSP_ISA_IRQ_NUMBER            =       16,
74  BSP_ISA_IRQ_LOWEST_OFFSET     =       0,
75  BSP_ISA_IRQ_MAX_OFFSET        =       BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
76  /*
77   * PCI IRQ handlers related definitions
78   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
79   */
80  BSP_PCI_IRQ_NUMBER            =       16,
81  BSP_PCI_IRQ_LOWEST_OFFSET     =       BSP_ISA_IRQ_NUMBER,
82  BSP_PCI_IRQ_MAX_OFFSET        =       BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
83  /*
84   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
85   * handler might be connected
86   */
87  BSP_PROCESSOR_IRQ_NUMBER      =       1,
88  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_PCI_IRQ_MAX_OFFSET + 1,
89  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
90  /* Misc vectors for OPENPIC irqs (IPI, timers)
91   */
92  BSP_MISC_IRQ_NUMBER           =       8,
93  BSP_MISC_IRQ_LOWEST_OFFSET    =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
94  BSP_MISC_IRQ_MAX_OFFSET       =       BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
95  /*
96   * Summary
97   */
98  BSP_IRQ_NUMBER                =       BSP_MISC_IRQ_MAX_OFFSET + 1,
99  BSP_LOWEST_OFFSET             =       BSP_ISA_IRQ_LOWEST_OFFSET,
100  BSP_MAX_OFFSET                =       BSP_MISC_IRQ_MAX_OFFSET,
101    /*
102     * Some ISA IRQ symbolic name definition
103     */       
104  BSP_ISA_PERIODIC_TIMER        =       0,
105
106  BSP_ISA_KEYBOARD              =       1,
107
108  BSP_ISA_UART_COM2_IRQ         =       3,
109
110  BSP_ISA_UART_COM1_IRQ         =       4,
111
112  BSP_ISA_RT_TIMER1             =       8,
113 
114  BSP_ISA_RT_TIMER3             =       10,
115    /*
116     * Some PCI IRQ symbolic name definition
117     */
118  BSP_PCI_IRQ0                  =       BSP_PCI_IRQ_LOWEST_OFFSET,
119  BSP_PCI_ISA_BRIDGE_IRQ        =       BSP_PCI_IRQ0,
120    /*
121     * Some Processor execption handled as rtems IRQ symbolic name definition
122     */
123  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
124 
125}rtems_irq_symbolic_name;
126
127   
128
129
130/*
131 * Type definition for RTEMS managed interrupts
132 */
133typedef unsigned char  rtems_irq_prio;
134typedef unsigned short rtems_i8259_masks;
135
136extern  volatile rtems_i8259_masks i8259s_cache;
137
138struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
139
140typedef void *rtems_irq_hdl_param;
141typedef void (*rtems_irq_hdl)           (rtems_irq_hdl_param);
142typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
143typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
144typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
145
146typedef struct __rtems_irq_connect_data__ {
147      /*
148       * IRQ line
149       */
150      rtems_irq_symbolic_name   name;
151      /*
152       * handler. See comment on handler properties below in function prototype.
153       */
154      rtems_irq_hdl                     hdl;
155     /*
156      * Handler handle to store private data
157      */
158      rtems_irq_hdl_param               handle;
159      /*
160       * function for enabling interrupts at device level (ONLY!).
161       * The BSP code will automatically enable it at i8259s level and openpic level.
162       * RATIONALE : anyway such code has to exist in current driver code.
163       * It is usually called immediately AFTER connecting the interrupt handler.
164       * RTEMS may well need such a function when restoring normal interrupt
165       * processing after a debug session.
166       *
167       */
168      rtems_irq_enable          on;     
169      /*
170       * function for disabling interrupts at device level (ONLY!).
171       * The code will disable it at i8259s level. RATIONALE : anyway
172       * such code has to exist for clean shutdown. It is usually called
173       * BEFORE disconnecting the interrupt. RTEMS may well need such
174       * a function when disabling normal interrupt processing for
175       * a debug session. May well be a NOP function.
176       */
177      rtems_irq_disable         off;
178      /*
179       * function enabling to know what interrupt may currently occur
180       * if someone manipulates the i8259s interrupt mask without care...
181       */
182      rtems_irq_is_enabled      isOn;
183      /*
184       *  Set to -1 for vectors forced to have only 1 handler
185       */
186      void *next_handler;
187
188}rtems_irq_connect_data;
189
190typedef struct {
191  /*
192   * size of all the table fields (*Tbl) described below.
193   */
194  unsigned int                  irqNb;
195  /*
196   * Default handler used when disconnecting interrupts.
197   */
198  rtems_irq_connect_data        defaultEntry;
199  /*
200   * Table containing initials/current value.
201   */
202  rtems_irq_connect_data*       irqHdlTbl;
203  /*
204   * actual value of BSP_ISA_IRQ_VECTOR_BASE...
205   */
206  rtems_irq_symbolic_name       irqBase;
207  /*
208   * software priorities associated with interrupts.
209   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
210   * interrupt handler hdl connected for interrupt name i
211   * will  not be interrupted by the handler connected for interrupt j
212   * The interrupt source  will be physically masked at i8259 level.
213   */
214    rtems_irq_prio*             irqPrioTbl;
215}rtems_irq_global_settings;
216
217
218
219
220/*-------------------------------------------------------------------------+
221| Function Prototypes.
222+--------------------------------------------------------------------------*/
223/*
224 * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
225 */
226
227/*
228 * function to disable a particular irq at 8259 level. After calling
229 * this function, even if the device asserts the interrupt line it will
230 * not be propagated further to the processor
231 */
232int BSP_irq_disable_at_i8259s        (const rtems_irq_symbolic_name irqLine);
233/*
234 * function to enable a particular irq at 8259 level. After calling
235 * this function, if the device asserts the interrupt line it will
236 * be propagated further to the processor
237 */
238int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
239/*
240 * function to acknoledge a particular irq at 8259 level. After calling
241 * this function, if a device asserts an enabled interrupt line it will
242 * be propagated further to the processor. Mainly usefull for people
243 * writting raw handlers as this is automagically done for rtems managed
244 * handlers.
245 */
246int BSP_irq_ack_at_i8259s               (const rtems_irq_symbolic_name irqLine);
247/*
248 * function to check if a particular irq is enabled at 8259 level. After calling
249 */
250int BSP_irq_enabled_at_i8259s           (const rtems_irq_symbolic_name irqLine);
251/*
252 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
253 */
254/*
255 * function to connect a particular irq handler. This hanlder will NOT be called
256 * directly as the result of the corresponding interrupt. Instead, a RTEMS
257 * irq prologue will be called that will :
258 *
259 *      1) save the C scratch registers,
260 *      2) switch to a interrupt stack if the interrupt is not nested,
261 *      3) store the current i8259s' interrupt masks
262 *      4) modify them to disable the current interrupt at 8259 level (and may
263 *      be others depending on software priorities)
264 *      5) aknowledge the i8259s',
265 *      6) demask the processor,
266 *      7) call the application handler
267 *
268 * As a result the hdl function provided
269 *
270 *      a) can perfectly be written is C,
271 *      b) may also well directly call the part of the RTEMS API that can be used
272 *      from interrupt level,
273 *      c) It only responsible for handling the jobs that need to be done at
274 *      the device level including (aknowledging/re-enabling the interrupt at device,
275 *      level, getting the data,...)
276 *
277 *      When returning from the function, the following will be performed by
278 *      the RTEMS irq epilogue :
279 *
280 *      1) masks the interrupts again,
281 *      2) restore the original i8259s' interrupt masks
282 *      3) switch back on the orinal stack if needed,
283 *      4) perform rescheduling when necessary,
284 *      5) restore the C scratch registers...
285 *      6) restore initial execution flow
286 *
287 */
288int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
289int BSP_install_rtems_shared_irq_handler  (const rtems_irq_connect_data*);
290
291#define BSP_SHARED_HANDLER_SUPPORT      1
292
293/*
294 * function to get the current RTEMS irq handler for ptr->name. It enables to
295 * define hanlder chain...
296 */
297int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
298/*
299 * function to get disconnect the RTEMS irq handler for ptr->name.
300 * This function checks that the value given is the current one for safety reason.
301 * The user can use the previous function to get it.
302 */
303int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
304
305/*
306 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
307 */
308/*
309 * (Re) Initialize the RTEMS interrupt management.
310 *
311 * The result of calling this function will be the same as if each individual
312 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
313 * has been individualy connected via
314 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
315 * And each handler currently equal to config->defaultEntry.hdl
316 * has been previously disconnected via
317 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
318 *
319 * This is to say that all information given will be used and not just
320 * only the space.
321 *
322 * CAUTION : the various table address contained in config will be used
323 *           directly by the interrupt mangement code in order to save
324 *           data size so they must stay valid after the call => they should
325 *           not be modified or declared on a stack.
326 */
327
328int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
329/*
330 * (Re) get info on current RTEMS interrupt management.
331 */
332int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
333 
334extern void BSP_rtems_irq_mng_init(unsigned cpuId);
335extern void BSP_i8259s_init(void);
336#endif
337
338#endif
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