Context Navigation

flashentry.s @ 7593d56c

4.104.114.84.95

Last change on this file since 7593d56c was eb5a7e07, checked in by Joel Sherrill <joel.sherrill@…>, on 10/06/95 at 20:48:38
fixed missing CVS IDs
Property mode set to `100644`
File size: 8.2 KB

Line
1	/* dlentry.s 1.0 - 95/08/08
2	*
3	* This file contains the entry veneer for RTEMS programs
4	* stored in Papyrus' flash ROM.
5	*
6	* Author: Andrew Bray <andy@i-cubed.demon.co.uk>
7	*
8	* COPYRIGHT (c) 1995 by i-cubed ltd.
9	*
10	* To anyone who acknowledges that this file is provided "AS IS"
11	* without any express or implied warranty:
12	* permission to use, copy, modify, and distribute this file
13	* for any purpose is hereby granted without fee, provided that
14	* the above copyright notice and this notice appears in all
15	* copies, and that the name of i-cubed limited not be used in
16	* advertising or publicity pertaining to distribution of the
17	* software without specific, written prior permission.
18	* i-cubed limited makes no representations about the suitability
19	* of this software for any purpose.
20	*
21	* $Id$
22	*/
23
24	#include "asm.h"
25
26	/*
27	* The Papyrus ELF link scripts support three special sections:
28	* .entry The actual entry point, this must contain less
29	* than 256 bytes of code/data to fit below the
30	* .vectors section. This always preceeds any other
31	* code or data.
32	* .vectors The section containing the interrupt entry veneers.
33	* .entry2 Any code overflowing from .entry
34	* .descriptors The PowerOpen function indirection blocks.
35	*/
36
37	/*
38	* Flash sections are linked in the following order:
39	* .entry
40	* .vectors
41	* .entry2
42	* .text
43	* .descriptors
44	* .data
45	* .bss
46	* usually starting from 0xFFF00000.
47	*
48	* The initial stack is set to run BELOW the final location of
49	* the initialised data.
50	*
51	* All the entry veneer has to do is to copy the initialised data
52	* to its final location and clear the BSS.
53	*/
54
55	/*
56	* GDB likes to have debugging information for the entry veneer.
57	* Here is some DWARF information.
58	*/
59
60	#if PPC_ASM == PPC_ASM_ELF
61	.section .entry,"ax",@progbits
62	.L_text_b:
63	.L_LC1:
64	.previous
65
66	.section .debug_sfnames
67	.L_sfnames_b:
68	.byte "/home/andy/powerpc/rtems-3.2.0/c/src/lib/libcpu/ppc/ppc403/flashentry/"
69	.byte 0
70	.L_F0:
71	.byte "flashentry.s"
72	.byte 0
73	.previous
74
75	.section .line
76	.L_line_b:
77	.4byte .L_line_e-.L_line_b
78	.4byte .L_text_b
79	.L_LE1:
80	.L_line_last:
81	.4byte 0x0
82	.2byte 0xffff
83	.4byte .L_text_e-.L_text_b
84	.L_line_e:
85	.previous
86
87	.section .debug_srcinfo
88	.L_srcinfo_b:
89	.4byte .L_line_b
90	.4byte .L_sfnames_b
91	.4byte .L_text_b
92	.4byte .L_text_e
93	.4byte 0xffffffff
94	.4byte .L_LE1-.L_line_b
95	.4byte .L_F0-.L_sfnames_b
96	.4byte .L_line_last-.L_line_b
97	.4byte 0xffffffff
98	.previous
99
100	.section .debug_pubnames
101	.4byte .L_debug_b
102	.4byte .L_P0
103	.byte "flash_entry"
104	.byte 0
105	.4byte 0x0
106	.byte 0
107	.previous
108
109	.section .debug_aranges
110	.4byte .L_debug_b
111	.4byte .L_text_b
112	.4byte .L_text_e-.L_text_b
113	.4byte 0
114	.4byte 0
115	.4byte 0
116	.4byte 0
117	.4byte 0
118	.4byte 0
119	.4byte 0x0
120	.4byte 0x0
121	.previous
122
123	.section .debug
124	.L_debug_b:
125	.L_D1:
126	.4byte .L_D1_e-.L_D1
127	.2byte 0x11 /* TAG_compile_unit */
128	.2byte 0x12 /* AT_sibling */
129	.4byte .L_D2
130	.2byte 0x38 /* AT_name */
131	.byte "flashentry.s"
132	.byte 0
133	.2byte 0x258 /* AT_producer */
134	.byte "GAS 2.5.2"
135	.byte 0
136	.2byte 0x111 /* AT_low_pc */
137	.4byte .L_text_b
138	.2byte 0x121 /* AT_high_pc */
139	.4byte .L_text_e
140	.2byte 0x106 /* AT_stmt_list */
141	.4byte .L_line_b
142	.2byte 0x1b8 /* AT_comp_dir */
143	.byte "/home/andy/powerpc/rtems-3.2.0/c/src/lib/libcpu/ppc/ppc403/dlentry/"
144	.byte 0
145	.2byte 0x8006 /* AT_sf_names */
146	.4byte .L_sfnames_b
147	.2byte 0x8016 /* AT_src_info */
148	.4byte .L_srcinfo_b
149	.L_D1_e:
150	.L_P0:
151	.L_D3:
152	.4byte .L_D3_e-.L_D3
153	.2byte 0x6 /* TAG_global_subroutine */
154	.2byte 0x12 /* AT_sibling */
155	.4byte .L_D4
156	.2byte 0x38 /* AT_name */
157	.byte "flash_entry"
158	.byte 0
159	.2byte 0x278 /* AT_prototyped */
160	.byte 0
161	.2byte 0x111 /* AT_low_pc */
162	.4byte .L_text_b
163	.2byte 0x121 /* AT_high_pc */
164	.4byte .L_text_e
165	.2byte 0x8041 /* AT_body_begin */
166	.4byte .L_text_b
167	.2byte 0x8051 /* AT_body_end */
168	.4byte .L_text_e
169	.L_D3_e:
170
171	.L_D4:
172	.4byte .L_D4_e-.L_D4
173	.align 2
174	.L_D4_e:
175	.L_D2:
176	.previous
177	#endif
178
179	/*-------------------------------------------------------------------------------
180	* ROM Vector area.
181	------------------------------------------------------------------------------/
182	#if PPC_ASM == PPC_ASM_ELF
183	.section .entry
184	#else
185	.csect .text[PR]
186	#endif
187	PUBLIC_VAR (flash_entry)
188	SYM (flash_entry):
189	bl .startup
190	base_addr:
191
192	/*-------------------------------------------------------------------------------
193	* Parameters from linker
194	------------------------------------------------------------------------------/
195	toc_pointer:
196	#if PPC_ASM == PPC_ASM_ELF
197	.long s.got
198	#else
199	.long TOC[tc0]
200	#endif
201	text_length:
202	.long t.size
203	text_addr:
204	.long t.start
205	data_length:
206	.long copy.size
207	data_addr:
208	.long copy.dest
209	bss_length:
210	.long bss.size
211	bss_addr:
212	.long bss.start
213
214	/*-------------------------------------------------------------------------------
215	* Reset_entry.
216	------------------------------------------------------------------------------/
217	.startup:
218	/* Get start address */
219	mflr r1
220
221	/* Assume Bank regs set up..., cache etc. */
222
223	/*-----------------------------------------------------------------------
224	* Check the DRAM where STACK+ DATA+ BBS will be placed. If this is OK
225	* we will return here.
226	----------------------------------------------------------------------/
227	bl rom2ram
228	/*-----------------------------------------------------------------------
229	* Enable two 128MB cachable regions.
230	----------------------------------------------------------------------/
231	addis r2,r0,0x8000
232	addi r2,r2,0x0001
233	mticcr r2
234	mtdccr r2
235	/*-----------------------------------------------------------------------
236	* C_setup.
237	----------------------------------------------------------------------/
238	lwz r2,toc_pointer-base_addr(r1) /* set r2 to toc */
239	lwz r1,data_addr-base_addr(r1) /* set r1 to data_addr */
240	addi r1,r1,-56 /* start stack at data_addr - 56 */
241	addi r3,r0,0x0 /* clear r3 */
242	stw r3, 0(r1) /* Clear stack chain */
243	stw r3, 4(r1)
244	stw r3, 8(r1)
245	stw r3, 12(r1)
246	.extern .main
247	b .main /* call the first C routine */
248
249	/*-------------------------------------------------------------------------------
250	* Rom2ram.
251	------------------------------------------------------------------------------/
252	rom2ram:
253	lwz r2,data_addr-base_addr(r1) /* start of data set by loader */
254	lwz r3,data_length-base_addr(r1) /* data length */
255	rlwinm r3,r3,30,0x3FFFFFFF /* form length/4 */
256	mtctr r3 /* set ctr reg */
257	/*-----------------------------------------------------------------------
258	* Calculate offset of data in image.
259	----------------------------------------------------------------------/
260	lwz r5,text_length-base_addr(r1) /* get text length */
261	lwz r4,text_addr-base_addr(r1) /* get text length */
262	add r4,r4,r5 /* r4 = data pointer */
263	move_data:
264	lswi r6,r4,0x4 /* load r6 */
265	stswi r6,r2,0x4 /* store r6 */
266	addi r4,r4,0x4 /* update r4 */
267	addi r2,r2,0x4 /* update r2 */
268	bdnz move_data /* decrement counter and loop */
269	/*-----------------------------------------------------------------------
270	* Data move finished, zero out bss.
271	----------------------------------------------------------------------/
272	lwz r2,bss_addr-base_addr(r1) /* start of bss set by loader */
273	lwz r3,bss_length-base_addr(r1) /* bss length */
274	rlwinm. r3,r3,30,0x3FFFFFFF /* form length/4 */
275	beqlr /* no bss */
276	mtctr r3 /* set ctr reg */
277	xor r6,r6,r6 /* r6 = 0 */
278	clear_bss:
279	stswi r6,r2,0x4 /* store r6 */
280	addi r3,r2,0x4 /* update r2 */
281	bdnz clear_bss /* decrement counter and loop */
282	blr /* return */
283	.L_text_e:
284
285	#if PPC_ABI == PPC_ABI_POWEROPEN
286	DESCRIPTOR (startup)
287	#endif

Note: See TracBrowser for help on using the repository browser.

Download in other formats:

Original Format