1 | /* dlentry.s 1.0 - 95/08/08 |
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2 | * |
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3 | * This file contains the entry veneer for RTEMS programs |
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4 | * stored in Papyrus' flash ROM. |
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5 | * |
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6 | * Author: Andrew Bray <andy@i-cubed.co.uk> |
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7 | * |
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8 | * COPYRIGHT (c) 1995 by i-cubed ltd. |
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9 | * |
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10 | * To anyone who acknowledges that this file is provided "AS IS" |
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11 | * without any express or implied warranty: |
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12 | * permission to use, copy, modify, and distribute this file |
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13 | * for any purpose is hereby granted without fee, provided that |
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14 | * the above copyright notice and this notice appears in all |
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15 | * copies, and that the name of i-cubed limited not be used in |
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16 | * advertising or publicity pertaining to distribution of the |
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17 | * software without specific, written prior permission. |
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18 | * i-cubed limited makes no representations about the suitability |
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19 | * of this software for any purpose. |
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20 | * |
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21 | * $Id$ |
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22 | */ |
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23 | |
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24 | #include "asm.h" |
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25 | |
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26 | /* |
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27 | * The Papyrus ELF link scripts support three special sections: |
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28 | * .entry The actual entry point, this must contain less |
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29 | * than 256 bytes of code/data to fit below the |
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30 | * .vectors section. This always preceeds any other |
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31 | * code or data. |
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32 | * .vectors The section containing the interrupt entry veneers. |
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33 | * .entry2 Any code overflowing from .entry |
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34 | * .descriptors The PowerOpen function indirection blocks. |
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35 | */ |
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36 | |
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37 | /* |
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38 | * Flash sections are linked in the following order: |
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39 | * .entry |
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40 | * .vectors |
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41 | * .entry2 |
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42 | * .text |
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43 | * .descriptors |
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44 | * .data |
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45 | * .bss |
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46 | * usually starting from 0xFFF00000. |
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47 | * |
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48 | * The initial stack is set to run BELOW the final location of |
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49 | * the initialised data. |
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50 | * |
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51 | * All the entry veneer has to do is to copy the initialised data |
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52 | * to its final location and clear the BSS. |
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53 | */ |
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54 | |
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55 | /* |
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56 | * GDB likes to have debugging information for the entry veneer. |
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57 | * Here is some DWARF information. |
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58 | */ |
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59 | |
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60 | #if PPC_ASM == PPC_ASM_ELF |
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61 | .section .entry,"ax",@progbits |
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62 | .L_text_b: |
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63 | .L_LC1: |
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64 | .previous |
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65 | |
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66 | .section .debug_sfnames |
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67 | .L_sfnames_b: |
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68 | .byte "/home/andy/powerpc/rtems-3.2.0/c/src/lib/libcpu/ppc/ppc403/flashentry/" |
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69 | .byte 0 |
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70 | .L_F0: |
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71 | .byte "flashentry.s" |
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72 | .byte 0 |
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73 | .previous |
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74 | |
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75 | .section .line |
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76 | .L_line_b: |
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77 | .4byte .L_line_e-.L_line_b |
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78 | .4byte .L_text_b |
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79 | .L_LE1: |
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80 | .L_line_last: |
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81 | .4byte 0x0 |
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82 | .2byte 0xffff |
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83 | .4byte .L_text_e-.L_text_b |
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84 | .L_line_e: |
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85 | .previous |
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86 | |
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87 | .section .debug_srcinfo |
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88 | .L_srcinfo_b: |
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89 | .4byte .L_line_b |
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90 | .4byte .L_sfnames_b |
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91 | .4byte .L_text_b |
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92 | .4byte .L_text_e |
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93 | .4byte 0xffffffff |
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94 | .4byte .L_LE1-.L_line_b |
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95 | .4byte .L_F0-.L_sfnames_b |
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96 | .4byte .L_line_last-.L_line_b |
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97 | .4byte 0xffffffff |
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98 | .previous |
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99 | |
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100 | .section .debug_pubnames |
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101 | .4byte .L_debug_b |
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102 | .4byte .L_P0 |
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103 | .byte "flash_entry" |
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104 | .byte 0 |
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105 | .4byte 0x0 |
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106 | .byte 0 |
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107 | .previous |
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108 | |
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109 | .section .debug_aranges |
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110 | .4byte .L_debug_b |
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111 | .4byte .L_text_b |
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112 | .4byte .L_text_e-.L_text_b |
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113 | .4byte 0 |
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114 | .4byte 0 |
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115 | .4byte 0 |
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116 | .4byte 0 |
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117 | .4byte 0 |
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118 | .4byte 0 |
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119 | .4byte 0x0 |
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120 | .4byte 0x0 |
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121 | .previous |
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122 | |
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123 | .section .debug |
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124 | .L_debug_b: |
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125 | .L_D1: |
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126 | .4byte .L_D1_e-.L_D1 |
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127 | .2byte 0x11 /* TAG_compile_unit */ |
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128 | .2byte 0x12 /* AT_sibling */ |
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129 | .4byte .L_D2 |
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130 | .2byte 0x38 /* AT_name */ |
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131 | .byte "flashentry.s" |
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132 | .byte 0 |
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133 | .2byte 0x258 /* AT_producer */ |
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134 | .byte "GAS 2.5.2" |
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135 | .byte 0 |
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136 | .2byte 0x111 /* AT_low_pc */ |
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137 | .4byte .L_text_b |
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138 | .2byte 0x121 /* AT_high_pc */ |
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139 | .4byte .L_text_e |
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140 | .2byte 0x106 /* AT_stmt_list */ |
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141 | .4byte .L_line_b |
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142 | .2byte 0x1b8 /* AT_comp_dir */ |
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143 | .byte "/home/andy/powerpc/rtems-3.2.0/c/src/lib/libcpu/ppc/ppc403/dlentry/" |
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144 | .byte 0 |
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145 | .2byte 0x8006 /* AT_sf_names */ |
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146 | .4byte .L_sfnames_b |
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147 | .2byte 0x8016 /* AT_src_info */ |
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148 | .4byte .L_srcinfo_b |
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149 | .L_D1_e: |
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150 | .L_P0: |
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151 | .L_D3: |
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152 | .4byte .L_D3_e-.L_D3 |
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153 | .2byte 0x6 /* TAG_global_subroutine */ |
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154 | .2byte 0x12 /* AT_sibling */ |
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155 | .4byte .L_D4 |
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156 | .2byte 0x38 /* AT_name */ |
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157 | .byte "flash_entry" |
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158 | .byte 0 |
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159 | .2byte 0x278 /* AT_prototyped */ |
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160 | .byte 0 |
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161 | .2byte 0x111 /* AT_low_pc */ |
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162 | .4byte .L_text_b |
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163 | .2byte 0x121 /* AT_high_pc */ |
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164 | .4byte .L_text_e |
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165 | .2byte 0x8041 /* AT_body_begin */ |
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166 | .4byte .L_text_b |
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167 | .2byte 0x8051 /* AT_body_end */ |
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168 | .4byte .L_text_e |
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169 | .L_D3_e: |
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170 | |
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171 | .L_D4: |
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172 | .4byte .L_D4_e-.L_D4 |
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173 | .align 2 |
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174 | .L_D4_e: |
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175 | .L_D2: |
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176 | .previous |
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177 | #endif |
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178 | |
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179 | /*------------------------------------------------------------------------------- |
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180 | * ROM Vector area. |
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181 | *------------------------------------------------------------------------------*/ |
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182 | #if PPC_ASM == PPC_ASM_ELF |
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183 | .section .entry |
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184 | #else |
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185 | .csect .text[PR] |
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186 | #endif |
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187 | PUBLIC_VAR (flash_entry) |
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188 | SYM (flash_entry): |
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189 | bl .startup |
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190 | base_addr: |
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191 | |
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192 | /*------------------------------------------------------------------------------- |
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193 | * Parameters from linker |
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194 | *------------------------------------------------------------------------------*/ |
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195 | toc_pointer: |
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196 | #if PPC_ASM == PPC_ASM_ELF |
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197 | .long s.got |
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198 | #else |
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199 | .long TOC[tc0] |
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200 | #endif |
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201 | text_length: |
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202 | .long t.size |
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203 | text_addr: |
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204 | .long t.start |
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205 | data_length: |
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206 | .long copy.size |
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207 | data_addr: |
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208 | .long copy.dest |
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209 | bss_length: |
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210 | .long bss.size |
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211 | bss_addr: |
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212 | .long bss.start |
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213 | |
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214 | /*------------------------------------------------------------------------------- |
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215 | * Reset_entry. |
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216 | *------------------------------------------------------------------------------*/ |
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217 | .startup: |
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218 | /* Get start address */ |
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219 | mflr r1 |
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220 | |
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221 | /* Assume Bank regs set up..., cache etc. */ |
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222 | |
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223 | /*----------------------------------------------------------------------- |
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224 | * Check the DRAM where STACK+ DATA+ BBS will be placed. If this is OK |
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225 | * we will return here. |
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226 | *----------------------------------------------------------------------*/ |
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227 | bl rom2ram |
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228 | /*----------------------------------------------------------------------- |
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229 | * Enable two 128MB cachable regions. |
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230 | *----------------------------------------------------------------------*/ |
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231 | addis r2,r0,0x8000 |
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232 | addi r2,r2,0x0001 |
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233 | |
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234 | mtspr 0x3fb, r2 /* ICCR */ |
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235 | mtspr 0x3fa, r2 /* DCCR */ |
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236 | |
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237 | /*----------------------------------------------------------------------- |
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238 | * C_setup. |
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239 | *----------------------------------------------------------------------*/ |
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240 | lwz r2,toc_pointer-base_addr(r1) /* set r2 to toc */ |
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241 | lwz r1,data_addr-base_addr(r1) /* set r1 to data_addr */ |
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242 | addi r1,r1,-56 /* start stack at data_addr - 56 */ |
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243 | addi r3,r0,0x0 /* clear r3 */ |
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244 | stw r3, 0(r1) /* Clear stack chain */ |
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245 | stw r3, 4(r1) |
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246 | stw r3, 8(r1) |
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247 | stw r3, 12(r1) |
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248 | .extern SYM (main) |
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249 | b SYM (main) /* call the first C routine */ |
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250 | |
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251 | /*------------------------------------------------------------------------------- |
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252 | * Rom2ram. |
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253 | *------------------------------------------------------------------------------*/ |
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254 | rom2ram: |
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255 | lwz r2,data_addr-base_addr(r1) /* start of data set by loader */ |
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256 | lwz r3,data_length-base_addr(r1) /* data length */ |
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257 | rlwinm r3,r3,30,0x3FFFFFFF /* form length/4 */ |
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258 | mtctr r3 /* set ctr reg */ |
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259 | /*----------------------------------------------------------------------- |
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260 | * Calculate offset of data in image. |
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261 | *----------------------------------------------------------------------*/ |
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262 | lwz r5,text_length-base_addr(r1) /* get text length */ |
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263 | lwz r4,text_addr-base_addr(r1) /* get text length */ |
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264 | add r4,r4,r5 /* r4 = data pointer */ |
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265 | move_data: |
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266 | lswi r6,r4,0x4 /* load r6 */ |
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267 | stswi r6,r2,0x4 /* store r6 */ |
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268 | addi r4,r4,0x4 /* update r4 */ |
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269 | addi r2,r2,0x4 /* update r2 */ |
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270 | bdnz move_data /* decrement counter and loop */ |
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271 | /*----------------------------------------------------------------------- |
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272 | * Data move finished, zero out bss. |
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273 | *----------------------------------------------------------------------*/ |
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274 | lwz r2,bss_addr-base_addr(r1) /* start of bss set by loader */ |
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275 | lwz r3,bss_length-base_addr(r1) /* bss length */ |
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276 | rlwinm. r3,r3,30,0x3FFFFFFF /* form length/4 */ |
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277 | beqlr /* no bss */ |
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278 | mtctr r3 /* set ctr reg */ |
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279 | xor r6,r6,r6 /* r6 = 0 */ |
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280 | clear_bss: |
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281 | stswi r6,r2,0x4 /* store r6 */ |
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282 | addi r3,r2,0x4 /* update r2 */ |
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283 | bdnz clear_bss /* decrement counter and loop */ |
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284 | blr /* return */ |
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285 | .L_text_e: |
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286 | |
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287 | #if PPC_ABI == PPC_ABI_POWEROPEN |
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288 | DESCRIPTOR (startup) |
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289 | #endif |
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