source: rtems/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @ bd0fb919

4.115
Last change on this file since bd0fb919 was bd0fb919, checked in by Joel Sherrill <joel.sherrill@…>, on 08/20/10 at 16:31:24

2010-08-20 Joel Sherrill <joel.sherrill@…>

PR 1684/bsps

  • startup/bspstart.c: Add BSP_poll_char.
  • Property mode set to 100644
File size: 10.2 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified to support the Synergy VGM & Motorola PowerPC boards
18 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
19 *
20 *  Modified to support the MVME5500 board.
21 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
22 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009
23 *
24 *  $Id$
25 */
26
27#include <string.h>
28#include <stdlib.h>
29#include <ctype.h>
30
31#include <rtems/system.h>
32#include <rtems/powerpc/powerpc.h>
33
34#include <libcpu/spr.h>   /* registers.h is included here */
35#include <bsp.h>
36#include <bsp/uart.h>
37#include <bsp/pci.h>
38#include <libcpu/bat.h>
39#include <libcpu/pte121.h>
40#include <libcpu/cpuIdent.h>
41#include <bsp/vectors.h>
42#include <bsp/bspException.h>
43
44#include <rtems/bspIo.h>
45#include <rtems/sptables.h>
46
47/*
48#define SHOW_MORE_INIT_SETTINGS
49#define SHOW_LCR1_REGISTER
50#define SHOW_LCR2_REGISTER
51#define SHOW_LCR3_REGISTER
52#define CONF_VPD
53*/
54
55/* there is no public Workspace_Free() variant :-( */
56#include <rtems/score/wkspace.h>
57
58extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
59
60
61BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
62BSP_polling_getchar_function_type BSP_poll_char = NULL;
63
64extern void _return_to_ppcbug(void);
65extern unsigned long __rtems_end[];
66extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
67extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
68extern void BSP_pgtbl_activate(Triv121PgTbl);
69extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
70extern void BSP_vme_config(void);
71
72extern unsigned char ReadConfVPD_buff(int offset);
73
74extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
75extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
76
77uint32_t bsp_clicks_per_usec;
78
79SPR_RW(SPRG1)
80
81typedef struct CmdLineRec_ {
82    unsigned long  size;
83    char           buf[0];
84} CmdLineRec, *CmdLine;
85
86
87#define mtspr(reg, val)  \
88  __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
89
90
91#define mfspr(reg) \
92  ( { unsigned val; \
93    __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
94    val; } )
95
96/*
97 * Copy Additional boot param passed by boot loader
98 */
99#define MAX_LOADER_ADD_PARM 80
100char loaderParam[MAX_LOADER_ADD_PARM];
101
102/*
103 * Total memory using RESIDUAL DATA
104 */
105unsigned int BSP_mem_size;
106/*
107 * PCI Bus Frequency
108 */
109unsigned int BSP_bus_frequency;
110/*
111 * processor clock frequency
112 */
113unsigned int BSP_processor_frequency;
114/*
115 * Time base divisior (how many tick for 1 second).
116 */
117unsigned int BSP_time_base_divisor;
118static unsigned char ConfVPD_buff[200];
119
120#define CMDLINE_BUF_SIZE  2048
121
122static char cmdline_buf[CMDLINE_BUF_SIZE];
123char *BSP_commandline_string = cmdline_buf;
124
125void BSP_panic(char *s)
126{
127  printk("%s PANIC %s\n",_RTEMS_version, s);
128  __asm__ __volatile ("sc");
129}
130
131void _BSP_Fatal_error(unsigned int v)
132{
133  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
134  __asm__ __volatile ("sc");
135}
136
137void zero_bss(void)
138{
139  memset(
140    __SBSS_START__,
141    0,
142    ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
143  );
144  memset(
145    __SBSS2_START__,
146    0,
147    ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
148  );
149  memset(
150    __bss_start,
151    0,
152    ((unsigned) __rtems_end) - ((unsigned)__bss_start)
153  );
154}
155
156/* NOTE: we cannot simply malloc the commandline string;
157 * save_boot_params() is called during a very early stage when
158 * libc/malloc etc. are not yet initialized!
159 *
160 * Here's what we do:
161 *
162 * initial layout setup by the loader (preload.S):
163 *
164 * 0..RTEMS...__rtems_end | cmdline ....... TOP
165 *
166 * After the save_boot_params() routine returns, the stack area will be
167 * set up (start.S):
168 *
169 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
170 *
171 * initialize_executive_early() [called from boot_card()]
172 * will initialize the workspace:
173 *
174 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
175 *
176 * and later calls our pretasking_hook() which ends up initializing
177 * libc which in turn initializes the heap
178 *
179 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
180 *
181 * The idea here is to first move the commandline to the future 'heap' area
182 * from where it will be picked up by our pretasking_hook().
183 * pretasking_hook() then moves it either to INIT_STACK or the workspace
184 * area using proper allocation, initializes libc and finally moves
185 * the data to the environment / malloced areas...
186 */
187
188/* this routine is called early at shared/start/start.S
189 * and must be safe with a not properly aligned stack
190 */
191char *
192save_boot_params(
193  void *r3,
194  void *r4,
195  void* r5,
196  char *cmdline_start,
197  char *cmdline_end
198)
199{
200  int i=cmdline_end-cmdline_start;
201
202  if ( i >= CMDLINE_BUF_SIZE )
203    i = CMDLINE_BUF_SIZE-1;
204  else if ( i < 0 )
205    i = 0;
206
207  memmove(cmdline_buf, cmdline_start, i);
208  cmdline_buf[i]=0;
209  return cmdline_buf;
210}
211
212/*
213 *  bsp_start
214 *
215 *  This routine does the bulk of the system initialization.
216 */
217
218void bsp_start( void )
219{
220  rtems_status_code sc = RTEMS_SUCCESSFUL;
221#ifdef CONF_VPD
222  int i;
223#endif
224#ifdef SHOW_LCR1_REGISTER
225  unsigned l1cr;
226#endif
227#ifdef SHOW_LCR2_REGISTER
228  unsigned l2cr;
229#endif
230#ifdef SHOW_LCR3_REGISTER
231  unsigned l3cr;
232#endif
233  uintptr_t intrStackStart;
234  uintptr_t intrStackSize;
235  ppc_cpu_id_t myCpu;
236  ppc_cpu_revision_t myCpuRevision;
237  Triv121PgTbl  pt=0;
238
239  /* Till Straumann: 4/2005
240   * Need to map the system registers early, so we can printk...
241   * (otherwise we silently die)
242   */
243  /*
244   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
245   */
246  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
247
248  /* Till Straumann: 2004
249   * map the PCI 0, 1 Domain I/O space, GT64260B registers
250   * and the reserved area so that the size is the power of 2.
251   * 2009 : map the entire 256 M space
252   *
253   */
254  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE);
255
256
257  /*
258   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
259   * store the result in global variables so that it can be used latter...
260   */
261  myCpu   = get_ppc_cpu_type();
262  myCpuRevision = get_ppc_cpu_revision();
263
264#ifdef SHOW_LCR1_REGISTER
265  l1cr = get_L1CR();
266  printk("Initial L1CR value = %x\n", l1cr);
267#endif
268
269  /*
270   * Initialize the interrupt related settings.
271   */
272  intrStackStart = (uintptr_t) __rtems_end;
273  intrStackSize = rtems_configuration_get_interrupt_stack_size();
274
275  /*
276   * Initialize default raw exception handlers.
277   */
278  sc = ppc_exc_initialize(
279    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
280    intrStackStart,
281    intrStackSize
282  );
283  if (sc != RTEMS_SUCCESSFUL) {
284    BSP_panic("cannot initialize exceptions");
285  }
286
287  /*
288   * Init MMU block address translation to enable hardware
289   * access
290   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
291   */
292  printk("-----------------------------------------\n");
293  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
294  printk("-----------------------------------------\n");
295
296  BSP_mem_size         =  probeMemoryEnd();
297  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
298   *       of System Status  register
299   */
300  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
301  BSP_bus_frequency      = 133333333;
302  BSP_processor_frequency    = 1000000000;
303  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
304  BSP_time_base_divisor      = 4000;
305
306
307  /* Maybe not setup yet becuase of the warning message */
308  /* Allocate and set up the page table mappings
309   * This is only available on >604 CPUs.
310   *
311   * NOTE: This setup routine may modify the available memory
312   *       size. It is essential to call it before
313   *       calculating the workspace etc.
314   */
315  pt = BSP_pgtbl_setup(&BSP_mem_size);
316  if (!pt)
317     printk("WARNING: unable to setup page tables.\n");
318
319  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
320
321  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
322
323  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
324
325  /*
326   * Initalize RTEMS IRQ system
327   */
328   BSP_rtems_irq_mng_init(0);
329
330#ifdef SHOW_LCR2_REGISTER
331  l2cr = get_L2CR();
332  printk("Initial L2CR value = %x\n", l2cr);
333#endif
334
335#ifdef SHOW_LCR3_REGISTER
336  /* L3CR needs DEC int. handler installed for bsp_delay()*/
337  l3cr = get_L3CR();
338  printk("Initial L3CR value = %x\n", l3cr);
339#endif
340
341
342  /* Activate the page table mappings only after
343   * initializing interrupts because the irq_mng_init()
344   * routine needs to modify the text
345   */
346  if (pt) {
347#ifdef SHOW_MORE_INIT_SETTINGS
348    printk("Page table setup finished; will activate it NOW...\n");
349#endif
350    BSP_pgtbl_activate(pt);
351  }
352  /* Read Configuration Vital Product Data (VPD) */
353  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
354     printk("I2Cread_eeprom() error \n");
355  else {
356#ifdef CONF_VPD
357    printk("\n");
358    for (i=0; i<150; i++) {
359      printk("%2x ", ConfVPD_buff[i]);
360      if ((i % 20)==0 ) printk("\n");
361    }
362    printk("\n");
363#endif
364  }
365
366  /*
367   * PCI 1 domain memory space
368   */
369  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
370
371
372#ifdef SHOW_MORE_INIT_SETTINGS
373  printk("Going to start PCI buses scanning and initialization\n");
374#endif
375  pci_initialize();
376#ifdef SHOW_MORE_INIT_SETTINGS
377  printk("Number of PCI buses found is : %d\n", pci_bus_count());
378#endif
379
380  /* Install our own exception handler (needs PCI) */
381  globalExceptHdl = BSP_exceptionHandler;
382
383  /* clear hostbridge errors. MCP signal is not used on the MVME5500
384   * PCI config space scanning code will trip otherwise :-(
385   */
386  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
387
388#ifdef SHOW_MORE_INIT_SETTINGS
389  printk("MSR %x \n", _read_MSR());
390  printk("Exit from bspstart\n");
391#endif
392
393}
394
395unsigned char ReadConfVPD_buff(int offset)
396{
397  return(ConfVPD_buff[offset]);
398}
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