source: rtems/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @ 9b4422a2

4.11
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 3, 2012 at 3:09:24 PM

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.

  • Property mode set to 100644
File size: 9.7 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified to support the Synergy VGM & Motorola PowerPC boards
18 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
19 *
20 *  Modified to support the MVME5500 board.
21 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
22 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009
23 */
24
25#include <string.h>
26#include <stdlib.h>
27#include <ctype.h>
28
29#include <rtems/system.h>
30#include <rtems/powerpc/powerpc.h>
31
32#include <libcpu/spr.h>   /* registers.h is included here */
33#include <bsp.h>
34#include <bsp/uart.h>
35#include <bsp/pci.h>
36#include <libcpu/bat.h>
37#include <libcpu/pte121.h>
38#include <libcpu/cpuIdent.h>
39#include <bsp/vectors.h>
40#include <bsp/bspException.h>
41
42#include <rtems/bspIo.h>
43#include <rtems/sptables.h>
44
45/*
46#define SHOW_MORE_INIT_SETTINGS
47#define SHOW_LCR1_REGISTER
48#define SHOW_LCR2_REGISTER
49#define SHOW_LCR3_REGISTER
50#define CONF_VPD
51*/
52
53extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
54
55BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
56BSP_polling_getchar_function_type BSP_poll_char = NULL;
57
58extern void _return_to_ppcbug(void);
59extern unsigned long __rtems_end[];
60extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
61extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
62extern void BSP_pgtbl_activate(Triv121PgTbl);
63extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
64extern void BSP_vme_config(void);
65
66extern unsigned char ReadConfVPD_buff(int offset);
67
68uint32_t bsp_clicks_per_usec;
69
70typedef struct CmdLineRec_ {
71    unsigned long  size;
72    char           buf[0];
73} CmdLineRec, *CmdLine;
74
75
76#define mtspr(reg, val)  \
77  __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
78
79
80#define mfspr(reg) \
81  ( { unsigned val; \
82    __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
83    val; } )
84
85/*
86 * Copy Additional boot param passed by boot loader
87 */
88#define MAX_LOADER_ADD_PARM 80
89char loaderParam[MAX_LOADER_ADD_PARM];
90
91/*
92 * Total memory using RESIDUAL DATA
93 */
94unsigned int BSP_mem_size;
95/*
96 * PCI Bus Frequency
97 */
98unsigned int BSP_bus_frequency;
99/*
100 * processor clock frequency
101 */
102unsigned int BSP_processor_frequency;
103/*
104 * Time base divisior (how many tick for 1 second).
105 */
106unsigned int BSP_time_base_divisor;
107static unsigned char ConfVPD_buff[200];
108
109#define CMDLINE_BUF_SIZE  2048
110
111static char cmdline_buf[CMDLINE_BUF_SIZE];
112char *BSP_commandline_string = cmdline_buf;
113
114void BSP_panic(char *s)
115{
116  printk("%s PANIC %s\n",_RTEMS_version, s);
117  __asm__ __volatile ("sc");
118}
119
120void _BSP_Fatal_error(unsigned int v)
121{
122  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
123  __asm__ __volatile ("sc");
124}
125
126/* NOTE: we cannot simply malloc the commandline string;
127 * save_boot_params() is called during a very early stage when
128 * libc/malloc etc. are not yet initialized!
129 *
130 * Here's what we do:
131 *
132 * initial layout setup by the loader (preload.S):
133 *
134 * 0..RTEMS...__rtems_end | cmdline ....... TOP
135 *
136 * After the save_boot_params() routine returns, the stack area will be
137 * set up (start.S):
138 *
139 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
140 *
141 * initialize_executive_early() [called from boot_card()]
142 * will initialize the workspace:
143 *
144 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
145 *
146 * and later calls our pretasking_hook() which ends up initializing
147 * libc which in turn initializes the heap
148 *
149 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
150 *
151 * The idea here is to first move the commandline to the future 'heap' area
152 * from where it will be picked up by our pretasking_hook().
153 * pretasking_hook() then moves it either to INIT_STACK or the workspace
154 * area using proper allocation, initializes libc and finally moves
155 * the data to the environment / malloced areas...
156 */
157
158/* this routine is called early at shared/start/start.S
159 * and must be safe with a not properly aligned stack
160 */
161char *
162save_boot_params(
163  void *r3,
164  void *r4,
165  void* r5,
166  char *cmdline_start,
167  char *cmdline_end
168)
169{
170  int i=cmdline_end-cmdline_start;
171
172  if ( i >= CMDLINE_BUF_SIZE )
173    i = CMDLINE_BUF_SIZE-1;
174  else if ( i < 0 )
175    i = 0;
176
177  memmove(cmdline_buf, cmdline_start, i);
178  cmdline_buf[i]=0;
179  return cmdline_buf;
180}
181
182/*
183 *  bsp_start
184 *
185 *  This routine does the bulk of the system initialization.
186 */
187
188void bsp_start( void )
189{
190  rtems_status_code sc = RTEMS_SUCCESSFUL;
191#ifdef CONF_VPD
192  int i;
193#endif
194#ifdef SHOW_LCR1_REGISTER
195  unsigned l1cr;
196#endif
197#ifdef SHOW_LCR2_REGISTER
198  unsigned l2cr;
199#endif
200#ifdef SHOW_LCR3_REGISTER
201  unsigned l3cr;
202#endif
203  uintptr_t intrStackStart;
204  uintptr_t intrStackSize;
205  ppc_cpu_id_t myCpu;
206  ppc_cpu_revision_t myCpuRevision;
207  Triv121PgTbl  pt=0;
208
209  /* Till Straumann: 4/2005
210   * Need to map the system registers early, so we can printk...
211   * (otherwise we silently die)
212   */
213  /*
214   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
215   */
216  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
217
218  /* Till Straumann: 2004
219   * map the PCI 0, 1 Domain I/O space, GT64260B registers
220   * and the reserved area so that the size is the power of 2.
221   * 2009 : map the entire 256 M space
222   *
223   */
224  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE);
225
226
227  /*
228   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
229   * store the result in global variables so that it can be used latter...
230   */
231  myCpu   = get_ppc_cpu_type();
232  myCpuRevision = get_ppc_cpu_revision();
233
234#ifdef SHOW_LCR1_REGISTER
235  l1cr = get_L1CR();
236  printk("Initial L1CR value = %x\n", l1cr);
237#endif
238
239  /*
240   * Initialize the interrupt related settings.
241   */
242  intrStackStart = (uintptr_t) __rtems_end;
243  intrStackSize = rtems_configuration_get_interrupt_stack_size();
244
245  /*
246   * Initialize default raw exception handlers.
247   */
248  sc = ppc_exc_initialize(
249    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
250    intrStackStart,
251    intrStackSize
252  );
253  if (sc != RTEMS_SUCCESSFUL) {
254    BSP_panic("cannot initialize exceptions");
255  }
256
257  /*
258   * Init MMU block address translation to enable hardware
259   * access
260   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
261   */
262  printk("-----------------------------------------\n");
263  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
264  printk("-----------------------------------------\n");
265
266  BSP_mem_size         =  probeMemoryEnd();
267
268  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
269   *       of System Status  register
270   */
271  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
272  BSP_bus_frequency      = 133333333;
273  BSP_processor_frequency    = 1000000000;
274  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
275  BSP_time_base_divisor      = 4000;
276
277  /* Maybe not setup yet becuase of the warning message */
278  /* Allocate and set up the page table mappings
279   * This is only available on >604 CPUs.
280   *
281   * NOTE: This setup routine may modify the available memory
282   *       size. It is essential to call it before
283   *       calculating the workspace etc.
284   */
285  pt = BSP_pgtbl_setup(&BSP_mem_size);
286  if (!pt)
287     printk("WARNING: unable to setup page tables.\n");
288
289  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
290
291  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
292
293  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
294
295  /*
296   * Initalize RTEMS IRQ system
297   */
298   BSP_rtems_irq_mng_init(0);
299
300#ifdef SHOW_LCR2_REGISTER
301  l2cr = get_L2CR();
302  printk("Initial L2CR value = %x\n", l2cr);
303#endif
304
305#ifdef SHOW_LCR3_REGISTER
306  /* L3CR needs DEC int. handler installed for bsp_delay()*/
307  l3cr = get_L3CR();
308  printk("Initial L3CR value = %x\n", l3cr);
309#endif
310
311
312  /* Activate the page table mappings only after
313   * initializing interrupts because the irq_mng_init()
314   * routine needs to modify the text
315   */
316  if (pt) {
317#ifdef SHOW_MORE_INIT_SETTINGS
318    printk("Page table setup finished; will activate it NOW...\n");
319#endif
320    BSP_pgtbl_activate(pt);
321  }
322  /* Read Configuration Vital Product Data (VPD) */
323  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
324     printk("I2Cread_eeprom() error \n");
325  else {
326#ifdef CONF_VPD
327    printk("\n");
328    for (i=0; i<150; i++) {
329      printk("%2x ", ConfVPD_buff[i]);
330      if ((i % 20)==0 ) printk("\n");
331    }
332    printk("\n");
333#endif
334  }
335
336  /*
337   * PCI 1 domain memory space
338   */
339  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
340
341
342#ifdef SHOW_MORE_INIT_SETTINGS
343  printk("Going to start PCI buses scanning and initialization\n");
344#endif
345  pci_initialize();
346#ifdef SHOW_MORE_INIT_SETTINGS
347  printk("Number of PCI buses found is : %d\n", pci_bus_count());
348#endif
349
350  /* Install our own exception handler (needs PCI) */
351  globalExceptHdl = BSP_exceptionHandler;
352
353  /* clear hostbridge errors. MCP signal is not used on the MVME5500
354   * PCI config space scanning code will trip otherwise :-(
355   */
356  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
357
358#ifdef SHOW_MORE_INIT_SETTINGS
359  printk("MSR %x \n", _read_MSR());
360  printk("Exit from bspstart\n");
361#endif
362
363}
364
365unsigned char ReadConfVPD_buff(int offset)
366{
367  return(ConfVPD_buff[offset]);
368}
Note: See TracBrowser for help on using the repository browser.