1 | /* |
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2 | * This routine starts the application. It includes application, |
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3 | * board, and monitor specific initialization and configuration. |
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4 | * The generic CPU dependent initialization has been performed |
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5 | * before this routine is invoked. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-2007. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | * |
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14 | * Modified to support the MCP750. |
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15 | * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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16 | * |
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17 | * Modified to support the Synergy VGM & Motorola PowerPC boards |
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18 | * (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005 |
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19 | * |
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20 | * Modified to support the MVME5500 board. |
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21 | * Also, the settings of L1, L2, and L3 caches is not necessary here. |
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22 | * (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2007 |
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23 | * |
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24 | * $Id$ |
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25 | */ |
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26 | |
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27 | #warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). |
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28 | |
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29 | #include <string.h> |
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30 | #include <stdlib.h> |
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31 | #include <ctype.h> |
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32 | |
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33 | #include <rtems/system.h> |
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34 | #include <rtems/libio.h> |
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35 | #include <rtems/libcsupport.h> |
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36 | #include <rtems/powerpc/powerpc.h> |
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37 | |
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38 | #include <libcpu/spr.h> /* registers.h is included here */ |
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39 | #include <bsp.h> |
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40 | #include <bsp/uart.h> |
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41 | #include <bsp/pci.h> |
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42 | #include <libcpu/bat.h> |
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43 | #include <libcpu/pte121.h> |
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44 | #include <libcpu/cpuIdent.h> |
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45 | #include <bsp/vectors.h> |
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46 | #include <bsp/bspException.h> |
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47 | |
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48 | #include <rtems/bspIo.h> |
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49 | #include <rtems/sptables.h> |
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50 | |
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51 | #ifdef __RTEMS_APPLICATION__ |
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52 | #undef __RTEMS_APPLICATION__ |
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53 | #endif |
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54 | |
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55 | /* |
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56 | #define SHOW_MORE_INIT_SETTINGS |
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57 | #define SHOW_LCR1_REGISTER |
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58 | #define SHOW_LCR2_REGISTER |
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59 | #define SHOW_LCR3_REGISTER |
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60 | #define CONF_VPD |
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61 | */ |
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62 | |
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63 | /* there is no public Workspace_Free() variant :-( */ |
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64 | #include <rtems/score/wkspace.h> |
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65 | |
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66 | BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial; |
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67 | |
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68 | extern void _return_to_ppcbug(void); |
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69 | extern unsigned long __rtems_end[]; |
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70 | extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void); |
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71 | extern void bsp_cleanup(void); |
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72 | extern Triv121PgTbl BSP_pgtbl_setup(unsigned long); |
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73 | extern void BSP_pgtbl_activate(Triv121PgTbl); |
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74 | extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes); |
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75 | extern void BSP_vme_config(void); |
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76 | |
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77 | uint32_t bsp_clicks_per_usec; |
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78 | |
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79 | SPR_RW(SPRG1) |
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80 | |
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81 | typedef struct CmdLineRec_ { |
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82 | unsigned long size; |
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83 | char buf[0]; |
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84 | } CmdLineRec, *CmdLine; |
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85 | |
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86 | |
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87 | #define mtspr(reg, val) \ |
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88 | __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val)) |
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89 | |
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90 | |
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91 | #define mfspr(reg) \ |
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92 | ( { unsigned val; \ |
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93 | __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \ |
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94 | val; } ) |
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95 | |
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96 | /* |
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97 | * Copy Additional boot param passed by boot loader |
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98 | */ |
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99 | #define MAX_LOADER_ADD_PARM 80 |
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100 | char loaderParam[MAX_LOADER_ADD_PARM]; |
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101 | |
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102 | /* |
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103 | * Total memory using RESIDUAL DATA |
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104 | */ |
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105 | unsigned int BSP_mem_size; |
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106 | /* |
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107 | * PCI Bus Frequency |
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108 | */ |
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109 | /* |
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110 | * Start of the heap |
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111 | */ |
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112 | unsigned int BSP_heap_start; |
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113 | |
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114 | unsigned int BSP_bus_frequency; |
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115 | /* |
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116 | * processor clock frequency |
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117 | */ |
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118 | unsigned int BSP_processor_frequency; |
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119 | /* |
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120 | * Time base divisior (how many tick for 1 second). |
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121 | */ |
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122 | unsigned int BSP_time_base_divisor; |
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123 | unsigned char ConfVPD_buff[200]; |
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124 | |
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125 | #define CMDLINE_BUF_SIZE 2048 |
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126 | |
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127 | static char cmdline_buf[CMDLINE_BUF_SIZE]; |
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128 | char *BSP_commandline_string = cmdline_buf; |
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129 | |
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130 | /* |
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131 | * system init stack |
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132 | */ |
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133 | #define INIT_STACK_SIZE 0x1000 |
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134 | |
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135 | void BSP_panic(char *s) |
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136 | { |
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137 | printk("%s PANIC %s\n",_RTEMS_version, s); |
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138 | __asm__ __volatile ("sc"); |
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139 | } |
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140 | |
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141 | void _BSP_Fatal_error(unsigned int v) |
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142 | { |
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143 | printk("%s PANIC ERROR %x\n",_RTEMS_version, v); |
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144 | __asm__ __volatile ("sc"); |
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145 | } |
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146 | |
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147 | /* |
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148 | * Use the shared implementations of the following routines |
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149 | */ |
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150 | |
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151 | extern void bsp_libc_init( void *, uint32_t, int ); |
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152 | |
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153 | void zero_bss() |
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154 | { |
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155 | /* prevent these from being accessed in the short data areas */ |
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156 | extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[]; |
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157 | extern unsigned long __SBSS2_START__[], __SBSS2_END__[]; |
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158 | |
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159 | memset( |
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160 | __SBSS_START__, |
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161 | 0, |
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162 | ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__) |
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163 | ); |
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164 | memset( |
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165 | __SBSS2_START__, |
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166 | 0, |
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167 | ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__) |
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168 | ); |
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169 | memset( |
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170 | __bss_start, |
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171 | 0, |
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172 | ((unsigned) __rtems_end) - ((unsigned)__bss_start) |
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173 | ); |
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174 | } |
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175 | |
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176 | /* NOTE: we cannot simply malloc the commandline string; |
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177 | * save_boot_params() is called during a very early stage when |
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178 | * libc/malloc etc. are not yet initialized! |
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179 | * |
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180 | * Here's what we do: |
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181 | * |
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182 | * initial layout setup by the loader (preload.S): |
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183 | * |
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184 | * 0..RTEMS...__rtems_end | cmdline ....... TOP |
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185 | * |
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186 | * After the save_boot_params() routine returns, the stack area will be |
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187 | * set up (start.S): |
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188 | * |
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189 | * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP |
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190 | * |
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191 | * initialize_executive_early() [called from boot_card()] |
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192 | * will initialize the workspace: |
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193 | * |
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194 | * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP |
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195 | * |
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196 | * and later calls our pretasking_hook() which ends up initializing |
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197 | * libc which in turn initializes the heap |
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198 | * |
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199 | * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP |
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200 | * |
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201 | * The idea here is to first move the commandline to the future 'heap' area |
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202 | * from where it will be picked up by our pretasking_hook(). |
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203 | * pretasking_hook() then moves it either to INIT_STACK or the workspace |
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204 | * area using proper allocation, initializes libc and finally moves |
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205 | * the data to the environment / malloced areas... |
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206 | */ |
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207 | |
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208 | /* this routine is called early at shared/start/start.S |
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209 | * and must be safe with a not properly aligned stack |
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210 | */ |
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211 | void |
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212 | save_boot_params( |
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213 | void *r3, |
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214 | void *r4, |
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215 | void* r5, |
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216 | char *cmdline_start, |
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217 | char *cmdline_end |
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218 | ) |
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219 | { |
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220 | int i=cmdline_end-cmdline_start; |
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221 | |
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222 | if ( i >= CMDLINE_BUF_SIZE ) |
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223 | i = CMDLINE_BUF_SIZE-1; |
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224 | else if ( i < 0 ) |
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225 | i = 0; |
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226 | |
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227 | memmove(cmdline_buf, cmdline_start, i); |
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228 | cmdline_buf[i]=0; |
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229 | } |
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230 | |
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231 | /* |
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232 | * bsp_start |
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233 | * |
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234 | * This routine does the bulk of the system initialization. |
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235 | */ |
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236 | |
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237 | void bsp_start( void ) |
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238 | { |
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239 | #ifdef CONF_VPD |
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240 | int i; |
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241 | #endif |
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242 | unsigned char *stack; |
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243 | unsigned long *r1sp; |
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244 | #ifdef SHOW_LCR1_REGISTER |
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245 | unsigned l1cr; |
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246 | #endif |
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247 | #ifdef SHOW_LCR2_REGISTER |
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248 | unsigned l2cr; |
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249 | #endif |
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250 | #ifdef SHOW_LCR3_REGISTER |
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251 | unsigned l3cr; |
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252 | #endif |
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253 | uint32_t intrStackStart; |
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254 | uint32_t intrStackSize; |
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255 | unsigned char *work_space_start; |
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256 | ppc_cpu_id_t myCpu; |
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257 | ppc_cpu_revision_t myCpuRevision; |
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258 | Triv121PgTbl pt=0; |
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259 | |
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260 | /* Till Straumann: 4/2005 |
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261 | * Need to map the system registers early, so we can printk... |
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262 | * (otherwise we silently die) |
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263 | */ |
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264 | /* |
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265 | * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window |
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266 | */ |
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267 | setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE); |
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268 | |
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269 | /* Till Straumann: 2004 |
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270 | * map the PCI 0, 1 Domain I/O space, GT64260B registers |
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271 | * and the reserved area so that the size is the power of 2. |
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272 | * |
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273 | */ |
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274 | setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE); |
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275 | |
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276 | |
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277 | /* |
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278 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function |
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279 | * store the result in global variables so that it can be used latter... |
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280 | */ |
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281 | myCpu = get_ppc_cpu_type(); |
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282 | myCpuRevision = get_ppc_cpu_revision(); |
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283 | |
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284 | #ifdef SHOW_LCR1_REGISTER |
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285 | l1cr = get_L1CR(); |
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286 | printk("Initial L1CR value = %x\n", l1cr); |
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287 | #endif |
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288 | |
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289 | /* |
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290 | * the initial stack has aready been set to this value in start.S |
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291 | * so there is no need to set it in r1 again... It is just for info |
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292 | * so that it can be printed without accessing R1. |
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293 | */ |
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294 | stack = ((unsigned char*) __rtems_end) + |
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295 | INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE; |
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296 | |
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297 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
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298 | *((uint32_t *)stack) = 0; |
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299 | |
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300 | /* fill stack with pattern for debugging */ |
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301 | __asm__ __volatile__("mr %0, %%r1":"=r"(r1sp)); |
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302 | while (--r1sp >= (unsigned long*)__rtems_end) |
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303 | *r1sp=0xeeeeeeee; |
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304 | |
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305 | /* |
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306 | * Initialize the interrupt related settings. |
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307 | */ |
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308 | intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE; |
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309 | intrStackSize = rtems_configuration_get_interrupt_stack_size(); |
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310 | BSP_heap_start = intrStackStart + intrStackSize; |
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311 | |
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312 | /* |
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313 | * Initialize default raw exception handlers. |
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314 | */ |
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315 | ppc_exc_initialize( |
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316 | PPC_INTERRUPT_DISABLE_MASK_DEFAULT, |
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317 | intrStackStart, |
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318 | intrStackSize |
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319 | ); |
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320 | |
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321 | /* |
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322 | * Init MMU block address translation to enable hardware |
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323 | * access |
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324 | * More PCI1 memory mapping to be done after BSP_pgtbl_activate. |
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325 | */ |
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326 | printk("-----------------------------------------\n"); |
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327 | printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version ); |
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328 | printk("-----------------------------------------\n"); |
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329 | |
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330 | #ifdef TEST_RETURN_TO_PPCBUG |
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331 | printk("Hit <Enter> to return to PPCBUG monitor\n"); |
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332 | printk("When Finished hit GO. It should print <Back from monitor>\n"); |
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333 | debug_getc(); |
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334 | _return_to_ppcbug(); |
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335 | printk("Back from monitor\n"); |
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336 | _return_to_ppcbug(); |
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337 | #endif /* TEST_RETURN_TO_PPCBUG */ |
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338 | |
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339 | #ifdef TEST_RAW_EXCEPTION_CODE |
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340 | printk("Testing exception handling Part 1\n"); |
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341 | /* |
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342 | * Cause a software exception |
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343 | */ |
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344 | __asm__ __volatile ("sc"); |
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345 | /* |
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346 | * Check we can still catch exceptions and returned coorectly. |
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347 | */ |
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348 | printk("Testing exception handling Part 2\n"); |
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349 | __asm__ __volatile ("sc"); |
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350 | #endif |
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351 | |
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352 | BSP_mem_size = _512M; |
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353 | /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit |
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354 | * of System Status register |
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355 | */ |
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356 | /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */ |
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357 | BSP_bus_frequency = 133333333; |
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358 | BSP_processor_frequency = 1000000000; |
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359 | /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */ |
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360 | BSP_time_base_divisor = 4000; |
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361 | |
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362 | |
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363 | /* Maybe not setup yet becuase of the warning message */ |
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364 | /* Allocate and set up the page table mappings |
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365 | * This is only available on >604 CPUs. |
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366 | * |
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367 | * NOTE: This setup routine may modify the available memory |
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368 | * size. It is essential to call it before |
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369 | * calculating the workspace etc. |
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370 | */ |
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371 | pt = BSP_pgtbl_setup(&BSP_mem_size); |
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372 | if (!pt) |
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373 | printk("WARNING: unable to setup page tables.\n"); |
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374 | |
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375 | printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size); |
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376 | |
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377 | /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */ |
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378 | |
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379 | bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000); |
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380 | |
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381 | printk( |
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382 | "rtems_configuration_get_work_space_size() = %x\n", |
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383 | rtems_configuration_get_work_space_size() |
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384 | ); |
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385 | |
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386 | work_space_start = |
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387 | (unsigned char *)BSP_mem_size - rtems_configuration_get_work_space_size(); |
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388 | |
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389 | if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + |
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390 | rtems_configuration_get_interrupt_stack_size()) { |
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391 | printk( "bspstart: Not enough RAM!!!\n" ); |
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392 | bsp_cleanup(); |
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393 | } |
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394 | |
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395 | Configuration.work_space_start = work_space_start; |
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396 | |
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397 | /* |
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398 | * Initalize RTEMS IRQ system |
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399 | */ |
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400 | BSP_rtems_irq_mng_init(0); |
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401 | |
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402 | #ifdef SHOW_LCR2_REGISTER |
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403 | l2cr = get_L2CR(); |
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404 | printk("Initial L2CR value = %x\n", l2cr); |
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405 | #endif |
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406 | |
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407 | #ifdef SHOW_LCR3_REGISTER |
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408 | /* L3CR needs DEC int. handler installed for bsp_delay()*/ |
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409 | l3cr = get_L3CR(); |
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410 | printk("Initial L3CR value = %x\n", l3cr); |
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411 | #endif |
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412 | |
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413 | |
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414 | /* Activate the page table mappings only after |
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415 | * initializing interrupts because the irq_mng_init() |
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416 | * routine needs to modify the text |
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417 | */ |
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418 | if (pt) { |
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419 | #ifdef SHOW_MORE_INIT_SETTINGS |
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420 | printk("Page table setup finished; will activate it NOW...\n"); |
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421 | #endif |
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422 | BSP_pgtbl_activate(pt); |
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423 | } |
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424 | |
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425 | /* |
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426 | * PCI 1 domain memory space |
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427 | */ |
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428 | setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE); |
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429 | |
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430 | |
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431 | #ifdef SHOW_MORE_INIT_SETTINGS |
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432 | printk("Going to start PCI buses scanning and initialization\n"); |
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433 | #endif |
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434 | pci_initialize(); |
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435 | #ifdef SHOW_MORE_INIT_SETTINGS |
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436 | printk("Number of PCI buses found is : %d\n", pci_bus_count()); |
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437 | #endif |
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438 | |
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439 | /* Install our own exception handler (needs PCI) */ |
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440 | globalExceptHdl = BSP_exceptionHandler; |
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441 | |
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442 | /* clear hostbridge errors. MCP signal is not used on the MVME5500 |
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443 | * PCI config space scanning code will trip otherwise :-( |
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444 | */ |
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445 | _BSP_clear_hostbridge_errors(0, 1 /*quiet*/); |
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446 | |
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447 | /* Read Configuration Vital Product Data (VPD) */ |
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448 | if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150)) |
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449 | printk("I2Cread_eeprom() error \n"); |
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450 | else { |
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451 | #ifdef CONF_VPD |
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452 | printk("\n"); |
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453 | for (i=0; i<150; i++) { |
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454 | printk("%2x ", ConfVPD_buff[i]); |
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455 | if ((i % 20)==0 ) printk("\n"); |
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456 | } |
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457 | printk("\n"); |
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458 | #endif |
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459 | } |
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460 | |
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461 | #ifdef SHOW_MORE_INIT_SETTINGS |
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462 | printk("MSR %x \n", _read_MSR()); |
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463 | printk("Exit from bspstart\n"); |
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464 | #endif |
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465 | |
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466 | } |
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