source: rtems/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @ 6771a9e7

4.104.114.9
Last change on this file since 6771a9e7 was 6771a9e7, checked in by Ralf Corsepius <ralf.corsepius@…>, on Aug 20, 2008 at 9:00:11 AM

Add missing prototypes.

  • Property mode set to 100644
File size: 12.1 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified to support the Synergy VGM & Motorola PowerPC boards
18 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
19 *
20 *  Modified to support the MVME5500 board.
21 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
22 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2007
23 * 
24 *  $Id$
25 */
26
27#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
28
29#include <string.h>
30#include <stdlib.h>
31#include <ctype.h>
32
33#include <rtems/system.h>
34#include <rtems/libio.h>
35#include <rtems/libcsupport.h>
36#include <rtems/powerpc/powerpc.h>
37
38#include <libcpu/spr.h>   /* registers.h is included here */
39#include <bsp.h>
40#include <bsp/uart.h>
41#include <bsp/pci.h>
42#include <libcpu/bat.h>
43#include <libcpu/pte121.h>
44#include <libcpu/cpuIdent.h>
45#include <bsp/vectors.h>
46#include <bsp/bspException.h>
47
48#include <rtems/bspIo.h>
49#include <rtems/sptables.h>
50
51#ifdef __RTEMS_APPLICATION__
52#undef __RTEMS_APPLICATION__
53#endif
54
55/*
56#define SHOW_MORE_INIT_SETTINGS
57#define SHOW_LCR1_REGISTER
58#define SHOW_LCR2_REGISTER
59#define SHOW_LCR3_REGISTER
60#define CONF_VPD
61*/
62
63/* there is no public Workspace_Free() variant :-( */
64#include <rtems/score/wkspace.h>
65
66BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
67
68extern void _return_to_ppcbug(void);
69extern unsigned long __rtems_end[];
70extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
71extern void bsp_cleanup(void);
72extern Triv121PgTbl BSP_pgtbl_setup(unsigned long);
73extern void BSP_pgtbl_activate(Triv121PgTbl);
74extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
75extern void BSP_vme_config(void);
76
77uint32_t bsp_clicks_per_usec;
78
79SPR_RW(SPRG1)
80
81typedef struct CmdLineRec_ {
82    unsigned long  size;
83    char           buf[0];
84} CmdLineRec, *CmdLine;
85
86
87#define mtspr(reg, val)  \
88  __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
89
90
91#define mfspr(reg) \
92  ( { unsigned val; \
93    __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
94    val; } )
95
96/*
97 * Copy Additional boot param passed by boot loader
98 */
99#define MAX_LOADER_ADD_PARM 80
100char loaderParam[MAX_LOADER_ADD_PARM];
101
102/*
103 * Total memory using RESIDUAL DATA
104 */
105unsigned int BSP_mem_size;
106/*
107 * PCI Bus Frequency
108 */
109/*
110 * Start of the heap
111 */
112unsigned int BSP_heap_start;
113
114unsigned int BSP_bus_frequency;
115/*
116 * processor clock frequency
117 */
118unsigned int BSP_processor_frequency;
119/*
120 * Time base divisior (how many tick for 1 second).
121 */
122unsigned int BSP_time_base_divisor;
123unsigned char ConfVPD_buff[200];
124
125#define CMDLINE_BUF_SIZE  2048
126
127static char cmdline_buf[CMDLINE_BUF_SIZE];
128char *BSP_commandline_string = cmdline_buf;
129
130/*
131 * system init stack
132 */
133#define INIT_STACK_SIZE 0x1000
134
135void BSP_panic(char *s)
136{
137  printk("%s PANIC %s\n",_RTEMS_version, s);
138  __asm__ __volatile ("sc"); 
139}
140
141void _BSP_Fatal_error(unsigned int v)
142{
143  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
144  __asm__ __volatile ("sc"); 
145}
146 
147/*
148 *  Use the shared implementations of the following routines
149 */
150 
151extern void bsp_libc_init( void *, uint32_t, int );
152
153void zero_bss()
154{
155  /* prevent these from being accessed in the short data areas */
156  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
157  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
158
159  memset(
160    __SBSS_START__,
161    0,
162    ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
163  );
164  memset(
165    __SBSS2_START__,
166    0,
167    ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
168  );
169  memset(
170    __bss_start,
171    0,
172    ((unsigned) __rtems_end) - ((unsigned)__bss_start)
173  );
174}
175
176/* NOTE: we cannot simply malloc the commandline string;
177 * save_boot_params() is called during a very early stage when
178 * libc/malloc etc. are not yet initialized!
179 *
180 * Here's what we do:
181 *
182 * initial layout setup by the loader (preload.S):
183 *
184 * 0..RTEMS...__rtems_end | cmdline ....... TOP
185 *
186 * After the save_boot_params() routine returns, the stack area will be
187 * set up (start.S):
188 *
189 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
190 *
191 * initialize_executive_early() [called from boot_card()]
192 * will initialize the workspace:
193 *
194 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
195 *
196 * and later calls our pretasking_hook() which ends up initializing
197 * libc which in turn initializes the heap
198 *
199 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
200 *
201 * The idea here is to first move the commandline to the future 'heap' area
202 * from where it will be picked up by our pretasking_hook().
203 * pretasking_hook() then moves it either to INIT_STACK or the workspace
204 * area using proper allocation, initializes libc and finally moves
205 * the data to the environment / malloced areas...
206 */
207
208/* this routine is called early at shared/start/start.S
209 * and must be safe with a not properly aligned stack
210 */
211void
212save_boot_params(
213  void *r3,
214  void *r4,
215  void* r5,
216  char *cmdline_start,
217  char *cmdline_end
218)
219{
220  int i=cmdline_end-cmdline_start;
221
222  if ( i >= CMDLINE_BUF_SIZE )
223    i = CMDLINE_BUF_SIZE-1;
224  else if ( i < 0 )
225    i = 0;
226
227  memmove(cmdline_buf, cmdline_start, i);
228  cmdline_buf[i]=0;
229}
230
231/*
232 *  bsp_start
233 *
234 *  This routine does the bulk of the system initialization.
235 */
236
237void bsp_start( void )
238{
239#ifdef CONF_VPD
240  int i;
241#endif
242  unsigned char *stack;
243  unsigned long   *r1sp;
244#ifdef SHOW_LCR1_REGISTER
245  unsigned l1cr;
246#endif
247#ifdef SHOW_LCR2_REGISTER
248  unsigned l2cr;
249#endif
250#ifdef SHOW_LCR3_REGISTER
251  unsigned l3cr;
252#endif
253  uint32_t intrStackStart;
254  uint32_t intrStackSize;
255  unsigned char *work_space_start;
256  ppc_cpu_id_t myCpu;
257  ppc_cpu_revision_t myCpuRevision;
258  Triv121PgTbl  pt=0;
259
260  /* Till Straumann: 4/2005
261   * Need to map the system registers early, so we can printk...
262   * (otherwise we silently die)
263   */
264  /*
265   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
266   */
267  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
268
269  /* Till Straumann: 2004
270   * map the PCI 0, 1 Domain I/O space, GT64260B registers
271   * and the reserved area so that the size is the power of 2.
272   *
273   */
274  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE);
275
276
277  /*
278   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
279   * store the result in global variables so that it can be used latter...
280   */
281  myCpu   = get_ppc_cpu_type();
282  myCpuRevision = get_ppc_cpu_revision();
283
284#ifdef SHOW_LCR1_REGISTER
285  l1cr = get_L1CR();
286  printk("Initial L1CR value = %x\n", l1cr); 
287#endif
288
289  /*
290   * the initial stack  has aready been set to this value in start.S
291   * so there is no need to set it in r1 again... It is just for info
292   * so that it can be printed without accessing R1.
293   */
294  stack = ((unsigned char*) __rtems_end) +
295          INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
296
297  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
298  *((uint32_t *)stack) = 0;
299
300  /* fill stack with pattern for debugging */
301  __asm__ __volatile__("mr %0, %%r1":"=r"(r1sp));
302  while (--r1sp >= (unsigned long*)__rtems_end)
303    *r1sp=0xeeeeeeee;
304
305  /*
306   * Initialize the interrupt related settings.
307   */
308  intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE;
309  intrStackSize = rtems_configuration_get_interrupt_stack_size();
310  BSP_heap_start = intrStackStart + intrStackSize;
311
312  /*
313   * Initialize default raw exception handlers.
314   */
315  ppc_exc_initialize(
316    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
317    intrStackStart,
318    intrStackSize
319  );
320
321  /*
322   * Init MMU block address translation to enable hardware
323   * access
324   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
325   */
326  printk("-----------------------------------------\n");
327  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
328  printk("-----------------------------------------\n");
329
330#ifdef TEST_RETURN_TO_PPCBUG 
331  printk("Hit <Enter> to return to PPCBUG monitor\n");
332  printk("When Finished hit GO. It should print <Back from monitor>\n");
333  debug_getc();
334  _return_to_ppcbug();
335  printk("Back from monitor\n");
336  _return_to_ppcbug();
337#endif /* TEST_RETURN_TO_PPCBUG  */
338
339#ifdef TEST_RAW_EXCEPTION_CODE 
340  printk("Testing exception handling Part 1\n");
341  /*
342   * Cause a software exception
343   */
344  __asm__ __volatile ("sc");
345  /*
346   * Check we can still catch exceptions and returned coorectly.
347   */
348  printk("Testing exception handling Part 2\n");
349  __asm__ __volatile ("sc");
350#endif 
351
352  BSP_mem_size         =  _512M;
353  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
354   *       of System Status  register
355   */
356  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
357  BSP_bus_frequency      = 133333333;
358  BSP_processor_frequency    = 1000000000;
359  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
360  BSP_time_base_divisor      = 4000;
361
362
363  /* Maybe not setup yet becuase of the warning message */
364  /* Allocate and set up the page table mappings
365   * This is only available on >604 CPUs.
366   *
367   * NOTE: This setup routine may modify the available memory
368   *       size. It is essential to call it before
369   *       calculating the workspace etc.
370   */
371  pt = BSP_pgtbl_setup(&BSP_mem_size);
372  if (!pt)
373     printk("WARNING: unable to setup page tables.\n");
374
375  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size); 
376
377  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
378
379  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
380
381  printk(
382    "rtems_configuration_get_work_space_size() = %x\n",
383     rtems_configuration_get_work_space_size()
384  ); 
385
386  work_space_start = 
387    (unsigned char *)BSP_mem_size - rtems_configuration_get_work_space_size();
388
389  if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + 
390        rtems_configuration_get_interrupt_stack_size()) {
391    printk( "bspstart: Not enough RAM!!!\n" );
392    bsp_cleanup();
393  }
394
395  Configuration.work_space_start = work_space_start;
396
397  /*
398   * Initalize RTEMS IRQ system
399   */
400   BSP_rtems_irq_mng_init(0);
401
402#ifdef SHOW_LCR2_REGISTER
403  l2cr = get_L2CR();
404  printk("Initial L2CR value = %x\n", l2cr);
405#endif 
406
407#ifdef SHOW_LCR3_REGISTER
408  /* L3CR needs DEC int. handler installed for bsp_delay()*/
409  l3cr = get_L3CR();
410  printk("Initial L3CR value = %x\n", l3cr);
411#endif 
412
413
414  /* Activate the page table mappings only after
415   * initializing interrupts because the irq_mng_init()
416   * routine needs to modify the text
417   */           
418  if (pt) {
419#ifdef SHOW_MORE_INIT_SETTINGS
420    printk("Page table setup finished; will activate it NOW...\n");
421#endif
422    BSP_pgtbl_activate(pt);
423  }
424
425  /*
426   * PCI 1 domain memory space
427   */
428  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
429 
430
431#ifdef SHOW_MORE_INIT_SETTINGS
432  printk("Going to start PCI buses scanning and initialization\n");
433#endif 
434  pci_initialize();
435#ifdef SHOW_MORE_INIT_SETTINGS
436  printk("Number of PCI buses found is : %d\n", pci_bus_count());
437#endif
438
439  /* Install our own exception handler (needs PCI) */
440  globalExceptHdl = BSP_exceptionHandler;
441
442  /* clear hostbridge errors. MCP signal is not used on the MVME5500
443   * PCI config space scanning code will trip otherwise :-(
444   */
445  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
446
447  /* Read Configuration Vital Product Data (VPD) */
448  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
449     printk("I2Cread_eeprom() error \n");
450  else {
451#ifdef CONF_VPD
452    printk("\n");
453    for (i=0; i<150; i++) {
454      printk("%2x ", ConfVPD_buff[i]); 
455      if ((i % 20)==0 ) printk("\n");
456    }
457    printk("\n");
458#endif
459  }
460
461#ifdef SHOW_MORE_INIT_SETTINGS
462  printk("MSR %x \n", _read_MSR());
463  printk("Exit from bspstart\n");
464#endif
465
466}
Note: See TracBrowser for help on using the repository browser.