source: rtems/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @ 169480b

4.115
Last change on this file since 169480b was 169480b, checked in by Joel Sherrill <joel.sherrill@…>, on Jun 17, 2011 at 1:24:47 PM

2011-04-10 Kate Feng <feng@…>

PR 1786/bsps

  • Makefile.am: Add support for Altivec.
  • startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
  • make/custom/mvme5500.cfg: Change CPU_CFLAGS to "-mcpu=7450 -mtune=7450 -Dmpc7455"
  • irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c: Remove warnings.
  • vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
  • network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there is any Rx error.
  • Property mode set to 100644
File size: 9.7 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified to support the Synergy VGM & Motorola PowerPC boards
18 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
19 *
20 *  Modified to support the MVME5500 board.
21 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
22 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009
23 *
24 *  $Id$
25 */
26
27#include <string.h>
28#include <stdlib.h>
29#include <ctype.h>
30
31#include <rtems/system.h>
32#include <rtems/powerpc/powerpc.h>
33
34#include <libcpu/spr.h>   /* registers.h is included here */
35#include <bsp.h>
36#include <bsp/uart.h>
37#include <bsp/pci.h>
38#include <libcpu/bat.h>
39#include <libcpu/pte121.h>
40#include <libcpu/cpuIdent.h>
41#include <bsp/vectors.h>
42#include <bsp/bspException.h>
43
44#include <rtems/bspIo.h>
45#include <rtems/sptables.h>
46
47/*
48#define SHOW_MORE_INIT_SETTINGS
49#define SHOW_LCR1_REGISTER
50#define SHOW_LCR2_REGISTER
51#define SHOW_LCR3_REGISTER
52#define CONF_VPD
53*/
54
55extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
56
57BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
58BSP_polling_getchar_function_type BSP_poll_char = NULL;
59
60extern void _return_to_ppcbug(void);
61extern unsigned long __rtems_end[];
62extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
63extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
64extern void BSP_pgtbl_activate(Triv121PgTbl);
65extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
66extern void BSP_vme_config(void);
67
68extern unsigned char ReadConfVPD_buff(int offset);
69
70uint32_t bsp_clicks_per_usec;
71
72typedef struct CmdLineRec_ {
73    unsigned long  size;
74    char           buf[0];
75} CmdLineRec, *CmdLine;
76
77
78#define mtspr(reg, val)  \
79  __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
80
81
82#define mfspr(reg) \
83  ( { unsigned val; \
84    __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
85    val; } )
86
87/*
88 * Copy Additional boot param passed by boot loader
89 */
90#define MAX_LOADER_ADD_PARM 80
91char loaderParam[MAX_LOADER_ADD_PARM];
92
93/*
94 * Total memory using RESIDUAL DATA
95 */
96unsigned int BSP_mem_size;
97/*
98 * PCI Bus Frequency
99 */
100unsigned int BSP_bus_frequency;
101/*
102 * processor clock frequency
103 */
104unsigned int BSP_processor_frequency;
105/*
106 * Time base divisior (how many tick for 1 second).
107 */
108unsigned int BSP_time_base_divisor;
109static unsigned char ConfVPD_buff[200];
110
111#define CMDLINE_BUF_SIZE  2048
112
113static char cmdline_buf[CMDLINE_BUF_SIZE];
114char *BSP_commandline_string = cmdline_buf;
115
116void BSP_panic(char *s)
117{
118  printk("%s PANIC %s\n",_RTEMS_version, s);
119  __asm__ __volatile ("sc");
120}
121
122void _BSP_Fatal_error(unsigned int v)
123{
124  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
125  __asm__ __volatile ("sc");
126}
127
128/* NOTE: we cannot simply malloc the commandline string;
129 * save_boot_params() is called during a very early stage when
130 * libc/malloc etc. are not yet initialized!
131 *
132 * Here's what we do:
133 *
134 * initial layout setup by the loader (preload.S):
135 *
136 * 0..RTEMS...__rtems_end | cmdline ....... TOP
137 *
138 * After the save_boot_params() routine returns, the stack area will be
139 * set up (start.S):
140 *
141 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
142 *
143 * initialize_executive_early() [called from boot_card()]
144 * will initialize the workspace:
145 *
146 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
147 *
148 * and later calls our pretasking_hook() which ends up initializing
149 * libc which in turn initializes the heap
150 *
151 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
152 *
153 * The idea here is to first move the commandline to the future 'heap' area
154 * from where it will be picked up by our pretasking_hook().
155 * pretasking_hook() then moves it either to INIT_STACK or the workspace
156 * area using proper allocation, initializes libc and finally moves
157 * the data to the environment / malloced areas...
158 */
159
160/* this routine is called early at shared/start/start.S
161 * and must be safe with a not properly aligned stack
162 */
163char *
164save_boot_params(
165  void *r3,
166  void *r4,
167  void* r5,
168  char *cmdline_start,
169  char *cmdline_end
170)
171{
172  int i=cmdline_end-cmdline_start;
173
174  if ( i >= CMDLINE_BUF_SIZE )
175    i = CMDLINE_BUF_SIZE-1;
176  else if ( i < 0 )
177    i = 0;
178
179  memmove(cmdline_buf, cmdline_start, i);
180  cmdline_buf[i]=0;
181  return cmdline_buf;
182}
183
184/*
185 *  bsp_start
186 *
187 *  This routine does the bulk of the system initialization.
188 */
189
190void bsp_start( void )
191{
192  rtems_status_code sc = RTEMS_SUCCESSFUL;
193#ifdef CONF_VPD
194  int i;
195#endif
196#ifdef SHOW_LCR1_REGISTER
197  unsigned l1cr;
198#endif
199#ifdef SHOW_LCR2_REGISTER
200  unsigned l2cr;
201#endif
202#ifdef SHOW_LCR3_REGISTER
203  unsigned l3cr;
204#endif
205  uintptr_t intrStackStart;
206  uintptr_t intrStackSize;
207  ppc_cpu_id_t myCpu;
208  ppc_cpu_revision_t myCpuRevision;
209  Triv121PgTbl  pt=0;
210
211  /* Till Straumann: 4/2005
212   * Need to map the system registers early, so we can printk...
213   * (otherwise we silently die)
214   */
215  /*
216   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
217   */
218  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
219
220  /* Till Straumann: 2004
221   * map the PCI 0, 1 Domain I/O space, GT64260B registers
222   * and the reserved area so that the size is the power of 2.
223   * 2009 : map the entire 256 M space
224   *
225   */
226  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE);
227
228
229  /*
230   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
231   * store the result in global variables so that it can be used latter...
232   */
233  myCpu   = get_ppc_cpu_type();
234  myCpuRevision = get_ppc_cpu_revision();
235
236#ifdef SHOW_LCR1_REGISTER
237  l1cr = get_L1CR();
238  printk("Initial L1CR value = %x\n", l1cr);
239#endif
240
241  /*
242   * Initialize the interrupt related settings.
243   */
244  intrStackStart = (uintptr_t) __rtems_end;
245  intrStackSize = rtems_configuration_get_interrupt_stack_size();
246
247  /*
248   * Initialize default raw exception handlers.
249   */
250  sc = ppc_exc_initialize(
251    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
252    intrStackStart,
253    intrStackSize
254  );
255  if (sc != RTEMS_SUCCESSFUL) {
256    BSP_panic("cannot initialize exceptions");
257  }
258
259  /*
260   * Init MMU block address translation to enable hardware
261   * access
262   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
263   */
264  printk("-----------------------------------------\n");
265  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
266  printk("-----------------------------------------\n");
267
268  BSP_mem_size         =  probeMemoryEnd();
269
270  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
271   *       of System Status  register
272   */
273  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
274  BSP_bus_frequency      = 133333333;
275  BSP_processor_frequency    = 1000000000;
276  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
277  BSP_time_base_divisor      = 4000;
278
279  /* Maybe not setup yet becuase of the warning message */
280  /* Allocate and set up the page table mappings
281   * This is only available on >604 CPUs.
282   *
283   * NOTE: This setup routine may modify the available memory
284   *       size. It is essential to call it before
285   *       calculating the workspace etc.
286   */
287  pt = BSP_pgtbl_setup(&BSP_mem_size);
288  if (!pt)
289     printk("WARNING: unable to setup page tables.\n");
290
291  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
292
293  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
294
295  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
296
297  /*
298   * Initalize RTEMS IRQ system
299   */
300   BSP_rtems_irq_mng_init(0);
301
302#ifdef SHOW_LCR2_REGISTER
303  l2cr = get_L2CR();
304  printk("Initial L2CR value = %x\n", l2cr);
305#endif
306
307#ifdef SHOW_LCR3_REGISTER
308  /* L3CR needs DEC int. handler installed for bsp_delay()*/
309  l3cr = get_L3CR();
310  printk("Initial L3CR value = %x\n", l3cr);
311#endif
312
313
314  /* Activate the page table mappings only after
315   * initializing interrupts because the irq_mng_init()
316   * routine needs to modify the text
317   */
318  if (pt) {
319#ifdef SHOW_MORE_INIT_SETTINGS
320    printk("Page table setup finished; will activate it NOW...\n");
321#endif
322    BSP_pgtbl_activate(pt);
323  }
324  /* Read Configuration Vital Product Data (VPD) */
325  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
326     printk("I2Cread_eeprom() error \n");
327  else {
328#ifdef CONF_VPD
329    printk("\n");
330    for (i=0; i<150; i++) {
331      printk("%2x ", ConfVPD_buff[i]);
332      if ((i % 20)==0 ) printk("\n");
333    }
334    printk("\n");
335#endif
336  }
337
338  /*
339   * PCI 1 domain memory space
340   */
341  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
342
343
344#ifdef SHOW_MORE_INIT_SETTINGS
345  printk("Going to start PCI buses scanning and initialization\n");
346#endif
347  pci_initialize();
348#ifdef SHOW_MORE_INIT_SETTINGS
349  printk("Number of PCI buses found is : %d\n", pci_bus_count());
350#endif
351
352  /* Install our own exception handler (needs PCI) */
353  globalExceptHdl = BSP_exceptionHandler;
354
355  /* clear hostbridge errors. MCP signal is not used on the MVME5500
356   * PCI config space scanning code will trip otherwise :-(
357   */
358  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
359
360#ifdef SHOW_MORE_INIT_SETTINGS
361  printk("MSR %x \n", _read_MSR());
362  printk("Exit from bspstart\n");
363#endif
364
365}
366
367unsigned char ReadConfVPD_buff(int offset)
368{
369  return(ConfVPD_buff[offset]);
370}
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