source: rtems/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @ 07e9642c

4.104.114.9
Last change on this file since 07e9642c was 07e9642c, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 28, 2007 at 9:44:46 PM

2007-11-28 Joel Sherrill <joel.sherrill@…>

  • startup/bspstart.c: Eliminate PowerPC specific elements from the CPU Table. They have been replaced with variables named bsp_XXX as needed.
  • Property mode set to 100644
File size: 13.0 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified to support the Synergy VGM & Motorola PowerPC boards
18 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
19 *
20 *  Modified to support the MVME5500 board.
21 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
22 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003, 2004, 2005
23 * 
24 *  $Id$
25 */
26
27#include <string.h>
28#include <stdlib.h>
29#include <ctype.h>
30
31#include <rtems/system.h>
32#include <rtems/libio.h>
33#include <rtems/libcsupport.h>
34#include <rtems/powerpc/powerpc.h>
35
36#include <libcpu/spr.h>   /* registers.h is included here */
37#include <bsp.h>
38#include <bsp/uart.h>
39#include <bsp/pci.h>
40#include <libcpu/bat.h>
41#include <libcpu/pte121.h>
42#include <libcpu/cpuIdent.h>
43#include <bsp/vectors.h>
44#include <bsp/bspException.h>
45
46#include <rtems/bspIo.h>
47#include <rtems/sptables.h>
48
49#ifdef __RTEMS_APPLICATION__
50#undef __RTEMS_APPLICATION__
51#endif
52
53/*
54#define SHOW_MORE_INIT_SETTINGS
55#define SHOW_LCR1_REGISTER
56#define SHOW_LCR2_REGISTER
57#define SHOW_LCR3_REGISTER
58#define CONF_VPD
59*/
60
61/* there is no public Workspace_Free() variant :-( */
62#include <rtems/score/wkspace.h>
63
64BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
65
66extern void _return_to_ppcbug();
67extern unsigned long __rtems_end[];
68extern unsigned get_L1CR(), get_L2CR(), get_L3CR();
69extern void bsp_cleanup(void);
70extern Triv121PgTbl BSP_pgtbl_setup();
71extern void BSP_pgtbl_activate();
72extern int I2Cread_eeprom();
73extern void BSP_vme_config(void);
74
75uint32_t bsp_clicks_per_usec;
76
77SPR_RW(SPRG0)
78SPR_RW(SPRG1)
79
80typedef struct CmdLineRec_ {
81                unsigned long   size;
82                char            buf[0];
83} CmdLineRec, *CmdLine;
84
85
86#define mtspr(reg, val) \
87        __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
88
89
90#define mfspr(reg) \
91        ( { unsigned val; \
92          __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
93          val; } )
94
95/*
96 * Copy Additional boot param passed by boot loader
97 */
98#define MAX_LOADER_ADD_PARM 80
99char loaderParam[MAX_LOADER_ADD_PARM];
100
101/*
102 * Total memory using RESIDUAL DATA
103 */
104unsigned int BSP_mem_size;
105/*
106 * PCI Bus Frequency
107 */
108/*
109 * Start of the heap
110 */
111unsigned int BSP_heap_start;
112
113unsigned int BSP_bus_frequency;
114/*
115 * processor clock frequency
116 */
117unsigned int BSP_processor_frequency;
118/*
119 * Time base divisior (how many tick for 1 second).
120 */
121unsigned int BSP_time_base_divisor;
122unsigned char ConfVPD_buff[200];
123
124#define CMDLINE_BUF_SIZE        2048
125
126static char cmdline_buf[CMDLINE_BUF_SIZE];
127char *BSP_commandline_string = cmdline_buf;
128
129/*
130 * system init stack and soft ir stack size
131 */
132#define INIT_STACK_SIZE 0x1000
133#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
134
135void BSP_panic(char *s)
136{
137  printk("%s PANIC %s\n",_RTEMS_version, s);
138  __asm__ __volatile ("sc"); 
139}
140
141void _BSP_Fatal_error(unsigned int v)
142{
143  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
144  __asm__ __volatile ("sc"); 
145}
146 
147/*
148 *  The original table from the application and our copy of it with
149 *  some changes.
150 */
151
152extern rtems_configuration_table Configuration;
153
154rtems_configuration_table  BSP_Configuration;
155
156rtems_cpu_table Cpu_table;
157
158char *rtems_progname;
159
160/*
161 *  Use the shared implementations of the following routines
162 */
163 
164extern void bsp_postdriver_hook(void); /* see c/src/lib/libbsp/shared/bsppost.c */
165
166extern void bsp_libc_init( void *, uint32_t, int );
167
168extern void bsp_pretasking_hook(void);
169
170void zero_bss()
171{
172  /* prevent these from being accessed in the short data areas */
173  extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
174  extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
175  memset(__SBSS_START__, 0, ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__));
176  memset(__SBSS2_START__, 0, ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__));
177  memset(__bss_start, 0, ((unsigned) __rtems_end) - ((unsigned)__bss_start));
178}
179
180/* NOTE: we cannot simply malloc the commandline string;
181 * save_boot_params() is called during a very early stage when
182 * libc/malloc etc. are not yet initialized!
183 *
184 * Here's what we do:
185 *
186 * initial layout setup by the loader (preload.S):
187 *
188 * 0..RTEMS...__rtems_end | cmdline ....... TOP
189 *
190 * After the save_boot_params() routine returns, the stack area will be
191 * set up (start.S):
192 *
193 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
194 *
195 * initialize_executive_early() [called from boot_card()]
196 * will initialize the workspace:
197 *
198 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
199 *
200 * and later calls our pretasking_hook() which ends up initializing
201 * libc which in turn initializes the heap
202 *
203 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
204 *
205 * The idea here is to first move the commandline to the future 'heap' area
206 * from where it will be picked up by our pretasking_hook().
207 * pretasking_hook() then moves it either to INIT_STACK or the workspace
208 * area using proper allocation, initializes libc and finally moves
209 * the data to the environment / malloced areas...
210 */
211
212/* this routine is called early at shared/start/start.S
213 * and must be safe with a not properly aligned stack
214 */
215void
216save_boot_params(void *r3, void *r4, void* r5, char *cmdline_start, char *cmdline_end)
217{
218int             i=cmdline_end-cmdline_start;
219        if ( i >= CMDLINE_BUF_SIZE )
220                i = CMDLINE_BUF_SIZE-1;
221        else if ( i < 0 )
222                i = 0;
223        memmove(cmdline_buf, cmdline_start, i);
224        cmdline_buf[i]=0;
225}
226
227/*
228 *  bsp_start
229 *
230 *  This routine does the bulk of the system initialization.
231 */
232
233void bsp_start( void )
234{
235#ifdef CONF_VPD
236  int i;
237#endif
238  unsigned char *stack;
239  unsigned long  *r1sp;
240#ifdef SHOW_LCR1_REGISTER
241  unsigned l1cr;
242#endif
243#ifdef SHOW_LCR2_REGISTER
244  unsigned l2cr;
245#endif
246#ifdef SHOW_LCR3_REGISTER
247  unsigned l3cr;
248#endif
249  register uint32_t  intrStack;
250  register uint32_t *intrStackPtr;
251  unsigned char *work_space_start;
252  ppc_cpu_id_t myCpu;
253  ppc_cpu_revision_t myCpuRevision;
254  Triv121PgTbl  pt=0;
255
256  /* Till Straumann: 4/2005
257   * Need to map the system registers early, so we can printk...
258   * (otherwise we silently die)
259   */
260  /*
261   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
262   */
263  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
264
265  /* Till Straumann: 2004
266   * map the PCI 0, 1 Domain I/O space, GT64260B registers
267   * and the reserved area so that the size is the power of 2.
268   *
269   */
270  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x2000000, IO_PAGE);
271
272
273  /*
274   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
275   * store the result in global variables so that it can be used latter...
276   */
277  myCpu         = get_ppc_cpu_type();
278  myCpuRevision = get_ppc_cpu_revision();
279
280#ifdef SHOW_LCR1_REGISTER
281  l1cr = get_L1CR();
282  printk("Initial L1CR value = %x\n", l1cr); 
283#endif
284
285  /*
286   * the initial stack  has aready been set to this value in start.S
287   * so there is no need to set it in r1 again... It is just for info
288   * so that it can be printed without accessing R1.
289   */
290  stack = ((unsigned char*) __rtems_end) + INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
291
292 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
293  *((uint32_t *)stack) = 0;
294
295  /* fill stack with pattern for debugging */
296  __asm__ __volatile__("mr %0, %%r1":"=r"(r1sp));
297  while (--r1sp >= (unsigned long*)__rtems_end)
298          *r1sp=0xeeeeeeee;
299
300  /*
301   * Initialize the interrupt related settings
302   * SPRG0 = interrupt nesting level count
303   * SPRG1 = software managed IRQ stack
304   *
305   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
306   * some settings below...
307   */
308  BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE;
309  intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE;
310
311  /* make sure it's properly aligned */
312  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
313
314  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
315  intrStackPtr = (uint32_t*) intrStack;
316  *intrStackPtr = 0;
317
318  _write_SPRG1(intrStack);
319
320  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
321
322  /*
323   * Initialize default raw exception hanlders. See vectors/vectors_init.c
324   */
325  Cpu_table.exceptions_in_RAM = TRUE;
326  initialize_exceptions();
327  /*
328   * Init MMU block address translation to enable hardware
329   * access
330   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
331   */
332  printk("-----------------------------------------\n");
333  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
334  printk("-----------------------------------------\n");
335
336#ifdef TEST_RETURN_TO_PPCBUG 
337  printk("Hit <Enter> to return to PPCBUG monitor\n");
338  printk("When Finished hit GO. It should print <Back from monitor>\n");
339  debug_getc();
340  _return_to_ppcbug();
341  printk("Back from monitor\n");
342  _return_to_ppcbug();
343#endif /* TEST_RETURN_TO_PPCBUG  */
344
345#ifdef TEST_RAW_EXCEPTION_CODE 
346  printk("Testing exception handling Part 1\n");
347  /*
348   * Cause a software exception
349   */
350  __asm__ __volatile ("sc");
351  /*
352   * Check we can still catch exceptions and returned coorectly.
353   */
354  printk("Testing exception handling Part 2\n");
355  __asm__ __volatile ("sc");
356#endif 
357
358  BSP_mem_size                          =  _512M;
359  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit of System Status  register */
360  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
361  BSP_bus_frequency                     = 133333333;
362  BSP_processor_frequency               = 1000000000;
363  BSP_time_base_divisor                 = 4000;/* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
364
365
366  /* Maybe not setup yet becuase of the warning message */
367  /* Allocate and set up the page table mappings
368   * This is only available on >604 CPUs.
369   *
370   * NOTE: This setup routine may modify the available memory
371   *       size. It is essential to call it before
372   *       calculating the workspace etc.
373   */
374  pt = BSP_pgtbl_setup(&BSP_mem_size);
375  if (!pt)
376     printk("WARNING: unable to setup page tables.\n");
377
378  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size); 
379
380  /*
381   * Set up our hooks
382   * Make sure libc_init is done before drivers initialized so that
383   * they can use atexit()
384   */
385
386  Cpu_table.pretasking_hook      = bsp_pretasking_hook;    /* init libc, etc. */
387  Cpu_table.postdriver_hook      = bsp_postdriver_hook;
388  Cpu_table.do_zero_of_workspace = TRUE;
389  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
390  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
391  Cpu_table.exceptions_in_RAM    = TRUE;
392  _CPU_Table                     = Cpu_table;/* S. Kate Feng <feng1@bnl.gov>, for rtems_bsp_delay() */
393
394  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
395  printk("BSP_Configuration.work_space_size = %x\n", BSP_Configuration.work_space_size); 
396  work_space_start = 
397    (unsigned char *)BSP_mem_size - BSP_Configuration.work_space_size;
398
399  if ( work_space_start <= ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) {
400    printk( "bspstart: Not enough RAM!!!\n" );
401    bsp_cleanup();
402  }
403
404  BSP_Configuration.work_space_start = work_space_start;
405
406  /*
407   * Initalize RTEMS IRQ system
408   */
409   BSP_rtems_irq_mng_init(0);
410
411#ifdef SHOW_LCR2_REGISTER
412  l2cr = get_L2CR();
413  printk("Initial L2CR value = %x\n", l2cr);
414#endif 
415
416#ifdef SHOW_LCR3_REGISTER
417  /* L3CR needs DEC int. handler installed for bsp_delay()*/
418  l3cr = get_L3CR();
419  printk("Initial L3CR value = %x\n", l3cr);
420#endif 
421
422
423  /* Activate the page table mappings only after
424   * initializing interrupts because the irq_mng_init()
425   * routine needs to modify the text
426   */           
427  if (pt) {
428#ifdef SHOW_MORE_INIT_SETTINGS
429    printk("Page table setup finished; will activate it NOW...\n");
430#endif
431    BSP_pgtbl_activate(pt);
432  }
433
434  /*
435   * PCI 1 domain memory space
436   */
437  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
438 
439
440#ifdef SHOW_MORE_INIT_SETTINGS
441  printk("Going to start PCI buses scanning and initialization\n");
442#endif 
443  pci_initialize();
444#ifdef SHOW_MORE_INIT_SETTINGS
445  printk("Number of PCI buses found is : %d\n", pci_bus_count());
446#endif
447
448  /* Install our own exception handler (needs PCI) */
449  globalExceptHdl = BSP_exceptionHandler;
450
451  /* clear hostbridge errors. MCP signal is not used on the MVME5500
452   * PCI config space scanning code will trip otherwise :-(
453   */
454  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
455
456  /* Read Configuration Vital Product Data (VPD) */
457  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
458     printk("I2Cread_eeprom() error \n");
459  else {
460#ifdef CONF_VPD
461    printk("\n");
462    for (i=0; i<150; i++) {
463      printk("%2x ", ConfVPD_buff[i]); 
464      if ((i % 20)==0 ) printk("\n");
465    }
466    printk("\n");
467#endif
468  }
469
470#ifdef SHOW_MORE_INIT_SETTINGS
471  printk("MSR %x \n", _read_MSR());
472  printk("Exit from bspstart\n");
473#endif
474
475}
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