source: rtems/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @ 06d14130

4.104.115
Last change on this file since 06d14130 was 06d14130, checked in by Thomas Doerfler <Thomas.Doerfler@…>, on Mar 27, 2010 at 9:09:08 PM

correct prototypes

  • Property mode set to 100644
File size: 10.1 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2007.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified to support the Synergy VGM & Motorola PowerPC boards
18 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
19 *
20 *  Modified to support the MVME5500 board.
21 *  Also, the settings of L1, L2, and L3 caches is not necessary here.
22 *  (C) by Brookhaven National Lab., S. Kate Feng <feng1@bnl.gov>, 2003-2009
23 *
24 *  $Id$
25 */
26
27#include <string.h>
28#include <stdlib.h>
29#include <ctype.h>
30
31#include <rtems/system.h>
32#include <rtems/powerpc/powerpc.h>
33
34#include <libcpu/spr.h>   /* registers.h is included here */
35#include <bsp.h>
36#include <bsp/uart.h>
37#include <bsp/pci.h>
38#include <libcpu/bat.h>
39#include <libcpu/pte121.h>
40#include <libcpu/cpuIdent.h>
41#include <bsp/vectors.h>
42#include <bsp/bspException.h>
43
44#include <rtems/bspIo.h>
45#include <rtems/sptables.h>
46
47/*
48#define SHOW_MORE_INIT_SETTINGS
49#define SHOW_LCR1_REGISTER
50#define SHOW_LCR2_REGISTER
51#define SHOW_LCR3_REGISTER
52#define CONF_VPD
53*/
54
55/* there is no public Workspace_Free() variant :-( */
56#include <rtems/score/wkspace.h>
57
58extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
59
60
61BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
62
63extern void _return_to_ppcbug(void);
64extern unsigned long __rtems_end[];
65extern unsigned get_L1CR(void), get_L2CR(void), get_L3CR(void);
66extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
67extern void BSP_pgtbl_activate(Triv121PgTbl);
68extern int I2Cread_eeprom(unsigned char I2cBusAddr, uint32_t devA2A1A0, uint32_t AddrBytes, unsigned char *pBuff, uint32_t numBytes);
69extern void BSP_vme_config(void);
70
71extern unsigned char ReadConfVPD_buff(int offset);
72
73extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
74extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
75
76uint32_t bsp_clicks_per_usec;
77
78SPR_RW(SPRG1)
79
80typedef struct CmdLineRec_ {
81    unsigned long  size;
82    char           buf[0];
83} CmdLineRec, *CmdLine;
84
85
86#define mtspr(reg, val)  \
87  __asm __volatile("mtspr %0,%1" : : "K"(reg), "r"(val))
88
89
90#define mfspr(reg) \
91  ( { unsigned val; \
92    __asm __volatile("mfspr %0,%1" : "=r"(val) : "K"(reg)); \
93    val; } )
94
95/*
96 * Copy Additional boot param passed by boot loader
97 */
98#define MAX_LOADER_ADD_PARM 80
99char loaderParam[MAX_LOADER_ADD_PARM];
100
101/*
102 * Total memory using RESIDUAL DATA
103 */
104unsigned int BSP_mem_size;
105/*
106 * PCI Bus Frequency
107 */
108unsigned int BSP_bus_frequency;
109/*
110 * processor clock frequency
111 */
112unsigned int BSP_processor_frequency;
113/*
114 * Time base divisior (how many tick for 1 second).
115 */
116unsigned int BSP_time_base_divisor;
117static unsigned char ConfVPD_buff[200];
118
119#define CMDLINE_BUF_SIZE  2048
120
121static char cmdline_buf[CMDLINE_BUF_SIZE];
122char *BSP_commandline_string = cmdline_buf;
123
124void BSP_panic(char *s)
125{
126  printk("%s PANIC %s\n",_RTEMS_version, s);
127  __asm__ __volatile ("sc");
128}
129
130void _BSP_Fatal_error(unsigned int v)
131{
132  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
133  __asm__ __volatile ("sc");
134}
135
136void zero_bss(void)
137{
138  memset(
139    __SBSS_START__,
140    0,
141    ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
142  );
143  memset(
144    __SBSS2_START__,
145    0,
146    ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
147  );
148  memset(
149    __bss_start,
150    0,
151    ((unsigned) __rtems_end) - ((unsigned)__bss_start)
152  );
153}
154
155/* NOTE: we cannot simply malloc the commandline string;
156 * save_boot_params() is called during a very early stage when
157 * libc/malloc etc. are not yet initialized!
158 *
159 * Here's what we do:
160 *
161 * initial layout setup by the loader (preload.S):
162 *
163 * 0..RTEMS...__rtems_end | cmdline ....... TOP
164 *
165 * After the save_boot_params() routine returns, the stack area will be
166 * set up (start.S):
167 *
168 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ..... TOP
169 *
170 * initialize_executive_early() [called from boot_card()]
171 * will initialize the workspace:
172 *
173 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | ...... | workspace | TOP
174 *
175 * and later calls our pretasking_hook() which ends up initializing
176 * libc which in turn initializes the heap
177 *
178 * 0..RTEMS..__rtems_end | INIT_STACK | IRQ_STACK | heap | workspace | TOP
179 *
180 * The idea here is to first move the commandline to the future 'heap' area
181 * from where it will be picked up by our pretasking_hook().
182 * pretasking_hook() then moves it either to INIT_STACK or the workspace
183 * area using proper allocation, initializes libc and finally moves
184 * the data to the environment / malloced areas...
185 */
186
187/* this routine is called early at shared/start/start.S
188 * and must be safe with a not properly aligned stack
189 */
190char *
191save_boot_params(
192  void *r3,
193  void *r4,
194  void* r5,
195  char *cmdline_start,
196  char *cmdline_end
197)
198{
199  int i=cmdline_end-cmdline_start;
200
201  if ( i >= CMDLINE_BUF_SIZE )
202    i = CMDLINE_BUF_SIZE-1;
203  else if ( i < 0 )
204    i = 0;
205
206  memmove(cmdline_buf, cmdline_start, i);
207  cmdline_buf[i]=0;
208  return cmdline_buf;
209}
210
211/*
212 *  bsp_start
213 *
214 *  This routine does the bulk of the system initialization.
215 */
216
217void bsp_start( void )
218{
219  rtems_status_code sc = RTEMS_SUCCESSFUL;
220#ifdef CONF_VPD
221  int i;
222#endif
223#ifdef SHOW_LCR1_REGISTER
224  unsigned l1cr;
225#endif
226#ifdef SHOW_LCR2_REGISTER
227  unsigned l2cr;
228#endif
229#ifdef SHOW_LCR3_REGISTER
230  unsigned l3cr;
231#endif
232  uintptr_t intrStackStart;
233  uintptr_t intrStackSize;
234  ppc_cpu_id_t myCpu;
235  ppc_cpu_revision_t myCpuRevision;
236  Triv121PgTbl  pt=0;
237
238  /* Till Straumann: 4/2005
239   * Need to map the system registers early, so we can printk...
240   * (otherwise we silently die)
241   */
242  /*
243   * Kate Feng : PCI 0 domain memory space, want to leave room for the VME window
244   */
245  setdbat(2, PCI0_MEM_BASE, PCI0_MEM_BASE, 0x10000000, IO_PAGE);
246
247  /* Till Straumann: 2004
248   * map the PCI 0, 1 Domain I/O space, GT64260B registers
249   * and the reserved area so that the size is the power of 2.
250   * 2009 : map the entire 256 M space
251   *
252   */
253  setdbat(3,PCI0_IO_BASE, PCI0_IO_BASE, 0x10000000, IO_PAGE);
254
255
256  /*
257   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
258   * store the result in global variables so that it can be used latter...
259   */
260  myCpu   = get_ppc_cpu_type();
261  myCpuRevision = get_ppc_cpu_revision();
262
263#ifdef SHOW_LCR1_REGISTER
264  l1cr = get_L1CR();
265  printk("Initial L1CR value = %x\n", l1cr);
266#endif
267
268  /*
269   * Initialize the interrupt related settings.
270   */
271  intrStackStart = (uintptr_t) __rtems_end;
272  intrStackSize = rtems_configuration_get_interrupt_stack_size();
273
274  /*
275   * Initialize default raw exception handlers.
276   */
277  sc = ppc_exc_initialize(
278    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
279    intrStackStart,
280    intrStackSize
281  );
282  if (sc != RTEMS_SUCCESSFUL) {
283    BSP_panic("cannot initialize exceptions");
284  }
285
286  /*
287   * Init MMU block address translation to enable hardware
288   * access
289   * More PCI1 memory mapping to be done after BSP_pgtbl_activate.
290   */
291  printk("-----------------------------------------\n");
292  printk("Welcome to %s on MVME5500-0163\n", _RTEMS_version );
293  printk("-----------------------------------------\n");
294
295  BSP_mem_size         =  probeMemoryEnd();
296  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
297   *       of System Status  register
298   */
299  /* rtems_bsp_delay_in_bus_cycles are defined in registers.h */
300  BSP_bus_frequency      = 133333333;
301  BSP_processor_frequency    = 1000000000;
302  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
303  BSP_time_base_divisor      = 4000;
304
305
306  /* Maybe not setup yet becuase of the warning message */
307  /* Allocate and set up the page table mappings
308   * This is only available on >604 CPUs.
309   *
310   * NOTE: This setup routine may modify the available memory
311   *       size. It is essential to call it before
312   *       calculating the workspace etc.
313   */
314  pt = BSP_pgtbl_setup(&BSP_mem_size);
315  if (!pt)
316     printk("WARNING: unable to setup page tables.\n");
317
318  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
319
320  /* P94 : 7455 TB/DECR is clocked by the system bus clock frequency */
321
322  bsp_clicks_per_usec    = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
323
324  /*
325   * Initalize RTEMS IRQ system
326   */
327   BSP_rtems_irq_mng_init(0);
328
329#ifdef SHOW_LCR2_REGISTER
330  l2cr = get_L2CR();
331  printk("Initial L2CR value = %x\n", l2cr);
332#endif
333
334#ifdef SHOW_LCR3_REGISTER
335  /* L3CR needs DEC int. handler installed for bsp_delay()*/
336  l3cr = get_L3CR();
337  printk("Initial L3CR value = %x\n", l3cr);
338#endif
339
340
341  /* Activate the page table mappings only after
342   * initializing interrupts because the irq_mng_init()
343   * routine needs to modify the text
344   */
345  if (pt) {
346#ifdef SHOW_MORE_INIT_SETTINGS
347    printk("Page table setup finished; will activate it NOW...\n");
348#endif
349    BSP_pgtbl_activate(pt);
350  }
351  /* Read Configuration Vital Product Data (VPD) */
352  if ( I2Cread_eeprom(0xa8, 4,2, &ConfVPD_buff[0], 150))
353     printk("I2Cread_eeprom() error \n");
354  else {
355#ifdef CONF_VPD
356    printk("\n");
357    for (i=0; i<150; i++) {
358      printk("%2x ", ConfVPD_buff[i]);
359      if ((i % 20)==0 ) printk("\n");
360    }
361    printk("\n");
362#endif
363  }
364
365  /*
366   * PCI 1 domain memory space
367   */
368  setdbat(1, PCI1_MEM_BASE, PCI1_MEM_BASE, 0x10000000, IO_PAGE);
369
370
371#ifdef SHOW_MORE_INIT_SETTINGS
372  printk("Going to start PCI buses scanning and initialization\n");
373#endif
374  pci_initialize();
375#ifdef SHOW_MORE_INIT_SETTINGS
376  printk("Number of PCI buses found is : %d\n", pci_bus_count());
377#endif
378
379  /* Install our own exception handler (needs PCI) */
380  globalExceptHdl = BSP_exceptionHandler;
381
382  /* clear hostbridge errors. MCP signal is not used on the MVME5500
383   * PCI config space scanning code will trip otherwise :-(
384   */
385  _BSP_clear_hostbridge_errors(0, 1 /*quiet*/);
386
387#ifdef SHOW_MORE_INIT_SETTINGS
388  printk("MSR %x \n", _read_MSR());
389  printk("Exit from bspstart\n");
390#endif
391
392}
393
394unsigned char ReadConfVPD_buff(int offset)
395{
396  return(ConfVPD_buff[offset]);
397}
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