source: rtems/c/src/lib/libbsp/powerpc/mvme5500/start/start.S @ 820d1ab0

4.104.115
Last change on this file since 820d1ab0 was 820d1ab0, checked in by Chris Johns <chrisj@…>, on 04/28/09 at 06:34:00

2009-04-28 Chris Johns <chrisj@…>

  • start/start.S: Update for boot_card command line change.
  • Property mode set to 100644
File size: 4.1 KB
Line 
1/*
2 *  start.S :     RTEMS entry point
3 *
4 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
5 *
6 *  S. Kate Feng <feng1@bnl.gov>, April 2004
7 *  Mapped the 2nd 256MB of RAM to support the MVME5500 boards.
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *
14 */
15
16#warning Call to boot_card has changed and needs checking.
17#warning The call is "void boot_card(const char* cmdline);"
18#warning You need to pass a NULL.
19#warning Please check and remove these warnings.
20       
21#include <rtems/asm.h>
22#include <rtems/score/cpu.h>
23#include <rtems/powerpc/powerpc.h>
24#include <libcpu/io.h>
25#include <libcpu/bat.h>
26
27#define SYNC \
28        sync; \
29        isync
30
31#define KERNELBASE      0x0
32#define MEM256MB        0x10000000
33       
34#define MONITOR_ENTER                   \
35        mfmsr   r10             ;       \
36        ori     r10,r10,MSR_IP  ;       \
37        mtmsr   r10             ;       \
38        li      r10,0x63        ;       \
39        sc
40
41               
42        .text
43        .globl  __rtems_entry_point
44        .type   __rtems_entry_point,@function
45__rtems_entry_point:
46#ifdef DEBUG_EARLY_START
47        MONITOR_ENTER
48#endif 
49               
50/*
51 * PREP
52 * This is jumped to on prep systems right after the kernel is relocated
53 * to its proper place in memory by the boot loader.  The expected layout
54 * of the regs is:     
55 *   r3: ptr to residual data
56 *   r4: initrd_start or if no initrd then 0
57 *   r5: initrd_end - unused if r4 is 0
58 *   r6: Start of command line string
59 *   r7: End of command line string
60 *
61 *   The Prep boot loader insure that the MMU is currently off...
62 *
63 */
64       
65        mr      r31,r3                  /* save parameters */
66        mr      r30,r4
67        mr      r29,r5
68        mr      r28,r6
69        mr      r27,r7
70        /*
71         * Make sure we have nothing in BATS and TLB
72         */
73        bl      CPU_clear_bats_early
74        bl      flush_tlbs
75/*
76 * Use the first pair of BAT registers to map the 1st 256MB
77 * of RAM to KERNELBASE.
78 */
79        lis     r11,KERNELBASE@h
80        ori     r11,r11,0x1ffe          /* set up BAT0 registers for 604+ */
81        li      r8,2                    /* R/W access */
82        isync
83        mtspr   DBAT0L,r8               /* N.B. 6xx (not 601) have valid */
84        mtspr   DBAT0U,r11              /* bit in upper BAT register */
85        mtspr   IBAT0L,r8
86        mtspr   IBAT0U,r11
87        isync
88/*
89 * Use the 2nd pair of BAT registers to map the 2nd 256MB
90 * of RAM to 0x10000000. <SKF>
91 */
92        lis     r11,MEM256MB@h
93        ori     r11,r11,0x1ffe          /* set up BAT1 registers for 604+ */
94        lis     r8,MEM256MB@h
95        ori     r8,r8,2
96        isync
97        mtspr   DBAT1L,r8               /* N.B. 6xx (not 601) have valid */
98        mtspr   DBAT1U,r11              /* bit in upper BAT register */
99        mtspr   IBAT1L,r8
100        mtspr   IBAT1U,r11     
101        isync
102
103/*
104 * we now have the two 256M of ram mapped with the bats. We are still
105 * running on the bootloader stack and cannot switch to an RTEMS allocated
106 * init stack before copying the residual data that may have been set just
107 * after rtems_end address. This bug has been experienced on MVME2304. Thank
108 * to Till Straumann <strauman@SLAC.Stanford.EDU> for hunting it and
109 * suggesting the appropriate code.
110 */
111       
112enter_C_code:
113        bl      MMUon
114        bl  __eabi      /* setup EABI and SYSV environment */
115        bl      zero_bss
116        /*
117         * restore prep boot params
118         */
119        mr      r3,r31
120        mr      r4,r30
121        mr      r5,r29
122        mr      r6,r28
123        mr      r7,r27
124        bl      save_boot_params
125        /*
126         * stack = &__rtems_end + 4096
127         */
128        addis   r9,r0, __rtems_end+(4096-PPC_MINIMUM_STACK_FRAME_SIZE)@ha
129        addi    r9,r9, __rtems_end+(4096-PPC_MINIMUM_STACK_FRAME_SIZE)@l
130        mr      r1, r9
131        /*
132         * We are know in a environment that is totally independent from bootloader setup.
133         */
134        li      r3, 0                   /* command line */
135        bl      boot_card
136        bl      _return_to_ppcbug
137       
138        .globl  MMUon
139        .type   MMUon,@function
140MMUon: 
141        mfmsr   r0
142#if (PPC_HAS_FPU == 0)
143        ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
144        xori    r0, r0, MSR_EE | MSR_IP | MSR_FP
145#else
146        ori     r0,r0, MSR_IP | MSR_RI | MSR_IR | MSR_DR | MSR_EE | MSR_FE0 | MSR_FE1 | MSR_FP
147        xori    r0, r0, MSR_EE | MSR_IP | MSR_FE0 | MSR_FE1
148#endif
149        mflr    r11
150        mtsrr0  r11
151        mtsrr1  r0
152        SYNC
153        rfi
154       
155        .globl  MMUoff
156        .type   MMUoff,@function
157MMUoff:
158        mfmsr   r0
159        ori     r0,r0,MSR_IR| MSR_DR | MSR_IP
160        mflr    r11
161        xori    r0,r0,MSR_IR|MSR_DR
162        mtsrr0  r11
163        mtsrr1  r0
164        SYNC
165        rfi
166
167        .globl  _return_to_ppcbug
168        .type   _return_to_ppcbug,@function
169
170       
171_return_to_ppcbug:
172        mflr    r30
173        bl      MMUoff
174        MONITOR_ENTER
175        bl      MMUon
176        mtctr   r30
177        bctr   
178
179flush_tlbs:
180        lis     r20, 0x1000
1811:      addic.  r20, r20, -0x1000
182        tlbie   r20
183        bgt     1b
184        sync
185        blr
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