source: rtems/c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c @ 46a6fa91

4.104.114.84.95
Last change on this file since 46a6fa91 was 7be6ad9, checked in by Eric Norum <WENorum@…>, on 10/20/04 at 15:21:05

Add MVME550 BSP

  • Property mode set to 100644
File size: 1.9 KB
Line 
1/*
2 * detect_host_bridge.c
3 *
4 * This code is inspired by detect_grackle_bridge.c of SVGM BSP
5 * written by Till Straumann
6 * Copyright (C) 2001, 2003 Till Straumann <strauman@slac.stanford.edu>
7 *
8 * Copyright (C) 2004 S. Kate Feng, <feng1@bnl.gov>
9 * wrote it to support the MVME5500 board.
10 *
11 */
12#include <libcpu/io.h>
13#include <rtems/bspIo.h>            /* printk */
14
15#include <bsp/pci.h>
16#include <bsp/gtreg.h>
17#include <bsp/gtpcireg.h>
18
19#include <stdio.h>
20#include <string.h>
21
22#define PCI_DEBUG 0
23
24#define PCI_INVALID_VENDORDEVICEID      0xffffffff
25#define PCI_MULTI_FUNCTION              0x80
26#define HOSTBRIDGET_ERROR               0xf0000000
27
28unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet)
29{
30  unsigned int pcidata, pcidata1;
31  int PciNumber;
32 
33  /* On the mvme5500 board, the GT64260B system controller had the MCP
34   * signal pulled up high.  Thus, the MCP signal is not used as it is
35   * on other boards such as mvme2307.
36   */
37  if (enableMCP) return(-1);
38  for (PciNumber=0; PciNumber<1; PciNumber++) {
39     PCIx_read_config_dword(PciNumber, 0,
40                        0,
41                        0,
42                PCI0_COMMAND+(PciNumber * 0x80),
43                        &pcidata);
44
45    if (!quiet)
46    printk("Before _BSP_clear_hostbridge_errors(): 0x%x, cause 0x%x\n",
47           pcidata, inl(0x1d58));
48
49    outl(0,0x1d58);
50
51    /* Clear the error on the host bridge */
52    pcidata1= pcidata;
53    pcidata1 |= PCI_STATUS_CLRERR_MASK;
54    pcidata1 |= 0x140;
55    PCIx_write_config_dword(PciNumber, 0,
56                               0,
57                               0,
58                          PCI0_COMMAND+(PciNumber * 0x80),
59                          pcidata1);
60
61    PCIx_read_config_dword(PciNumber, 0,
62                               0,
63                               0,
64                          PCI0_COMMAND+(PciNumber * 0x80),
65                          &pcidata1);
66
67    if (!quiet) printk("After _BSP_clear_hostbridge_errors(): sts 0x%x\n",
68                        pcidata1);
69    if (pcidata1 & HOSTBRIDGET_ERROR) printk("BSP_clear_hostbridge_errors(): unable to clear pending hostbridge errors\n");
70  }
71  return(pcidata &  HOSTBRIDGET_ERROR);
72}
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