source: rtems/c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/pci_map.c @ d7196bf

4.8
Last change on this file since d7196bf was d7196bf, checked in by Joel Sherrill <joel.sherrill@…>, on 05/04/09 at 20:06:43

2009-04-20 Kate Feng <feng1@…>

1396/bsps

  • pci/pci.c : Updated it to be consistent with the original pci.c
  • written by Eric Valette. There is no change in its function.
  • irq/irq_init.c : set defaultIrq->next_handler to be 0
  • for BSP_SHARED_HANDLER_SUPPORT.
  • network/if_1GHz/if_wm.c : fixed some bugs in the 1GHz driver.
  • irq/BSP_irq.c : added supports for shared IRQ.
  • pci/pci_interface.c : Enabled PCI "Read", "Read Line", and "Read Multiple"
  • Agressive Prefetch to improve the performance of the PCI based
  • applications (e.g. 1GHz NIC).
  • irq/BSP_irq.c : Replaced the irq/irq.c, and used GT_GPP_Value
  • register to monitor the cause of the level sensitive interrupts.
  • This unique solution solves various bugs in the 1GHz network drivers
  • Fixed bugs in compute_pic_masks_from_prio()
  • Property mode set to 100644
File size: 3.5 KB
Line 
1/*      $NetBSD: pci_map.c,v 1.12 2002/05/30 12:06:43 drochner Exp $    */
2
3/*-
4 * Copyright (c) 2004, 2005  Brookhaven National  Laboratory
5 *               S. Kate Feng <feng1@bnl.gov>
6 *               under the Deaprtment of Energy contract DE-AC02-98CH10886
7 *
8 * Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
9 * All rights reserved.
10 *
11 * This code is derived from software contributed to The NetBSD Foundation
12 * by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe.
13 *
14 */
15
16/*
17 * PCI device mapping.
18 */
19
20#include <sys/cdefs.h>
21#include <sys/param.h>
22#include <sys/systm.h>
23#include <rtems/rtems/types.h>
24
25#include <bsp/pci.h>
26#include <bsp/pcireg.h>
27
28int pci_io_find(int b, int d, int f, int reg,unsigned *basep,unsigned *sizep)
29{
30  uint32_t address, mask;
31
32  if (reg < PCI_MAPREG_START ||
33#if 0
34            /*
35             * Can't do this check; some devices have mapping registers
36             * way out in left field.
37             */
38            reg >= PCI_MAPREG_END ||
39#endif
40            (reg & 3))
41                rtems_panic("pci_io_find: bad request");
42
43  /*
44   * Section 6.2.5.1, `Address Maps', tells us that:
45   *
46   * 1) The builtin software should have already mapped the device in a
47   * reasonable way.
48   *
49   * 2) A device which wants 2^n bytes of memory will hardwire the bottom
50   * n bits of the address to 0.  As recommended, we write all 1s and see
51   * what we get back.
52   */
53  pci_read_config_dword(b,d,f,reg, &address);
54  if ( !(address & PCI_MAPREG_TYPE_IO)) return(1);
55  pci_write_config_dword(b,d,f,reg, 0xffffffff);
56  pci_read_config_dword(b,d,f,reg,&mask);
57  pci_write_config_dword(b,d,f,reg, address);
58
59  if ( (*sizep = PCI_MAPREG_IO_SIZE(mask))== 0) {
60     printk("pci_io_find: void region\n");
61     return(1);
62  }
63  *basep = PCI_MAPREG_IO_ADDR(address);
64  return(0);
65}
66
67int pci_mem_find(int b, int d, int f, int reg, unsigned *basep,unsigned *sizep)
68{
69  uint32_t address, mask;
70
71  if (reg < PCI_MAPREG_START ||
72#if 0
73            /*
74             * Can't do this check; some devices have mapping registers
75             * way out in left field.
76             */
77            reg >= PCI_MAPREG_END ||
78#endif
79            (reg & 3))
80      rtems_panic("pci_mem_find: bad request");
81
82  pci_read_config_dword(b,d,f,reg, &address);
83  if (address & PCI_MAPREG_TYPE_IO) {
84     printk("pci_mem_find: expected type mem, found I/O\n");
85     return(1);
86  }
87
88  /*
89   * Section 6.2.5.1, `Address Maps', tells us that:
90   *
91   * 1) The builtin software should have already mapped the device in a
92   * reasonable way.
93   *
94   * 2) A device which wants 2^n bytes of memory will hardwire the bottom
95   * n bits of the address to 0.  As recommended, we write all 1s and see
96   * what we get back.
97   */
98  pci_write_config_dword(b,d,f,reg, 0xffffffff);
99  pci_read_config_dword(b,d,f,reg,&mask);
100  pci_write_config_dword(b,d,f,reg, address);
101  if ( (*sizep = PCI_MAPREG_MEM_SIZE(mask))== 0) {
102     printk("pci_io_find: void region\n");
103     return (1);
104  }
105  *basep = PCI_MAPREG_MEM_ADDR(address);
106  return(0);
107}
108
109int pci_get_capability(int b, int d, int f, int capid,int *offset,uint32_t *value)
110{
111  uint32_t reg, ofs;
112
113  /*  i82544EI PCI_CAPLISTPTR_REG */
114  pci_read_config_dword(b,d,f,PCI_CAPLISTPTR_REG, &reg);   
115  ofs = PCI_CAPLIST_PTR(reg);
116  while (ofs != 0) {
117#ifdef DIAGNOSTIC
118    if ((ofs & 3) || (ofs < 0x40))
119       panic("pci_get_capability");
120#endif
121    pci_read_config_dword(b,d,f,ofs, &reg);
122    if (PCI_CAPLIST_CAP(reg) == capid) {
123       if (offset)
124           *offset = ofs;
125       if (value)
126           *value = reg;
127       return (1);
128    }
129    ofs = PCI_CAPLIST_NEXT(reg);
130  }
131  return (0);
132}
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