source: rtems/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c @ cf599996

4.9
Last change on this file since cf599996 was cf599996, checked in by Joel Sherrill <joel.sherrill@…>, on 05/08/09 at 18:22:51

2009-05-08 Kate Feng <feng1@…>

PR1395/bsps

  • Updated the changes from RTEMS-4.8.0, which were made since Oct. 2007.
  • network/if_1GHz/if_wm.c: fixed some bugs in the 1GHz driver.
  • pci/pci_interface.c: + Enabled PCI "Read", "Read Line", and "Read Multiple" + Agressive Prefetch to improve the performance of the PCI based

applications (e.g. 1GHz NIC).

  • irq/BSP_irq.c : Replaced the irq/irq.c, and used GT_GPP_Value register to monitor the cause of the level sensitive interrupts. This unique solution solves various bugs in the 1GHz network drivers Fixed bugs in compute_pic_masks_from_prio()
  • pci/pci.c : Updated it to be consistent with the original pci.c
  • written by Eric Valette. There is no change in its function.
  • irq/irq_init.c : set defaultIrq->next_handler to be 0
  • for BSP_SHARED_HANDLER_SUPPORT.
  • Property mode set to 100644
File size: 44.0 KB
Line 
1/* GT64260eth.c : GT64260 10/100 Mb ethernet MAC driver
2 *
3 * Copyright (c) 2003,2004 Brookhaven National  Laboratory
4 *               S. Kate Feng <feng1@bnl.gov>
5 * All rights reserved
6 *
7 * Acknowledgements:
8 * netBSD : Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
9 * Marvell : NDA document for the discovery system controller
10 *
11 * Some notes from the author, S. Kate Feng :
12 *
13 * 1) Mvme5500 uses Eth0 (controller 0) of the GT64260 to implement
14 *    the 10/100 BaseT Ethernet with PCI Master Data Byte Swap\
15 *    control.
16 * 2) Implemented hardware snoop instead of software snoop
17 *    to ensure SDRAM cache coherency. (Copyright : NDA item)
18 * 3) Added S/W support for multi mbuf.  (TODO : Let the H/W do it)
19 *   
20 */
21#define BYTE_ORDER BIG_ENDIAN
22
23#define INET
24
25#include <rtems.h>
26#include <rtems/bspIo.h>            /* printk */
27#include <stdio.h>                  /* printf for statistics */
28#include <string.h>
29
30#include <libcpu/io.h>              /* inp & friends */
31#include <libcpu/spr.h>             /* registers.h is included here */
32#include <bsp.h>
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/mbuf.h>
37
38#include <rtems/rtems_bsdnet.h>
39#include <rtems/rtems_bsdnet_internal.h>
40#include <rtems/error.h>           
41#include <errno.h>
42
43#include <rtems/rtems/types.h>
44
45#include <sys/queue.h>
46
47#include <sys/ioctl.h>
48#include <sys/socket.h>
49#include <sys/sockio.h>             /* SIOCADDMULTI, SIOC...     */
50#include <net/if.h>
51#include <net/if_dl.h>
52#include <netinet/in.h>
53#include <netinet/if_ether.h>
54
55#ifdef INET
56#include <netinet/in_var.h>
57#endif
58
59#include <bsp/irq.h>
60#include <bsp/GT64260ethreg.h>
61#include <bsp/GT64260eth.h>
62#include <bsp/VPD.h>
63
64#define GT_ETH_TASK_NAME  "Geth"
65#define PKT_BUF_SZ 1536
66#define SOFTC_ALIGN  31   
67#define HASH_ALIGN   15   
68
69#define TXQ_HiLmt_OFF 2
70
71/* <skf>
72 * 1. printk debug is for diagnosis only, which may cause
73 * unexpected result, especially if txq is under heavy load
74 * because CPU is fast with a decent cache.
75 */
76#define GTeth_debug 0
77#define GTeth_rx_debug 0
78
79#if 0
80#define GE_FORGOT
81#define GE_NORX
82#define GT_DEBUG
83#endif
84
85/* RTEMS event to kill the daemon */
86#define KILL_EVENT              RTEMS_EVENT_1
87/* RTEMS event to (re)start the transmitter */
88#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
89/* RTEMS events used by the ISR */
90#define RX_EVENT                RTEMS_EVENT_3
91#define TX_EVENT                RTEMS_EVENT_4
92#define ERR_EVENT               RTEMS_EVENT_5
93
94#define ALL_EVENTS (KILL_EVENT|START_TRANSMIT_EVENT|RX_EVENT|TX_EVENT|ERR_EVENT)
95
96enum GTeth_whack_op {
97        GE_WHACK_START,         GE_WHACK_RESTART,
98        GE_WHACK_CHANGE,        GE_WHACK_STOP
99};
100
101enum GTeth_hash_op {
102        GE_HASH_ADD,            GE_HASH_REMOVE,
103};
104
105#define ET_MINLEN 64            /* minimum message length */
106
107static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
108static void GTeth_ifstart (struct ifnet *);
109static void GTeth_ifchange(struct GTeth_softc *sc);
110static void GTeth_init_rx_ring(struct GTeth_softc *sc);
111static void GT64260eth_daemon(void *arg);
112static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m);
113static unsigned GTeth_txq_done(struct GTeth_softc *sc);
114static void GTeth_tx_cleanup(struct GTeth_softc *sc);
115static void GTeth_tx_start(struct GTeth_softc *sc);
116static void GTeth_tx_stop(struct GTeth_softc *sc);
117static void GTeth_rx_cleanup(struct GTeth_softc *sc);
118static int GT64260eth_rx(struct GTeth_softc *sc);
119static void GTeth_rx_setup(struct GTeth_softc *sc);
120static void GTeth_rxprio_setup(struct GTeth_softc *sc);
121static void GTeth_rx_stop(struct GTeth_softc *dc);
122static void GT64260eth_isr(void);
123static int GTeth_hash_compute(struct GTeth_softc *sc,unsigned char eaddr[ETHER_ADDR_LEN]);
124static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
125        enum GTeth_rxprio prio,unsigned char eaddr[ETHER_ADDR_LEN]);
126
127static int GTeth_hash_fill(struct GTeth_softc *sc);
128static void GTeth_hash_init(struct GTeth_softc *sc);
129
130static struct GTeth_softc *root_GT64260eth_dev = NULL;
131
132static void GT64260eth_irq_on(const rtems_irq_connect_data *irq)
133{
134  struct GTeth_softc *sc;
135
136  for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module) {
137    outl(0x30883444,ETH0_EIMR); /* MOTLoad default interrupt mask */
138    return;
139  } 
140}
141
142static void GT64260eth_irq_off(const rtems_irq_connect_data *irq)
143{
144  struct GTeth_softc *sc;
145
146  for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module)
147      outl(0, ETH0_EIMR);
148}
149
150static int GT64260eth_irq_is_on(const rtems_irq_connect_data *irq)
151{
152  return(inl(ETH0_EICR) & ETH_IR_EtherIntSum);
153}
154
155static void GT64260eth_isr(void)
156{
157  struct GTeth_softc *sc = root_GT64260eth_dev;
158  rtems_event_set  events=0;
159  uint32_t cause;
160
161
162  cause = inl(ETH0_EICR);
163  outl( ~cause,ETH0_EICR);  /* clear the ICR */
164
165  if ( (!cause) || (cause & 0x803d00)) {
166       sc->intr_errsts[sc->intr_err_ptr2++]=cause;
167       sc->intr_err_ptr2 %=INTR_ERR_SIZE;   /* Till Straumann */
168       events |= ERR_EVENT;
169  } 
170
171  /* ETH_IR_RxBuffer_3|ETH_IR_RxError_3 */
172  if (cause & 0x880000) {
173     sc->stats.rxInterrupts++;
174     events |= RX_EVENT;
175  }
176  /* If there is an error, we want to continue to next descriptor */
177  /* ETH_IR_TxBufferHigh|ETH_IR_TxEndHigh|ETH_IR_TxErrorHigh */
178  if (cause & 0x444) {
179       sc->stats.txInterrupts++;
180       events |= TX_EVENT;
181       /* It seems to be unnecessary. However, it's there
182        * to be on the safe side due to the datasheet.
183        * So far, it does not seem to affect the network performance
184        * based on the EPICS catime.
185        */
186       /* ETH_ESDCMR_TXDH | ETH_ESDCMR_ERD = 0x800080 */
187       if ((sc->txq_nactive > 1)&& ((inl(ETH0_ESDCMR)&ETH_ESDCMR_TXDH)==0))
188          outl(0x800080,ETH0_ESDCMR);
189
190
191  }
192  rtems_event_send(sc->daemonTid, events);
193}
194
195static rtems_irq_connect_data GT64260ethIrqData={
196        BSP_MAIN_ETH0_IRQ,
197        (rtems_irq_hdl) GT64260eth_isr,
198        NULL,
199        (rtems_irq_enable) GT64260eth_irq_on,
200        (rtems_irq_disable) GT64260eth_irq_off,
201        (rtems_irq_is_enabled) GT64260eth_irq_is_on,
202};
203
204static void GT64260eth_init_hw(struct GTeth_softc *sc)
205{
206
207#ifdef GT_DEBUG
208  printk("GT64260eth_init_hw(");
209#endif
210  /* Kate Feng : Turn the hardware snoop on as MOTLoad did not have
211   * it on by default.
212   */
213  outl(RxBSnoopEn|TxBSnoopEn|RxDSnoopEn|TxDSnoopEn, GT_CUU_Eth0_AddrCtrlLow);
214  outl(HashSnoopEn, GT_CUU_Eth0_AddrCtrlHigh);
215
216  sc->rxq_intrbits=0;
217  sc->sc_flags=0;
218 
219#ifndef GE_NORX
220  GTeth_rx_setup(sc);
221#endif
222
223#ifndef GE_NOTX
224  GTeth_tx_start(sc);
225#endif
226
227  sc->sc_pcr |= ETH_EPCR_HS_512;
228  outl(sc->sc_pcr, ETH0_EPCR);
229  outl(sc->sc_pcxr, ETH0_EPCXR); /* port config. extended reg. */
230  outl(0, ETH0_EICR); /* interrupt cause register */
231  outl(sc->sc_intrmask, ETH0_EIMR);
232#ifndef GE_NOHASH
233  /* Port Hash Table Pointer Reg*/
234  outl(((unsigned) sc->sc_hashtable),ETH0_EHTPR);
235#endif
236#ifndef GE_NORX
237  outl(ETH_ESDCMR_ERD,ETH0_ESDCMR); /* enable Rx DMA in SDMA Command Register */
238  sc->sc_flags |= GE_RXACTIVE;
239#endif
240#ifdef GT_DEBUG
241  printk("SDCMR 0x%x ", inl(ETH0_ESDCMR));
242#endif
243
244  /* connect the interrupt handler which should
245   * take care of enabling interrupts
246   */
247  if (!BSP_install_rtems_irq_handler(&GT64260ethIrqData))
248     printk("GT64260eth: unable to install ISR");
249   
250  /* The ethernet port is ready to transmit/receive */
251  outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
252
253#ifdef GT_DEBUG
254  printk(")\n");
255#endif
256}
257
258static void GT64260eth_stop_hw(struct GTeth_softc *sc)
259{
260
261  printk("GT64260eth_stop_hw(");
262
263  /* remove our interrupt handler which will also
264  * disable interrupts at the MPIC and the device
265  * itself
266  */
267  if (!BSP_remove_rtems_irq_handler(&GT64260ethIrqData))
268     printk("GT64260eth: unable to remove IRQ handler!");
269
270  outl(sc->sc_pcr, ETH0_EPCR);
271  outl(0, ETH0_EIMR);
272
273  sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING;
274#ifndef GE_NOTX
275  GTeth_tx_stop(sc);
276#endif
277#ifndef GE_NORX
278  GTeth_rx_stop(sc);
279#endif
280  sc->sc_hashtable = NULL;
281  if (GTeth_debug>0) printk(")");
282}
283
284static void GT64260eth_stop(struct GTeth_softc *sc)
285{
286  if (GTeth_debug>0) printk("GT64260eth_stop(");
287
288  /* The hardware is shutdown in the daemon */
289  /* kill the daemon. We also must release the networking
290   * semaphore or there'll be a deadlock...
291   */
292  rtems_event_send(sc->daemonTid, KILL_EVENT);
293  rtems_bsdnet_semaphore_release();
294
295  sc->daemonTid=0;
296  /* now wait for it to die */
297  rtems_semaphore_obtain(sc->daemonSync,RTEMS_WAIT,RTEMS_NO_TIMEOUT);
298
299  /* reacquire the bsdnet semaphore */
300  rtems_bsdnet_semaphore_obtain();
301  if (GTeth_debug>0) printk(")");
302}
303
304static void GT64260eth_ifinit(void *arg)
305{
306  struct GTeth_softc *sc = (struct GTeth_softc*)arg;
307  int i;
308
309#ifdef GT_DEBUG
310  printk("GT64260eth_ifinit(): daemon ID: 0x%08x)\n", sc->daemonTid);
311#endif
312  if (sc->daemonTid) {
313#ifdef GT_DEBUG
314     printk("GT64260eth: daemon already up, doing nothing\n");
315#endif
316     return;
317  }
318
319#ifndef GE_NOHASH
320  /* Mvme5500, the user must initialize the hash table before enabling the
321   * Ethernet controller
322   */
323  GTeth_hash_init(sc);
324  GTeth_hash_fill(sc);
325#endif
326
327  sc->intr_err_ptr1=0;
328  sc->intr_err_ptr2=0;
329  for (i=0; i< INTR_ERR_SIZE; i++) sc->intr_errsts[i]=0;
330
331  /* initialize the hardware (we are holding the network semaphore at this point) */
332  (void)GT64260eth_init_hw(sc);
333
334  /* launch network daemon */
335
336  /* NOTE:
337   * in ss-20011025 (and later) any task created by 'bsdnet_newproc' is
338   * wrapped by code which acquires the network semaphore...
339   */
340   sc->daemonTid = rtems_bsdnet_newproc(GT_ETH_TASK_NAME,4096,GT64260eth_daemon,arg);
341
342  /* Tell the world that we're running */
343  sc->arpcom.ac_if.if_flags |= IFF_RUNNING;
344
345}
346
347/* attach parameter tells us whether to attach or to detach the driver */
348/* Attach this instance, and then all the sub-devices */
349int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int attach)
350{
351  struct GTeth_softc *sc;
352  struct ifnet *ifp;
353  unsigned sdcr, data;
354  unsigned char hwaddr[6];
355  int i, unit, phyaddr;
356  void     *softc_mem;
357  char     *name;
358
359  unit = rtems_bsdnet_parse_driver_name(config, &name);
360  if (unit < 0) return 0;
361 
362  printk("\nEthernet driver name %s unit %d \n",name, unit);
363  printk("RTEMS-mvme5500 BSP Copyright (c) 2004, Brookhaven National Lab., Shuchen Kate Feng \n");
364  /* Make certain elements e.g. descriptor lists are aligned. */
365  softc_mem = rtems_bsdnet_malloc(sizeof(*sc) + SOFTC_ALIGN, M_FREE, M_NOWAIT);
366
367  /* Check for the very unlikely case of no memory. */
368  if (softc_mem == NULL)
369     printk("GT64260eth: OUT OF MEMORY");
370
371  sc = (void *)(((long)softc_mem + SOFTC_ALIGN) & ~SOFTC_ALIGN);
372  memset(sc, 0, sizeof(*sc));
373
374  if (GTeth_debug>0) printk("txq_desc[0] addr:%x, rxq_desc[0] addr:%x, sizeof sc %d\n",&sc->txq_desc[0], &sc->rxq_desc[0], sizeof(*sc));
375
376  sc->sc_macno = unit-1;
377
378  data = inl(ETH_EPAR);
379  phyaddr = ETH_EPAR_PhyAD_GET(data, sc->sc_macno);
380
381  /* try to read HW address from the device if not overridden
382   * by config
383   */
384  if (config->hardware_address) {
385     memcpy(hwaddr, config->hardware_address, ETHER_ADDR_LEN);
386  } else {
387    printk("Read EEPROM ");
388     for (i = 0; i < 6; i++)
389       hwaddr[i] = ReadConfVPD_buff(VPD_ENET0_OFFSET+i);
390  }
391
392#ifdef GT_DEBUG
393  printk("using MAC addr from device:");
394  for (i = 0; i < ETHER_ADDR_LEN; i++) printk("%x:", hwaddr[i]);
395  printk("\n");
396#endif
397
398  memcpy(sc->arpcom.ac_enaddr, hwaddr, ETHER_ADDR_LEN);
399
400  ifp = &sc->arpcom.ac_if;
401
402  sc->sc_pcr = inl(ETH0_EPCR);
403  sc->sc_pcxr = inl(ETH0_EPCXR);
404  sc->sc_intrmask = inl(ETH0_EIMR) | ETH_IR_MIIPhySTC;
405
406  printk("address %s\n", ether_sprintf(hwaddr));
407
408#ifdef GT_DEBUG
409  printk(", pcr %x, pcxr %x ", sc->sc_pcr, sc->sc_pcxr);
410#endif
411
412
413  sc->sc_pcxr |= ETH_EPCXR_PRIOrx_Override;
414  sc->sc_pcxr |= (3<<6); /* highest priority only */
415  sc->sc_pcxr &= ~ETH_EPCXR_RMIIEn;  /* MII mode */
416
417  /* Max. Frame Length (packet) allowed for reception is 1536 bytes,
418   * instead of 2048 (MOTLoad default) or 64K.
419   */
420  sc->sc_pcxr &= ~(3 << 14);
421  sc->sc_pcxr |= (ETH_EPCXR_MFL_1536 << 14);
422  sc->sc_max_frame_length = PKT_BUF_SZ;
423
424
425  if (sc->sc_pcr & ETH_EPCR_EN) {
426      int tries = 1000;
427      /* Abort transmitter and receiver and wait for them to quiese*/
428      outl(ETH_ESDCMR_AR|ETH_ESDCMR_AT,ETH0_ESDCMR);
429      do {
430        rtems_bsp_delay(100);
431      } while (tries-- > 0 && (inl(ETH0_ESDCMR) & (ETH_ESDCMR_AR|ETH_ESDCMR_AT)));
432  }
433#ifdef GT_DEBUG
434  printk(", phy %d (mii)\n", phyaddr);
435  printk("ETH0_ESDCMR %x ", inl(ETH0_ESDCMR));
436#endif
437
438  sc->sc_pcr &= ~(ETH_EPCR_EN | ETH_EPCR_RBM | ETH_EPCR_PM | ETH_EPCR_PBF);
439
440#ifdef GT_DEBUG
441        printk("Now sc_pcr %x,sc_pcxr %x", sc->sc_pcr, sc->sc_pcxr);
442#endif
443
444  /*
445   * Now turn off the GT.  If it didn't quiese, too ***ing bad.
446   */
447  outl(sc->sc_pcr, ETH0_EPCR);
448  outl(sc->sc_intrmask, ETH0_EIMR);
449  sdcr = inl(ETH0_ESDCR);
450  /* Burst size is limited to 4 64bit words */
451  ETH_ESDCR_BSZ_SET(sdcr, ETH_ESDCR_BSZ_4);
452  sdcr |= ETH_ESDCR_RIFB;/*limit interrupt on frame boundaries, instead of buffer*/
453#if 0
454  sdcr &= ~(ETH_ESDCR_BLMT|ETH_ESDCR_BLMR); /* MOTLoad defualt Big-endian */
455#endif
456  outl(sdcr, ETH0_ESDCR);
457
458#ifdef GT_DEBUG
459  printk("sdcr %x \n", sdcr);
460#endif
461
462  if (phyaddr== -1) printk("MII auto negotiation ?");
463
464  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
465
466  ifp->if_softc = sc;
467
468  /* set this interface's name and unit */
469  ifp->if_unit = unit;
470  ifp->if_name = name;
471
472  ifp->if_mtu = config->mtu ? config->mtu : ETHERMTU;
473
474  ifp->if_init = GT64260eth_ifinit;
475  ifp->if_ioctl = GTeth_ifioctl;
476  ifp->if_start = GTeth_ifstart;
477  ifp->if_output = ether_output;
478
479  /*  ifp->if_watchdog = GTeth_ifwatchdog;*/
480
481  if (ifp->if_snd.ifq_maxlen == 0)
482    ifp->if_snd.ifq_maxlen = ifqmaxlen;
483
484  /* create the synchronization semaphore */
485  if (RTEMS_SUCCESSFUL != rtems_semaphore_create(
486     rtems_build_name('G','e','t','h'),0,0,0,&sc->daemonSync))
487     printk("GT64260eth: semaphore creation failed");
488
489  sc->next_module = root_GT64260eth_dev;
490  root_GT64260eth_dev = sc;
491
492  /* Actually attach the interface */
493  if_attach(ifp);
494  ether_ifattach(ifp);
495
496#ifdef GT_DEBUG
497  printk("GT64260eth: Ethernet driver has been attached (handle 0x%08x,ifp 0x%08x)\n",sc, ifp);
498#endif
499
500  return(1);
501}
502
503static void GT64260eth_stats(struct GTeth_softc *sc)
504{
505  struct ifnet *ifp = &sc->arpcom.ac_if;
506
507#if 0
508  printf("       Rx Interrupts:%-8lu\n", sc->stats.rxInterrupts);
509  printf("     Receive Packets:%-8lu\n", ifp->if_ipackets);
510  printf("     Receive  errors:%-8lu\n", ifp->if_ierrors);
511  printf("      Framing Errors:%-8lu\n", sc->stats.frame_errors);
512  printf("          Crc Errors:%-8lu\n", sc->stats.crc_errors);
513  printf("    Oversized Frames:%-8lu\n", sc->stats.length_errors);
514  printf("         Active Rxqs:%-8u\n",  sc->rxq_active);
515  printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
516#endif
517  printf("Multi-BuffTx Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
518  printf("Multi-BuffTx max len:%-8lu\n", sc->stats.txMultiMaxLen);
519  printf("SingleBuffTx max len:%-8lu\n", sc->stats.txSinglMaxLen);
520  printf("Multi-BuffTx maxloop:%-8lu\n", sc->stats.txMultiMaxLoop);
521  printf("Tx buffer max len   :%-8lu\n", sc->stats.txBuffMaxLen);
522#if 0
523  printf("   Transmitt Packets:%-8lu\n", ifp->if_opackets);
524  printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
525  printf("    Tx/Rx collisions:%-8lu\n", ifp->if_collisions);
526  printf("         Active Txqs:%-8u\n", sc->txq_nactive);
527#endif
528}
529
530void GT64260eth_printStats(void)
531{
532  GT64260eth_stats(root_GT64260eth_dev);
533}
534
535static int GTeth_ifioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
536{
537  struct GTeth_softc *sc = ifp->if_softc;
538  struct ifreq *ifr = (struct ifreq *) data;
539
540  int error = 0;
541
542#ifdef GT_DEBUG
543  printk("GTeth_ifioctl(");
544#endif
545
546  switch (cmd) {
547    default:
548      if (GTeth_debug >0) {
549         printk("etherioctl(");
550         if (cmd== SIOCSIFADDR) printk("SIOCSIFADDR ");
551      }
552      return ether_ioctl(ifp, cmd, data);
553
554    case SIOCSIFFLAGS:
555       switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
556            case IFF_RUNNING:   /* not up, so we stop */
557                 GT64260eth_stop(sc);
558                 break;
559            case IFF_UP:  /* not running, so we start */
560                 GT64260eth_ifinit(sc);
561                 break;
562            case IFF_UP|IFF_RUNNING:/* active->active, update */
563                 GT64260eth_stop(sc);
564                 GT64260eth_ifinit(sc);
565                 break;
566            default:                    /* idle->idle: do nothing */
567                 break;
568       }
569       break;
570    case SIO_RTEMS_SHOW_STATS:
571       GT64260eth_stats (sc);
572       break;
573    case SIOCADDMULTI:
574    case SIOCDELMULTI:
575       error = (cmd == SIOCADDMULTI)
576                  ? ether_addmulti(ifr, &sc->arpcom)
577                  : ether_delmulti(ifr, &sc->arpcom);
578       if (error == ENETRESET) {
579           if (ifp->if_flags & IFF_RUNNING)
580              GTeth_ifchange(sc);
581           else
582              error = 0;
583       }
584       break;
585    case SIOCSIFMTU:
586       if (ifr->ifr_mtu > ETHERMTU || ifr->ifr_mtu < ETHERMIN) {
587          error = EINVAL;
588          break;
589       }
590       ifp->if_mtu = ifr->ifr_mtu;
591       break;
592  }
593
594#ifdef GT_DEBUG
595  printk("exit ioctl\n");
596#endif 
597  return error;
598}
599
600static void GTeth_ifstart(struct ifnet *ifp)
601{
602  struct GTeth_softc *sc = ifp->if_softc;
603
604#ifdef GT_DEBUG
605  printk("GTeth_ifstart(");
606#endif
607
608  if ((ifp->if_flags & IFF_RUNNING) == 0) {
609#ifdef GT_DEBUG
610     printk("IFF_RUNNING==0\n");
611#endif         
612     return;
613  }
614
615  ifp->if_flags |= IFF_OACTIVE;
616  rtems_event_send (sc->daemonTid, START_TRANSMIT_EVENT);
617#ifdef GT_DEBUG
618  printk(")\n");
619#endif
620}
621
622/* Initialize the Rx rings */
623static void GTeth_init_rx_ring(struct GTeth_softc *sc)
624{
625  int i;
626  volatile struct GTeth_desc *rxd;
627  unsigned nxtaddr;
628
629  sc->rxq_fi=0;
630  sc->rxq_head_desc = &sc->rxq_desc[0];
631  rxd = sc->rxq_head_desc;
632
633  sc->rxq_desc_busaddr = (unsigned long) sc->rxq_head_desc;
634#ifdef GT_DEBUG
635  printk("rxq_desc_busaddr %x ,&sc->rxq_desc[0] %x\n",
636        sc->rxq_desc_busaddr, sc->rxq_head_desc);
637#endif
638
639  nxtaddr = sc->rxq_desc_busaddr + sizeof(*rxd);
640  sc->rx_buf_sz = (sc->arpcom.ac_if.if_mtu <= 1500 ? PKT_BUF_SZ : sc->arpcom.ac_if.if_mtu + 32);
641  sc->rxq_active = RX_RING_SIZE;
642
643  for (i = 0; i < RX_RING_SIZE; i++, rxd++, nxtaddr += sizeof(*rxd)) {
644    struct mbuf *m;
645 
646    rxd->ed_lencnt= sc->rx_buf_sz <<16;
647    rxd->ed_cmdsts = RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI;
648
649    MGETHDR(m, M_WAIT, MT_DATA);
650    MCLGET(m, M_WAIT);
651    m->m_pkthdr.rcvif =  &sc->arpcom.ac_if;
652    sc->rxq_mbuf[i] = m;
653
654    /* convert mbuf pointer to data pointer of correct type */ 
655    rxd->ed_bufptr = (unsigned) mtod(m, void *);
656
657    /*
658     * update the nxtptr to point to the next txd.
659     */
660    if (i == RX_RING_SIZE - 1)
661        nxtaddr = sc->rxq_desc_busaddr;
662    rxd->ed_nxtptr = nxtaddr;
663
664#ifdef GT_DEBUG
665  printk("ed_lencnt %x, rx_buf_sz %x ",rxd->ed_lencnt, sc->rx_buf_sz);
666  printk("ed_cmdsts %x \n",rxd->ed_cmdsts);
667  printk("mbuf @ 0x%x, next desc. @ 0x%x\n",rxd->ed_bufptr,rxd->ed_nxtptr);
668#endif
669  }
670}
671
672void GTeth_rxprio_setup(struct GTeth_softc *sc)
673{
674
675  GTeth_init_rx_ring(sc);
676
677  sc->rxq_intrbits = ETH_IR_RxBuffer|ETH_IR_RxError|ETH_IR_RxBuffer_3|ETH_IR_RxError_3;
678}
679
680static int GT64260eth_rx(struct GTeth_softc *sc)
681{
682  struct ifnet *ifp = &sc->arpcom.ac_if;
683  struct mbuf *m;
684  int nloops=0;
685
686#ifdef GT_DEBUG
687  if (GTeth_rx_debug>0) printk("GT64260eth_rx(");
688#endif
689
690  while (sc->rxq_active > 0) {
691    volatile struct GTeth_desc *rxd = &sc->rxq_desc[sc->rxq_fi];
692    struct ether_header *eh;
693    unsigned int cmdsts;
694    unsigned int byteCount;
695
696    cmdsts = rxd->ed_cmdsts;
697
698    /*
699     * Sometimes the GE "forgets" to reset the ownership bit.
700     * But if the length has been rewritten, the packet is ours
701     * so pretend the O bit is set.
702     *
703     */
704    byteCount = rxd->ed_lencnt & 0xffff;
705
706    if (cmdsts & RX_CMD_O) {
707      if (byteCount == 0)
708         return(0);
709
710     /* <Kate Feng> Setting command/status to be zero seems to eliminate
711      * the spurious interrupt associated with the GE_FORGOT issue.
712      */
713      rxd->ed_cmdsts=0;
714
715#ifdef GE_FORGOT
716      /*
717       * For dignosis purpose only. Not a good practice to turn it on
718       */
719      printk("Rxq %d %d %d\n", sc->rxq_fi, byteCount,nloops);
720#endif
721    }
722
723    /* GT gave the ownership back to the CPU or the length has
724     * been rewritten , which means there
725     * is new packet in the descriptor/buffer
726     */
727
728    nloops++;
729    /*
730     * If this is not a single buffer packet with no errors
731     * or for some reason it's bigger than our frame size,
732     * ignore it and go to the next packet.
733     */
734    if ((cmdsts & (RX_CMD_F|RX_CMD_L|RX_STS_ES)) !=
735                            (RX_CMD_F|RX_CMD_L) ||
736                    byteCount > sc->sc_max_frame_length) {
737        --sc->rxq_active;
738        ifp->if_ipackets++;
739        ifp->if_ierrors++;
740        if (cmdsts & RX_STS_OR) sc->stats.or_errors++;
741        if (cmdsts & RX_STS_CE) sc->stats.crc_errors++;
742        if (cmdsts & RX_STS_MFL) sc->stats.length_errors++;
743        if (cmdsts & RX_STS_SF) sc->stats.frame_errors++;
744        if ((cmdsts & RX_STS_LC) || (cmdsts & RX_STS_COL))
745           ifp->if_collisions++;
746        goto give_it_back;
747     }
748     m = sc->rxq_mbuf[sc->rxq_fi];
749     m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);
750     eh = mtod (m, struct ether_header *);
751     m->m_data += sizeof(struct ether_header);
752     ether_input (ifp, eh, m);
753
754     ifp->if_ipackets++;
755     ifp->if_ibytes+=byteCount;
756     --sc->rxq_active;
757
758     give_it_back:
759     MGETHDR (m, M_WAIT, MT_DATA);
760     MCLGET (m, M_WAIT);
761     m->m_pkthdr.rcvif = ifp;
762     sc->rxq_mbuf[sc->rxq_fi]= m;
763     /* convert mbuf pointer to data pointer of correct type */
764     rxd->ed_bufptr = (unsigned) mtod(m, void*);
765     rxd->ed_lencnt = (unsigned long) sc->rx_buf_sz <<16;
766     rxd->ed_cmdsts = RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI;
767
768     if (++sc->rxq_fi == RX_RING_SIZE) sc->rxq_fi = 0;
769
770     sc->rxq_active++;
771  } /* while (sc->rxq_active > 0) */
772#ifdef GT_DEBUG
773  if (GTeth_rx_debug>0) printk(")");
774#endif
775  return nloops;
776}
777
778static void GTeth_rx_setup(struct GTeth_softc *sc)
779{
780
781  if (GTeth_rx_debug>0) printk("GTeth_rx_setup(");
782
783  GTeth_rxprio_setup(sc);
784
785  if ((sc->sc_flags & GE_RXACTIVE) == 0) {
786     /* First Rx Descriptor Pointer 3 */
787     outl( sc->rxq_desc_busaddr, ETH0_EFRDP3);
788     /* Current Rx Descriptor Pointer 3 */
789     outl( sc->rxq_desc_busaddr,ETH0_ECRDP3);
790#ifdef GT_DEBUG
791     printk("ETH0_EFRDP3 0x%x, ETH0_ECRDP3 0x%x \n", inl(ETH0_EFRDP3),
792            inl(ETH0_ECRDP3));
793#endif
794  }
795  sc->sc_intrmask |= sc->rxq_intrbits;
796
797  if (GTeth_rx_debug>0) printk(")\n");
798}
799
800static void GTeth_rx_cleanup(struct GTeth_softc *sc)
801{
802  int i;
803
804  if (GTeth_rx_debug>0) printk( "GTeth_rx_cleanup(");
805
806  for (i=0; i< RX_RING_SIZE; i++) {
807    if (sc->rxq_mbuf[i]) {
808      m_freem(sc->rxq_mbuf[i]);
809      sc->rxq_mbuf[i]=0;
810    }
811  }
812  if (GTeth_rx_debug>0) printk(")");
813}
814
815static void GTeth_rx_stop(struct GTeth_softc *sc)
816{
817  if (GTeth_rx_debug>0) printk( "GTeth_rx_stop(");
818  sc->sc_flags &= ~GE_RXACTIVE;
819  sc->sc_idlemask &= ~(ETH_IR_RxBits|ETH_IR_RxBuffer_3|ETH_IR_RxError_3);
820  sc->sc_intrmask &= ~(ETH_IR_RxBits|ETH_IR_RxBuffer_3|ETH_IR_RxError_3);
821  outl(sc->sc_intrmask, ETH0_EIMR);
822  outl(ETH_ESDCMR_AR, ETH0_ESDCMR); /* abort receive */
823  do {
824     rtems_bsp_delay(10);
825  } while (inl(ETH0_ESDCMR) & ETH_ESDCMR_AR);
826  GTeth_rx_cleanup(sc);
827  if (GTeth_rx_debug>0) printk(")");
828}
829
830static void GTeth_txq_free(struct GTeth_softc *sc, unsigned cmdsts)
831{
832  struct ifnet *ifp = &sc->arpcom.ac_if;
833  volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_fi];
834
835  /* ownership is sent back to CPU */
836  if (GTeth_debug>0) printk("txq%d,active %d\n", sc->txq_fi, sc->txq_nactive);
837
838  txd->ed_cmdsts &= ~TX_CMD_O; /* <skf> in case GT forgot */
839
840  /* statistics */
841  ifp->if_opackets++;
842  ifp->if_obytes += sc->txq_mbuf[sc->txq_fi]->m_len;
843  if (cmdsts & TX_STS_ES) {
844       ifp->if_oerrors++;
845       if ((cmdsts & TX_STS_LC) || (cmdsts & TX_STS_COL))
846           ifp->if_collisions++;
847  }
848  /* Free the original mbuf chain */
849  m_freem(sc->txq_mbuf[sc->txq_fi]);
850  sc->txq_mbuf[sc->txq_fi] = 0;
851  ifp->if_timer = 5;
852
853  sc->txq_free++;
854  if (++sc->txq_fi == TX_RING_SIZE) sc->txq_fi = 0;
855  --sc->txq_nactive;
856}
857
858static int txq_high_limit(struct GTeth_softc *sc)
859{
860  /*
861   * Have we [over]consumed our limit of descriptors?
862   * Do we have enough free descriptors?
863   */
864  if ( TX_RING_SIZE == sc->txq_nactive + TXQ_HiLmt_OFF) {
865     volatile struct GTeth_desc *txd2 = &sc->txq_desc[sc->txq_fi];
866     unsigned cmdsts;
867
868     cmdsts = txd2->ed_cmdsts;
869     if (cmdsts & TX_CMD_O) {  /* Ownership (1=GT 0=CPU) */
870         int nextin;
871
872         /*
873          * Sometime the Discovery forgets to update the
874          * last descriptor.  See if CPU owned the descriptor
875          * after it (since we know we've turned that to
876          * the discovery and if CPU owned it, the Discovery
877          * gave it back).  If CPU does, we know the Discovery
878          * gave back this one but forgot to mark it back to CPU.
879          */
880         nextin = (sc->txq_fi + 1) % TX_RING_SIZE;
881         if (sc->txq_desc[nextin].ed_cmdsts & TX_CMD_O) {
882#if 0
883            printk("Overconsuming Tx descriptors!\n");
884#endif
885            return 1;
886         }
887         printk("Txq %d forgot\n", sc->txq_fi);
888     }
889    /* Txq ring is almost full, let's free the current buffer here */
890#if 0
891    printk("Txq ring near full, free desc%d\n",sc->txq_fi);
892#endif
893    GTeth_txq_free(sc, cmdsts);
894  } /* end if ( TX_RING_SIZE == sc->txq_nactive + TXQ_HiLmt_OFF) */
895  return 0;
896}
897
898static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
899{
900  volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_lo];
901  unsigned intrmask = sc->sc_intrmask;
902  unsigned loop=0, index= sc->txq_lo;
903
904  /*
905   * The end-of-list descriptor we put on last time is the starting point
906   * for this packet.  The GT is supposed to terminate list processing on
907   * a NULL nxtptr but that currently is broken so a CPU-owned descriptor
908   * must terminate the list.
909   */
910  intrmask = sc->sc_intrmask;
911
912  if ( !(m->m_next)) {/* single buffer packet */
913    sc->txq_mbuf[index]= m;
914    sc->stats.txSinglMaxLen= MAX(m->m_len, sc->stats.txSinglMaxLen);
915  }
916  else /* multiple mbufs in this packet */
917  {
918    struct mbuf *mtp, *mdest;
919    volatile unsigned char *pt;
920    int len, y;
921
922#ifdef GT_DEBUG
923    printk("multi mbufs ");
924#endif   
925    MGETHDR(mdest, M_WAIT, MT_DATA);
926    MCLGET(mdest, M_WAIT);
927    pt = (volatile unsigned char *)mdest->m_data;
928    for (mtp=m,len=0;mtp;mtp=mtp->m_next) {
929      loop++;
930      if ( (y=(len+mtp->m_len)) > sizeof(union mcluster)) {
931        /* GT64260 allows us to chain the remaining to the next
932         * free descriptors.
933         */
934        printk("packet size %x > mcluster %x\n", y,sizeof(union mcluster));
935        printk("GT64260eth : packet too large ");
936      }
937      memcpy((void *)pt,(char *)mtp->m_data, mtp->m_len);
938      pt += mtp->m_len;
939#if 0
940    printk("%d ",mtp->m_len);
941#endif
942      len += mtp->m_len;
943      sc->stats.txBuffMaxLen=MAX(mtp->m_len,sc->stats.txBuffMaxLen);
944    }
945    sc->stats.txMultiMaxLoop=MAX(loop, sc->stats.txMultiMaxLoop);
946#if 0
947    printk("\n");
948#endif
949    mdest->m_len=len;
950    /* free old mbuf chain */
951    m_freem(m);
952    sc->txq_mbuf[index] = m = mdest;
953    sc->stats.txMultiBuffPacket++;
954    sc->stats.txMultiMaxLen= MAX(m->m_len, sc->stats.txMultiMaxLen);
955  }
956  if (m->m_len < ET_MINLEN) m->m_len = ET_MINLEN;
957
958  txd->ed_bufptr = (unsigned) mtod(m, void*);
959  txd->ed_lencnt = m->m_len << 16;
960  /*txd->ed_cmdsts = TX_CMD_L|TX_CMD_GC|TX_CMD_P|TX_CMD_O|TX_CMD_F|TX_CMD_EI;*/
961  txd->ed_cmdsts = 0x80c70000;
962  while (txd->ed_cmdsts != 0x80c70000);
963  memBar();
964
965#ifdef GT_DEBUG
966  printk("len = %d, cmdsts 0x%x ", m->m_len,txd->ed_cmdsts);
967#endif
968
969  /*
970   * Tell the SDMA engine to "Fetch!"
971   * Start Tx high.
972   */
973  sc->txq_nactive++;
974  outl(0x800080, ETH0_ESDCMR); /* ETH_ESDCMR_TXDH| ETH_ESDCMR_ERD */
975  if ( ++sc->txq_lo == TX_RING_SIZE) sc->txq_lo = 0;
976  sc->txq_free--;
977
978#if 0
979  /*
980   * Since we have put an item into the packet queue, we now want
981   * an interrupt when the transmit queue finishes processing the
982   * list.  But only update the mask if needs changing.
983   */
984  intrmask |= sc->txq_intrbits & ( ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh);
985  if (sc->sc_intrmask != intrmask) {
986      sc->sc_intrmask = intrmask;
987      outl(sc->sc_intrmask, ETH0_EIMR);
988  }
989#endif
990
991#if 0
992  printk("EICR= %x, EIMR= %x ", inl(ETH0_EICR), inl(ETH0_EIMR));
993  printk("%s:transmit frame #%d queued in slot %d.\n",
994              sc->arpcom.ac_if.if_name, sc->txq_lo, index);
995  printk("pcr %x, pcxr %x DMA dcr %x cmr %x\n", inl(ETH0_EPCR), inl(ETH0_EPCXR), inl(ETH0_ESDCR), inl(ETH0_ESDCMR));
996#endif
997
998  return 1;
999}
1000
1001static unsigned GTeth_txq_done(struct GTeth_softc *sc)
1002{
1003  if (GTeth_debug>0) printk("Txdone(" );
1004
1005  while (sc->txq_nactive > 0) {
1006    /* next to be returned to the CPU */
1007    volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_fi];
1008    unsigned cmdsts;
1009
1010    /* if GT64260 still owns it ....... */
1011    if ((cmdsts = txd->ed_cmdsts) & TX_CMD_O) {
1012       int nextin;
1013
1014       /* Someone quoted :
1015        * "Sometimes the Discovery forgets to update the
1016        * ownership bit in the descriptor."
1017        * <skf> More correctly, the last descriptor of each
1018        * transmitted frame is returned to CPU ownership and
1019        * status is updated only after the actual transmission
1020        * of the packet is completed.  Also, if there is an error
1021        * during transmission, we want to continue the
1022        * transmission of the next descriptor, in additions to
1023        * reporting the error.
1024        */
1025       /* The last descriptor */
1026       if (sc->txq_nactive == 1) return(0);
1027
1028       /*
1029        * Sometimes the Discovery forgets to update the
1030        * ownership bit in the descriptor.  See if CPU owned
1031        * the descriptor after it (since we know we've turned
1032        * that to the Discovery and if CPU owned it now then the
1033        * Discovery gave it back).  If we do, we know the
1034        * Discovery gave back this one but forgot to mark it
1035        * back to CPU.
1036        */
1037       nextin = (sc->txq_fi + 1) % TX_RING_SIZE;
1038
1039       if (sc->txq_desc[nextin].ed_cmdsts & TX_CMD_O) return(0);
1040       printk("Txq%d forgot\n",sc->txq_fi);
1041    } /* end checking GT64260eth owner */
1042    GTeth_txq_free(sc, cmdsts);   
1043  }  /* end while */
1044  if (GTeth_debug>0) printk(")\n");
1045  return(1);
1046}
1047
1048static void GTeth_tx_start(struct GTeth_softc *sc)
1049{
1050  int i;
1051  volatile struct GTeth_desc *txd;
1052  unsigned nxtaddr;
1053
1054#ifdef GT_DEBUG
1055  printk("GTeth_tx_start(");
1056#endif
1057  sc->sc_intrmask &= ~(ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh|
1058                             ETH_IR_TxEndLow |ETH_IR_TxBufferLow);
1059
1060  txd = &sc->txq_desc[0];
1061  sc->txq_desc_busaddr = (unsigned long) &sc->txq_desc[0];
1062#ifdef GT_DEBUG
1063  printk("txq_desc_busaddr %x, &sc->txq_desc[0] %x \n",
1064         sc->txq_desc_busaddr,&sc->txq_desc[0]);
1065#endif
1066
1067  nxtaddr = sc->txq_desc_busaddr + sizeof(*txd);
1068
1069  sc->txq_pendq.ifq_maxlen = 10;
1070  sc->txq_pendq.ifq_head= NULL;
1071  sc->txq_pendq.ifq_tail= NULL;
1072  sc->txq_nactive = 0;
1073  sc->txq_fi = 0;
1074  sc->txq_lo = 0;
1075  sc->txq_inptr = PKT_BUF_SZ;
1076  sc->txq_outptr = 0;
1077  sc->txq_free = TX_RING_SIZE;
1078
1079  for (i = 0; i < TX_RING_SIZE;
1080       i++, txd++,  nxtaddr += sizeof(*txd)) {
1081      sc->txq_mbuf[i]=0;
1082      txd->ed_bufptr = 0;
1083
1084      /*
1085       * update the nxtptr to point to the next txd.
1086       */
1087      txd->ed_cmdsts = 0;
1088      if ( i== TX_RING_SIZE-1) nxtaddr = sc->txq_desc_busaddr;
1089      txd->ed_nxtptr =  nxtaddr;
1090#ifdef GT_DEBUG
1091      printk("next desc. @ 0x%x\n",txd->ed_nxtptr);
1092#endif
1093  }
1094 
1095  sc->txq_intrbits = ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh;
1096  sc->txq_esdcmrbits = ETH_ESDCMR_TXDH; /* Start Tx high */
1097  sc->txq_epsrbits = ETH_EPSR_TxHigh;
1098  /* offset to current tx desc ptr reg */
1099  sc->txq_ectdp = (caddr_t)ETH0_ECTDP1;
1100  /* Current Tx Desc Pointer 1 */
1101  outl(sc->txq_desc_busaddr,ETH0_ECTDP1);
1102
1103#ifdef GT_DEBUG
1104  printk(")\n");
1105#endif
1106}
1107
1108static void GTeth_tx_cleanup(struct GTeth_softc *sc)
1109{
1110  int i;
1111
1112  for (i=0; i< TX_RING_SIZE; i++) {
1113    if (sc->txq_mbuf[i]) {
1114      m_freem(sc->txq_mbuf[i]);
1115      sc->txq_mbuf[i]=0;
1116    }
1117  }
1118}
1119
1120static void GTeth_tx_stop(struct GTeth_softc *sc)
1121{
1122  /* SDMA command register : stop Tx high and low */
1123  outl(ETH_ESDCMR_STDH|ETH_ESDCMR_STDL, ETH0_ESDCMR);
1124
1125  GTeth_txq_done(sc);
1126  sc->sc_intrmask &= ~(ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh|
1127                             ETH_IR_TxEndLow |ETH_IR_TxBufferLow);
1128  GTeth_tx_cleanup(sc);
1129
1130  sc->arpcom.ac_if.if_timer = 0;
1131}
1132
1133static void GTeth_ifchange(struct GTeth_softc *sc)
1134{
1135  if (GTeth_debug>0) printk("GTeth_ifchange(");
1136  if (GTeth_debug>5) printk("(pcr=%#x,imr=%#x)",inl(ETH0_EPCR),inl(ETH0_EIMR));
1137  /*  printk("SIOCADDMULTI (SIOCDELMULTI): is it about rx or tx ?\n");*/
1138  outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
1139  outl(sc->sc_intrmask, ETH0_EIMR);
1140  GTeth_ifstart(&sc->arpcom.ac_if);
1141  /* Current Tx Desc Pointer 0 and 1 */
1142  if (GTeth_debug>5) printk("(ectdp0=%#x, ectdp1=%#x)",
1143            inl(ETH0_ECTDP0), inl(ETH0_ECTDP1));
1144  if (GTeth_debug>0) printk(")");
1145}
1146
1147static int GTeth_hash_compute(struct GTeth_softc *sc,unsigned char eaddr[ETHER_ADDR_LEN])
1148{
1149  unsigned w0, add0, add1;
1150  unsigned result;
1151
1152  if (GTeth_debug>0) printk("GTeth_hash_compute(");
1153  add0 = ((unsigned) eaddr[5] <<  0) |
1154         ((unsigned) eaddr[4] <<  8) |
1155         ((unsigned) eaddr[3] << 16);
1156
1157  add0 = ((add0 & 0x00f0f0f0) >> 4) | ((add0 & 0x000f0f0f) << 4);
1158  add0 = ((add0 & 0x00cccccc) >> 2) | ((add0 & 0x00333333) << 2);
1159  add0 = ((add0 & 0x00aaaaaa) >> 1) | ((add0 & 0x00555555) << 1);
1160
1161  add1 = ((unsigned) eaddr[2] <<  0) |
1162         ((unsigned) eaddr[1] <<  8) |
1163         ((unsigned) eaddr[0] << 16);
1164
1165  add1 = ((add1 & 0x00f0f0f0) >> 4) | ((add1 & 0x000f0f0f) << 4);
1166  add1 = ((add1 & 0x00cccccc) >> 2) | ((add1 & 0x00333333) << 2);
1167  add1 = ((add1 & 0x00aaaaaa) >> 1) | ((add1 & 0x00555555) << 1);
1168
1169#ifdef GT_DEBUG
1170  printk("eaddr= %s add1:%x add0:%x\n", ether_sprintf1(eaddr), add1, add0);
1171#endif
1172   
1173  /*
1174   * hashResult is the 15 bits Hash entry address.
1175   * ethernetADD is a 48 bit number, which is derived from the Ethernet
1176   * MAC address, by nibble swapping in every byte (i.e MAC address
1177   * of 0x123456789abc translates to ethernetADD of 0x21436587a9cb).
1178   */
1179  if ((sc->sc_pcr & ETH_EPCR_HM) == 0) {
1180     /*
1181      * hashResult[14:0] = hashFunc0(ethernetADD[47:0])
1182      *
1183      * hashFunc0 calculates the hashResult in the following manner:
1184      * hashResult[ 8:0] = ethernetADD[14:8,1,0]
1185      * XOR ethernetADD[23:15] XOR ethernetADD[32:24]
1186      */
1187     result = (add0 & 3) | ((add0 >> 6) & ~3);
1188     result ^= (add0 >> 15) ^ (add1 >>  0);
1189     result &= 0x1ff;
1190     /*
1191      *   hashResult[14:9] = ethernetADD[7:2]
1192      */
1193     result |= (add0 & ~3) << 7;        /* excess bits will be masked */
1194#ifdef GT_DEBUG
1195     printk("hash result %x  ", result & 0x7fff);
1196#endif
1197  } else {
1198#define TRIBITFLIP      073516240       /* yes its in octal */
1199     /*
1200      * hashResult[14:0] = hashFunc1(ethernetADD[47:0])
1201      *
1202      * hashFunc1 calculates the hashResult in the following manner:
1203      * hashResult[08:00] = ethernetADD[06:14]
1204      * XOR ethernetADD[15:23] XOR ethernetADD[24:32]
1205      */
1206     w0 = ((add0 >> 6) ^ (add0 >> 15) ^ (add1)) & 0x1ff;
1207     /*
1208      * Now bitswap those 9 bits
1209      */
1210     result = 0;
1211     result |= ((TRIBITFLIP >> (((w0 >> 0) & 7) * 3)) & 7) << 6;
1212     result |= ((TRIBITFLIP >> (((w0 >> 3) & 7) * 3)) & 7) << 3;
1213     result |= ((TRIBITFLIP >> (((w0 >> 6) & 7) * 3)) & 7) << 0;
1214
1215     /*
1216      *   hashResult[14:09] = ethernetADD[00:05]
1217      */
1218     result |= ((TRIBITFLIP >> (((add0 >> 0) & 7) * 3)) & 7) << 12;
1219     result |= ((TRIBITFLIP >> (((add0 >> 3) & 7) * 3)) & 7) << 9;
1220#ifdef GT_DEBUG
1221     printk("1(%#x)", result);
1222#endif
1223  }
1224#ifdef GT_DEBUG
1225  printk(")");
1226#endif
1227
1228  /* 1/2K address filtering (MOTLoad default )? ->16KB memory required
1229   * or 8k address filtering ? -> 256KB memory required
1230   */
1231  return result & ((sc->sc_pcr & ETH_EPCR_HS_512) ? 0x7ff : 0x7fff);
1232}
1233
1234static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
1235        enum GTeth_rxprio prio,unsigned char eaddr[ETHER_ADDR_LEN])
1236{
1237  unsigned long long he;
1238  unsigned long long *maybe_he_p = NULL;
1239  int limit;
1240  int hash;
1241  int maybe_hash = 0;
1242
1243#ifdef GT_DEBUG
1244  printk("GTeth_hash_entry_op(prio %d ", prio);
1245#endif
1246
1247  hash = GTeth_hash_compute(sc, eaddr);
1248
1249  if (sc->sc_hashtable == NULL) {
1250        printk("hashtable == NULL!");
1251  }
1252#ifdef GT_DEBUG
1253  printk("Hash computed %x eaddr %s\n", hash,ether_sprintf1(eaddr));
1254#endif
1255
1256  /*
1257   * Assume we are going to insert so create the hash entry we
1258   * are going to insert.  We also use it to match entries we
1259   * will be removing.  The datasheet is wrong for this.
1260   */
1261  he = (((unsigned long long) eaddr[5]) << 43) |
1262       (((unsigned long long) eaddr[4]) << 35) |
1263       (((unsigned long long) eaddr[3]) << 27) |
1264       (((unsigned long long) eaddr[2]) << 19) |
1265       (((unsigned long long) eaddr[1]) << 11) |
1266       (((unsigned long long) eaddr[0]) <<  3) |
1267       ((unsigned long long) HSH_PRIO_INS(prio) | HSH_V | HSH_R);
1268  /*   he = 0x1b1acd87d08005;*/
1269  /*
1270   * The GT will search upto 12 entries for a hit, so we must mimic that.
1271   */
1272  hash &= (sc->sc_hashmask / sizeof(he));
1273
1274#ifdef GT_DEBUG
1275  if (GTeth_debug>0) {
1276    unsigned val1, val2;
1277
1278    val1= he & 0xffffffff;
1279    val2= (he >>32) & 0xffffffff;
1280    printk("Hash addr value %x%x, entry %x\n",val2,val1, hash);
1281  }
1282#endif
1283
1284  for (limit = HSH_LIMIT; limit > 0 ; --limit) {
1285      /*
1286       * Does the GT wrap at the end, stop at the, or overrun the
1287       * end?  Assume it wraps for now.  Stash a copy of the
1288       * current hash entry.
1289       */
1290      unsigned long long *he_p = &sc->sc_hashtable[hash];
1291      unsigned long long thishe = *he_p;
1292
1293      /*
1294       * If the hash entry isn't valid, that break the chain.  And
1295       * this entry a good candidate for reuse.
1296       */
1297      if ((thishe & HSH_V) == 0) {
1298         maybe_he_p = he_p;
1299         break;
1300      }
1301
1302      /*
1303       * If the hash entry has the same address we are looking for
1304       * then ...  if we are removing and the skip bit is set, its
1305       * already been removed.  if are adding and the skip bit is
1306       * clear, then its already added.  In either return EBUSY
1307       * indicating the op has already been done.  Otherwise flip
1308       * the skip bit and return 0.
1309       */
1310      if (((he ^ thishe) & HSH_ADDR_MASK) == 0) {
1311         if (((op == GE_HASH_REMOVE) && (thishe & HSH_S)) ||
1312            ((op == GE_HASH_ADD) && (thishe & HSH_S) == 0))
1313            return EBUSY;
1314          *he_p = thishe ^ HSH_S;
1315
1316          if (GTeth_debug>0) {
1317             unsigned val1, val2;
1318
1319             val1= *he_p & 0xffffffff;
1320             val2= (*he_p >>32) & 0xffffffff;
1321             printk("flip skip bit result %x%x entry %x ",val2,val1, hash);
1322          }
1323          return 0;
1324       }
1325
1326       /*
1327        * If we haven't found a slot for the entry and this entry
1328        * is currently being skipped, return this entry.
1329        */
1330       if (maybe_he_p == NULL && (thishe & HSH_S)) {
1331          maybe_he_p = he_p;
1332          maybe_hash = hash;
1333       }               
1334       hash = (hash + 1) & (sc->sc_hashmask / sizeof(he));
1335  }
1336
1337  /*
1338   * If we got here, then there was no entry to remove.
1339   */
1340  if (op == GE_HASH_REMOVE) {
1341     printk("GT64260eth : No entry to remove\n");
1342     return ENOENT;
1343  }
1344
1345  /*
1346   * If we couldn't find a slot, return an error.
1347   */
1348  if (maybe_he_p == NULL) {
1349     printk("GT64260eth : No slot found");
1350     return ENOSPC;
1351  }
1352
1353  /* Update the entry.*/
1354  *maybe_he_p = he;
1355  if (GTeth_debug>0) {
1356    unsigned val1, val2;
1357#if 0
1358    unsigned long *pt= sc->sc_hashtable;
1359    int i, loop;
1360
1361  for (loop= 0; loop< 256; loop++) {
1362    printk("%d)", loop);
1363    for (i=0; i< 16; i++, pt++) printk("%x ",*pt);
1364    printk("\n");
1365  }
1366#endif
1367    val1= he & 0xffffffff;
1368    val2= (he >>32) & 0xffffffff;
1369    printk("Update Hash result %x%x, table addr %x entry %x )\n",val2, val1, maybe_he_p, hash);
1370  }
1371  return 0;
1372}
1373
1374static int GTeth_hash_fill(struct GTeth_softc *sc)
1375{
1376  struct ether_multistep step;
1377  struct ether_multi *enm;
1378  int error;
1379
1380#ifdef GT_DEBUG
1381  printk( "GTeth_hash_fill(");
1382#endif
1383  error = GTeth_hash_entry_op(sc,GE_HASH_ADD,GE_RXPRIO_HI,sc->arpcom.ac_enaddr);
1384
1385  if (error) {
1386     if (GTeth_debug>0) printk("!");
1387     return error;
1388  }
1389
1390  sc->sc_flags &= ~GE_ALLMULTI;
1391  if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) == 0)
1392     sc->sc_pcr &= ~ETH_EPCR_PM;
1393  /* see lib/include/netinet/if_ether.h */
1394  ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
1395  while (enm != NULL) {
1396    if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
1397      /* Frames are received regardless of their destinatin address */
1398       sc->sc_flags |= GE_ALLMULTI;
1399       sc->sc_pcr |= ETH_EPCR_PM;
1400    } else {
1401      /* Frames are only received if the destinatin address is found
1402       * in the hash table
1403       */
1404       error = GTeth_hash_entry_op(sc, GE_HASH_ADD,
1405             GE_RXPRIO_MEDLO, enm->enm_addrlo);
1406       if (error == ENOSPC) break;
1407    }
1408    ETHER_NEXT_MULTI(step, enm);
1409  }
1410#ifdef GT_DEBUG
1411  printk(")\n");
1412#endif
1413  return error;
1414}
1415
1416static void GTeth_hash_init(struct GTeth_softc *sc)
1417{
1418  void *hash_mem;
1419
1420  if (GTeth_debug>0) printk("GTeth_hash_init(");
1421  /* MOTLoad defualt : 512 bytes of address filtering, which
1422   * requires 16KB of memory
1423   */
1424#if 1
1425  hash_mem = rtems_bsdnet_malloc(HASH_DRAM_SIZE + HASH_ALIGN, M_FREE, M_NOWAIT);
1426  sc->sc_hashtable  =(void *)(((long)hash_mem+ HASH_ALIGN) & ~HASH_ALIGN);
1427#else
1428  /* only for test */
1429  hash_mem = 0x68F000;
1430  sc->sc_hashtable  =(unsigned long long *)hash_mem;
1431#endif
1432  sc->sc_hashmask = HASH_DRAM_SIZE - 1;
1433
1434  memset((void *)sc->sc_hashtable, 0,HASH_DRAM_SIZE);
1435#ifdef GT_DEBUG
1436  printk("hashtable addr:%x, mask %x)\n", sc->sc_hashtable,sc->sc_hashmask);
1437#endif
1438}
1439
1440#ifdef GT64260eth_DEBUG
1441static void GT64260eth_error(struct GTeth_softc *sc)
1442{
1443  struct ifnet          *ifp = &sc->arpcom.ac_if;
1444  unsigned int          intr_status= sc->intr_errsts[sc->intr_err_ptr1];
1445
1446  /* read and reset the status; because this is written
1447   * by the ISR, we must disable interrupts here
1448   */
1449  if (intr_status) {
1450    printk("%s%d: ICR = 0x%x ",
1451           ifp->if_name, ifp->if_unit, intr_status);
1452#if 1
1453    if (intr_status & INTR_RX_ERROR) {
1454       printk("Rxq error, if_ierrors %d\n",
1455              ifp->if_ierrors);
1456    }
1457#endif
1458    /* Rx error is handled in GT64260eth_rx() */
1459    if (intr_status & INTR_TX_ERROR) {
1460       ifp->if_oerrors++;
1461       printk("Txq error,  if_oerrors %d\n",ifp->if_oerrors);
1462    }
1463  }
1464  else
1465    printk("%s%d: Ghost interrupt ?\n",ifp->if_name,
1466           ifp->if_unit);
1467  sc->intr_errsts[sc->intr_err_ptr1++]=0; 
1468  sc->intr_err_ptr1 %= INTR_ERR_SIZE;   /* Till Straumann */
1469}
1470#endif
1471
1472/* The daemon does all of the work; RX, TX and cleaning up buffers/descriptors */
1473static void GT64260eth_daemon(void *arg)
1474{
1475  struct GTeth_softc *sc = (struct GTeth_softc*)arg;
1476  rtems_event_set       events;
1477  struct mbuf   *m=0;
1478  struct ifnet  *ifp=&sc->arpcom.ac_if;
1479
1480#if 0   
1481  /* see comments in GT64260eth_init(); in newer versions of
1482   * rtems, we hold the network semaphore at this point
1483   */
1484  rtems_semaphore_release(sc->daemonSync);
1485#endif
1486
1487  /* NOTE: our creator possibly holds the bsdnet_semaphore.
1488   *       since that has PRIORITY_INVERSION enabled, our
1489   *       subsequent call to bsdnet_event_receive() will
1490   *       _not_ release it. It's still in posession of our
1491   *       owner.
1492   *       This is different from how killing this task
1493   *       is handled.
1494   */
1495
1496  for (;;) {
1497     /* sleep until there's work to be done */
1498     /* Note: bsdnet_event_receive() acquires
1499      *       the global bsdnet semaphore for
1500      *       mutual exclusion.
1501      */
1502     rtems_bsdnet_event_receive(ALL_EVENTS,
1503                                RTEMS_WAIT | RTEMS_EVENT_ANY,
1504                                RTEMS_NO_TIMEOUT,
1505                                &events);
1506 
1507     if (KILL_EVENT & events) break;
1508
1509#ifndef GE_NORX
1510     if (events & RX_EVENT) GT64260eth_rx(sc);
1511#endif
1512#if 0
1513     printk("%x ", inb(ETH0_EPSR));
1514     if ( ((i++) % 15)==0) printk("\n");
1515#endif
1516
1517     /* clean up and try sending packets */
1518     do {
1519         if (sc->txq_nactive) GTeth_txq_done(sc);
1520
1521         while (sc->txq_free>0) {
1522           if (sc->txq_free>TXQ_HiLmt_OFF) {
1523              m=0;
1524              IF_DEQUEUE(&ifp->if_snd,m);
1525              if (m==0) break;
1526              GT64260eth_sendpacket(sc, m);
1527           }
1528           else {
1529              GTeth_txq_done(sc);
1530              break;
1531           }
1532         }
1533         /* we leave this loop
1534          *  - either because there's no free buffer
1535          *    (m=0 initializer && !sc->txq_free)
1536          *  - or there's nothing to send (IF_DEQUEUE
1537          *    returned 0
1538          */
1539       } while (m);
1540
1541       ifp->if_flags &= ~IFF_OACTIVE;
1542
1543       /* Log errors and other uncommon events. */
1544#ifdef GT64260eth_DEBUG
1545       if (events & ERR_EVENT) GT64260eth_error(sc);
1546#endif
1547  } /* end for(;;) { rtems_bsdnet_event_receive() .....*/
1548
1549  ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
1550
1551  /* shut down the hardware */
1552  GT64260eth_stop_hw(sc);
1553  /* flush the output queue */
1554  for (;;) {
1555      IF_DEQUEUE(&ifp->if_snd,m);
1556      if (!m) break;
1557      m_freem(m);
1558  }
1559  /* as of 'rtems_bsdnet_event_receive()' we own the
1560   * networking semaphore
1561   */
1562  rtems_bsdnet_semaphore_release();
1563  rtems_semaphore_release(sc->daemonSync);
1564
1565  /* Note that I dont use sc->daemonTid here -
1566   * theoretically, that variable could already
1567   * hold a newly created TID
1568   */
1569  rtems_task_delete(RTEMS_SELF);
1570}
1571
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