source: rtems/c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c @ 169480b

4.115
Last change on this file since 169480b was 169480b, checked in by Joel Sherrill <joel.sherrill@…>, on 06/17/11 at 13:24:47

2011-04-10 Kate Feng <feng@…>

PR 1786/bsps

  • Makefile.am: Add support for Altivec.
  • startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
  • make/custom/mvme5500.cfg: Change CPU_CFLAGS to "-mcpu=7450 -mtune=7450 -Dmpc7455"
  • irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c: Remove warnings.
  • vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
  • network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there is any Rx error.
  • Property mode set to 100644
File size: 44.1 KB
Line 
1/* GT64260eth.c : GT64260 10/100 Mb ethernet MAC driver
2 *
3 * Copyright (c) 2003,2004 Brookhaven National  Laboratory
4 *               S. Kate Feng <feng1@bnl.gov>
5 * All rights reserved
6 *
7 * Acknowledgements:
8 * netBSD : Copyright (c) 2002 Allegro Networks, Inc., Wasabi Systems, Inc.
9 * Marvell : NDA document for the discovery system controller
10 *
11 * Some notes from the author, S. Kate Feng :
12 *
13 * 1) Mvme5500 uses Eth0 (controller 0) of the GT64260 to implement
14 *    the 10/100 BaseT Ethernet with PCI Master Data Byte Swap\
15 *    control.
16 * 2) Implemented hardware snoop instead of software snoop
17 *    to ensure SDRAM cache coherency. (Copyright : NDA item)
18 * 3) Added S/W support for multi mbuf.  (TODO : Let the H/W do it)
19 *
20 */
21#define BYTE_ORDER BIG_ENDIAN
22
23#define INET
24
25#include <rtems.h>
26#include <rtems/bspIo.h>            /* printk */
27#include <stdio.h>                  /* printf for statistics */
28#include <string.h>
29
30#include <libcpu/io.h>              /* inp & friends */
31#include <libcpu/spr.h>             /* registers.h is included here */
32#include <bsp.h>
33
34#include <sys/param.h>
35#include <sys/systm.h>
36#include <sys/mbuf.h>
37
38#include <rtems/rtems_bsdnet.h>
39#include <rtems/rtems_bsdnet_internal.h>
40#include <rtems/error.h>
41#include <errno.h>
42
43#include <rtems/rtems/types.h>
44
45/* #include <sys/queue.h> */
46
47#include <sys/ioctl.h>
48#include <sys/socket.h>
49#include <sys/sockio.h>             /* SIOCADDMULTI, SIOC...     */
50#include <net/if.h>
51#include <net/if_dl.h>
52#include <netinet/in.h>
53#include <netinet/if_ether.h>
54
55#ifdef INET
56#include <netinet/in_var.h>
57#endif
58
59#include <bsp/irq.h>
60#include <bsp/GT64260ethreg.h>
61#include <bsp/GT64260eth.h>
62#include <bsp/VPD.h>
63
64extern unsigned char ReadConfVPD_buff(int offset); /* in startup/bspstart.c */
65
66#define GT_ETH_TASK_NAME  "Geth"
67#define PKT_BUF_SZ 1536
68#define SOFTC_ALIGN  31
69#define HASH_ALIGN   15
70
71#define TXQ_HiLmt_OFF 2
72
73/* <skf>
74 * 1. printk debug is for diagnosis only, which may cause
75 * unexpected result, especially if txq is under heavy load
76 * because CPU is fast with a decent cache.
77 */
78#define GTeth_debug 0
79#define GTeth_rx_debug 0
80
81#if 0
82#define GE_FORGOT
83#define GE_NORX
84#define GT_DEBUG
85#endif
86
87/* RTEMS event to kill the daemon */
88#define KILL_EVENT              RTEMS_EVENT_1
89/* RTEMS event to (re)start the transmitter */
90#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
91/* RTEMS events used by the ISR */
92#define RX_EVENT                RTEMS_EVENT_3
93#define TX_EVENT                RTEMS_EVENT_4
94#define ERR_EVENT               RTEMS_EVENT_5
95
96#define ALL_EVENTS (KILL_EVENT|START_TRANSMIT_EVENT|RX_EVENT|TX_EVENT|ERR_EVENT)
97
98enum GTeth_whack_op {
99        GE_WHACK_START,         GE_WHACK_RESTART,
100        GE_WHACK_CHANGE,        GE_WHACK_STOP
101};
102
103enum GTeth_hash_op {
104        GE_HASH_ADD,            GE_HASH_REMOVE,
105};
106
107#define ET_MINLEN 64            /* minimum message length */
108
109static int GTeth_ifioctl(struct ifnet *ifp, ioctl_command_t cmd, caddr_t data);
110static void GTeth_ifstart (struct ifnet *);
111static void GTeth_ifchange(struct GTeth_softc *sc);
112static void GTeth_init_rx_ring(struct GTeth_softc *sc);
113static void GT64260eth_daemon(void *arg);
114static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m);
115static unsigned GTeth_txq_done(struct GTeth_softc *sc);
116static void GTeth_tx_cleanup(struct GTeth_softc *sc);
117static void GTeth_tx_start(struct GTeth_softc *sc);
118static void GTeth_tx_stop(struct GTeth_softc *sc);
119static void GTeth_rx_cleanup(struct GTeth_softc *sc);
120static int GT64260eth_rx(struct GTeth_softc *sc);
121static void GTeth_rx_setup(struct GTeth_softc *sc);
122static void GTeth_rxprio_setup(struct GTeth_softc *sc);
123static void GTeth_rx_stop(struct GTeth_softc *dc);
124static void GT64260eth_isr(void);
125static int GTeth_hash_compute(struct GTeth_softc *sc,unsigned char eaddr[ETHER_ADDR_LEN]);
126static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
127        enum GTeth_rxprio prio,unsigned char eaddr[ETHER_ADDR_LEN]);
128
129static int GTeth_hash_fill(struct GTeth_softc *sc);
130static void GTeth_hash_init(struct GTeth_softc *sc);
131
132static struct GTeth_softc *root_GT64260eth_dev = NULL;
133
134static void GT64260eth_irq_on(const rtems_irq_connect_data *irq)
135{
136  struct GTeth_softc *sc;
137
138  for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module) {
139    outl(0x30883444,ETH0_EIMR); /* MOTLoad default interrupt mask */
140    return;
141  }
142}
143
144static void GT64260eth_irq_off(const rtems_irq_connect_data *irq)
145{
146  struct GTeth_softc *sc;
147
148  for (sc= root_GT64260eth_dev; sc; sc= sc-> next_module)
149      outl(0, ETH0_EIMR);
150}
151
152static int GT64260eth_irq_is_on(const rtems_irq_connect_data *irq)
153{
154  return(inl(ETH0_EICR) & ETH_IR_EtherIntSum);
155}
156
157static void GT64260eth_isr(void)
158{
159  struct GTeth_softc *sc = root_GT64260eth_dev;
160  rtems_event_set  events=0;
161  uint32_t cause;
162
163
164  cause = inl(ETH0_EICR);
165  outl( ~cause,ETH0_EICR);  /* clear the ICR */
166
167  if ( (!cause) || (cause & 0x803d00)) {
168       sc->intr_errsts[sc->intr_err_ptr2++]=cause;
169       sc->intr_err_ptr2 %=INTR_ERR_SIZE;   /* Till Straumann */
170       events |= ERR_EVENT;
171  }
172
173  /* ETH_IR_RxBuffer_3|ETH_IR_RxError_3 */
174  if (cause & 0x880000) {
175     sc->stats.rxInterrupts++;
176     events |= RX_EVENT;
177  }
178  /* If there is an error, we want to continue to next descriptor */
179  /* ETH_IR_TxBufferHigh|ETH_IR_TxEndHigh|ETH_IR_TxErrorHigh */
180  if (cause & 0x444) {
181       sc->stats.txInterrupts++;
182       events |= TX_EVENT;
183       /* It seems to be unnecessary. However, it's there
184        * to be on the safe side due to the datasheet.
185        * So far, it does not seem to affect the network performance
186        * based on the EPICS catime.
187        */
188       /* ETH_ESDCMR_TXDH | ETH_ESDCMR_ERD = 0x800080 */
189       if ((sc->txq_nactive > 1)&& ((inl(ETH0_ESDCMR)&ETH_ESDCMR_TXDH)==0))
190          outl(0x800080,ETH0_ESDCMR);
191
192
193  }
194  rtems_event_send(sc->daemonTid, events);
195}
196
197static rtems_irq_connect_data GT64260ethIrqData={
198        BSP_MAIN_ETH0_IRQ,
199        (rtems_irq_hdl) GT64260eth_isr,
200        NULL,
201        (rtems_irq_enable) GT64260eth_irq_on,
202        (rtems_irq_disable) GT64260eth_irq_off,
203        (rtems_irq_is_enabled) GT64260eth_irq_is_on,
204};
205
206static void GT64260eth_init_hw(struct GTeth_softc *sc)
207{
208
209#ifdef GT_DEBUG
210  printk("GT64260eth_init_hw(");
211#endif
212  /* Kate Feng : Turn the hardware snoop on as MOTLoad did not have
213   * it on by default.
214   */
215  outl(RxBSnoopEn|TxBSnoopEn|RxDSnoopEn|TxDSnoopEn, GT_CUU_Eth0_AddrCtrlLow);
216  outl(HashSnoopEn, GT_CUU_Eth0_AddrCtrlHigh);
217
218  sc->rxq_intrbits=0;
219  sc->sc_flags=0;
220
221#ifndef GE_NORX
222  GTeth_rx_setup(sc);
223#endif
224
225#ifndef GE_NOTX
226  GTeth_tx_start(sc);
227#endif
228
229  sc->sc_pcr |= ETH_EPCR_HS_512;
230  outl(sc->sc_pcr, ETH0_EPCR);
231  outl(sc->sc_pcxr, ETH0_EPCXR); /* port config. extended reg. */
232  outl(0, ETH0_EICR); /* interrupt cause register */
233  outl(sc->sc_intrmask, ETH0_EIMR);
234#ifndef GE_NOHASH
235  /* Port Hash Table Pointer Reg*/
236  outl(((unsigned) sc->sc_hashtable),ETH0_EHTPR);
237#endif
238#ifndef GE_NORX
239  outl(ETH_ESDCMR_ERD,ETH0_ESDCMR); /* enable Rx DMA in SDMA Command Register */
240  sc->sc_flags |= GE_RXACTIVE;
241#endif
242#ifdef GT_DEBUG
243  printk("SDCMR 0x%x ", inl(ETH0_ESDCMR));
244#endif
245
246  /* connect the interrupt handler which should
247   * take care of enabling interrupts
248   */
249  if (!BSP_install_rtems_irq_handler(&GT64260ethIrqData))
250     printk("GT64260eth: unable to install ISR");
251
252  /* The ethernet port is ready to transmit/receive */
253  outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
254
255#ifdef GT_DEBUG
256  printk(")\n");
257#endif
258}
259
260static void GT64260eth_stop_hw(struct GTeth_softc *sc)
261{
262
263  printk("GT64260eth_stop_hw(");
264
265  /* remove our interrupt handler which will also
266  * disable interrupts at the MPIC and the device
267  * itself
268  */
269  if (!BSP_remove_rtems_irq_handler(&GT64260ethIrqData))
270     printk("GT64260eth: unable to remove IRQ handler!");
271
272  outl(sc->sc_pcr, ETH0_EPCR);
273  outl(0, ETH0_EIMR);
274
275  sc->arpcom.ac_if.if_flags &= ~IFF_RUNNING;
276#ifndef GE_NOTX
277  GTeth_tx_stop(sc);
278#endif
279#ifndef GE_NORX
280  GTeth_rx_stop(sc);
281#endif
282  sc->sc_hashtable = NULL;
283  if (GTeth_debug>0) printk(")");
284}
285
286static void GT64260eth_stop(struct GTeth_softc *sc)
287{
288  if (GTeth_debug>0) printk("GT64260eth_stop(");
289
290  /* The hardware is shutdown in the daemon */
291  /* kill the daemon. We also must release the networking
292   * semaphore or there'll be a deadlock...
293   */
294  rtems_event_send(sc->daemonTid, KILL_EVENT);
295  rtems_bsdnet_semaphore_release();
296
297  sc->daemonTid=0;
298  /* now wait for it to die */
299  rtems_semaphore_obtain(sc->daemonSync,RTEMS_WAIT,RTEMS_NO_TIMEOUT);
300
301  /* reacquire the bsdnet semaphore */
302  rtems_bsdnet_semaphore_obtain();
303  if (GTeth_debug>0) printk(")");
304}
305
306static void GT64260eth_ifinit(void *arg)
307{
308  struct GTeth_softc *sc = (struct GTeth_softc*)arg;
309  int i;
310
311#ifdef GT_DEBUG
312  printk("GT64260eth_ifinit(): daemon ID: 0x%08x)\n", sc->daemonTid);
313#endif
314  if (sc->daemonTid) {
315#ifdef GT_DEBUG
316     printk("GT64260eth: daemon already up, doing nothing\n");
317#endif
318     return;
319  }
320
321#ifndef GE_NOHASH
322  /* Mvme5500, the user must initialize the hash table before enabling the
323   * Ethernet controller
324   */
325  GTeth_hash_init(sc);
326  GTeth_hash_fill(sc);
327#endif
328
329  sc->intr_err_ptr1=0;
330  sc->intr_err_ptr2=0;
331  for (i=0; i< INTR_ERR_SIZE; i++) sc->intr_errsts[i]=0;
332
333  /* initialize the hardware (we are holding the network semaphore at this point) */
334  (void)GT64260eth_init_hw(sc);
335
336  /* launch network daemon */
337
338  /* NOTE:
339   * in ss-20011025 (and later) any task created by 'bsdnet_newproc' is
340   * wrapped by code which acquires the network semaphore...
341   */
342   sc->daemonTid = rtems_bsdnet_newproc(GT_ETH_TASK_NAME,4096,GT64260eth_daemon,arg);
343
344  /* Tell the world that we're running */
345  sc->arpcom.ac_if.if_flags |= IFF_RUNNING;
346
347}
348
349/* attach parameter tells us whether to attach or to detach the driver */
350/* Attach this instance, and then all the sub-devices */
351int rtems_GT64260eth_driver_attach(struct rtems_bsdnet_ifconfig *config, int attach)
352{
353  struct GTeth_softc *sc;
354  struct ifnet *ifp;
355  unsigned sdcr, data;
356  unsigned char hwaddr[6];
357  int i, unit, phyaddr;
358  void     *softc_mem;
359  char     *name;
360
361  unit = rtems_bsdnet_parse_driver_name(config, &name);
362  if (unit < 0) return 0;
363
364  printk("\nEthernet driver name %s unit %d \n",name, unit);
365  printk("RTEMS-mvme5500 BSP Copyright (c) 2004, Brookhaven National Lab., Shuchen Kate Feng \n");
366  /* Make certain elements e.g. descriptor lists are aligned. */
367  softc_mem = rtems_bsdnet_malloc(sizeof(*sc) + SOFTC_ALIGN, M_FREE, M_NOWAIT);
368
369  /* Check for the very unlikely case of no memory. */
370  if (softc_mem == NULL)
371     printk("GT64260eth: OUT OF MEMORY");
372
373  sc = (void *)(((long)softc_mem + SOFTC_ALIGN) & ~SOFTC_ALIGN);
374  memset(sc, 0, sizeof(*sc));
375
376  if (GTeth_debug>0) printk("txq_desc[0] addr:%x, rxq_desc[0] addr:%x, sizeof sc %d\n",&sc->txq_desc[0], &sc->rxq_desc[0], sizeof(*sc));
377
378  sc->sc_macno = unit-1;
379
380  data = inl(ETH_EPAR);
381  phyaddr = ETH_EPAR_PhyAD_GET(data, sc->sc_macno);
382
383  /* try to read HW address from the device if not overridden
384   * by config
385   */
386  if (config->hardware_address) {
387     memcpy(hwaddr, config->hardware_address, ETHER_ADDR_LEN);
388  } else {
389    printk("Read EEPROM ");
390     for (i = 0; i < 6; i++)
391       hwaddr[i] = ReadConfVPD_buff(VPD_ENET0_OFFSET+i);
392  }
393
394#ifdef GT_DEBUG
395  printk("using MAC addr from device:");
396  for (i = 0; i < ETHER_ADDR_LEN; i++) printk("%x:", hwaddr[i]);
397  printk("\n");
398#endif
399
400  memcpy(sc->arpcom.ac_enaddr, hwaddr, ETHER_ADDR_LEN);
401
402  ifp = &sc->arpcom.ac_if;
403
404  sc->sc_pcr = inl(ETH0_EPCR);
405  sc->sc_pcxr = inl(ETH0_EPCXR);
406  sc->sc_intrmask = inl(ETH0_EIMR) | ETH_IR_MIIPhySTC;
407
408  printk("address %s\n", ether_sprintf(hwaddr));
409
410#ifdef GT_DEBUG
411  printk(", pcr %x, pcxr %x ", sc->sc_pcr, sc->sc_pcxr);
412#endif
413
414
415  sc->sc_pcxr |= ETH_EPCXR_PRIOrx_Override;
416  sc->sc_pcxr |= (3<<6); /* highest priority only */
417  sc->sc_pcxr &= ~ETH_EPCXR_RMIIEn;  /* MII mode */
418
419  /* Max. Frame Length (packet) allowed for reception is 1536 bytes,
420   * instead of 2048 (MOTLoad default) or 64K.
421   */
422  sc->sc_pcxr &= ~(3 << 14);
423  sc->sc_pcxr |= (ETH_EPCXR_MFL_1536 << 14);
424  sc->sc_max_frame_length = PKT_BUF_SZ;
425
426
427  if (sc->sc_pcr & ETH_EPCR_EN) {
428      int tries = 1000;
429      /* Abort transmitter and receiver and wait for them to quiese*/
430      outl(ETH_ESDCMR_AR|ETH_ESDCMR_AT,ETH0_ESDCMR);
431      do {
432        rtems_bsp_delay(100);
433      } while (tries-- > 0 && (inl(ETH0_ESDCMR) & (ETH_ESDCMR_AR|ETH_ESDCMR_AT)));
434  }
435#ifdef GT_DEBUG
436  printk(", phy %d (mii)\n", phyaddr);
437  printk("ETH0_ESDCMR %x ", inl(ETH0_ESDCMR));
438#endif
439
440  sc->sc_pcr &= ~(ETH_EPCR_EN | ETH_EPCR_RBM | ETH_EPCR_PM | ETH_EPCR_PBF);
441
442#ifdef GT_DEBUG
443        printk("Now sc_pcr %x,sc_pcxr %x", sc->sc_pcr, sc->sc_pcxr);
444#endif
445
446  /*
447   * Now turn off the GT.  If it didn't quiese, too ***ing bad.
448   */
449  outl(sc->sc_pcr, ETH0_EPCR);
450  outl(sc->sc_intrmask, ETH0_EIMR);
451  sdcr = inl(ETH0_ESDCR);
452  /* Burst size is limited to 4 64bit words */
453  ETH_ESDCR_BSZ_SET(sdcr, ETH_ESDCR_BSZ_4);
454  sdcr |= ETH_ESDCR_RIFB;/*limit interrupt on frame boundaries, instead of buffer*/
455#if 0
456  sdcr &= ~(ETH_ESDCR_BLMT|ETH_ESDCR_BLMR); /* MOTLoad defualt Big-endian */
457#endif
458  outl(sdcr, ETH0_ESDCR);
459
460#ifdef GT_DEBUG
461  printk("sdcr %x \n", sdcr);
462#endif
463
464  if (phyaddr== -1) printk("MII auto negotiation ?");
465
466  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
467
468  ifp->if_softc = sc;
469
470  /* set this interface's name and unit */
471  ifp->if_unit = unit;
472  ifp->if_name = name;
473
474  ifp->if_mtu = config->mtu ? config->mtu : ETHERMTU;
475
476  ifp->if_init = GT64260eth_ifinit;
477  ifp->if_ioctl = GTeth_ifioctl;
478  ifp->if_start = GTeth_ifstart;
479  ifp->if_output = ether_output;
480
481  /*  ifp->if_watchdog = GTeth_ifwatchdog;*/
482
483  if (ifp->if_snd.ifq_maxlen == 0)
484    ifp->if_snd.ifq_maxlen = ifqmaxlen;
485
486  /* create the synchronization semaphore */
487  if (RTEMS_SUCCESSFUL != rtems_semaphore_create(
488     rtems_build_name('G','e','t','h'),0,0,0,&sc->daemonSync))
489     printk("GT64260eth: semaphore creation failed");
490
491  sc->next_module = root_GT64260eth_dev;
492  root_GT64260eth_dev = sc;
493
494  /* Actually attach the interface */
495  if_attach(ifp);
496  ether_ifattach(ifp);
497
498#ifdef GT_DEBUG
499  printk("GT64260eth: Ethernet driver has been attached (handle 0x%08x,ifp 0x%08x)\n",sc, ifp);
500#endif
501
502  return(1);
503}
504
505static void GT64260eth_stats(struct GTeth_softc *sc)
506{
507#if 0
508  struct ifnet *ifp = &sc->arpcom.ac_if;
509
510  printf("       Rx Interrupts:%-8lu\n", sc->stats.rxInterrupts);
511  printf("     Receive Packets:%-8lu\n", ifp->if_ipackets);
512  printf("     Receive  errors:%-8lu\n", ifp->if_ierrors);
513  printf("      Framing Errors:%-8lu\n", sc->stats.frame_errors);
514  printf("          Crc Errors:%-8lu\n", sc->stats.crc_errors);
515  printf("    Oversized Frames:%-8lu\n", sc->stats.length_errors);
516  printf("         Active Rxqs:%-8u\n",  sc->rxq_active);
517  printf("       Tx Interrupts:%-8lu\n", sc->stats.txInterrupts);
518#endif
519  printf("Multi-BuffTx Packets:%-8lu\n", sc->stats.txMultiBuffPacket);
520  printf("Multi-BuffTx max len:%-8lu\n", sc->stats.txMultiMaxLen);
521  printf("SingleBuffTx max len:%-8lu\n", sc->stats.txSinglMaxLen);
522  printf("Multi-BuffTx maxloop:%-8lu\n", sc->stats.txMultiMaxLoop);
523  printf("Tx buffer max len   :%-8lu\n", sc->stats.txBuffMaxLen);
524#if 0
525  printf("   Transmitt Packets:%-8lu\n", ifp->if_opackets);
526  printf("   Transmitt  errors:%-8lu\n", ifp->if_oerrors);
527  printf("    Tx/Rx collisions:%-8lu\n", ifp->if_collisions);
528  printf("         Active Txqs:%-8u\n", sc->txq_nactive);
529#endif
530}
531
532void GT64260eth_printStats(void)
533{
534  GT64260eth_stats(root_GT64260eth_dev);
535}
536
537static int GTeth_ifioctl(struct ifnet *ifp, ioctl_command_t cmd, caddr_t data)
538{
539  struct GTeth_softc *sc = ifp->if_softc;
540  struct ifreq *ifr = (struct ifreq *) data;
541
542  int error = 0;
543
544#ifdef GT_DEBUG
545  printk("GTeth_ifioctl(");
546#endif
547
548  switch (cmd) {
549    default:
550      if (GTeth_debug >0) {
551         printk("etherioctl(");
552         if (cmd== SIOCSIFADDR) printk("SIOCSIFADDR ");
553      }
554      return ether_ioctl(ifp, cmd, data);
555
556    case SIOCSIFFLAGS:
557       switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) {
558            case IFF_RUNNING:   /* not up, so we stop */
559                 GT64260eth_stop(sc);
560                 break;
561            case IFF_UP:  /* not running, so we start */
562                 GT64260eth_ifinit(sc);
563                 break;
564            case IFF_UP|IFF_RUNNING:/* active->active, update */
565                 GT64260eth_stop(sc);
566                 GT64260eth_ifinit(sc);
567                 break;
568            default:                    /* idle->idle: do nothing */
569                 break;
570       }
571       break;
572    case SIO_RTEMS_SHOW_STATS:
573       GT64260eth_stats (sc);
574       break;
575    case SIOCADDMULTI:
576    case SIOCDELMULTI:
577       error = (cmd == SIOCADDMULTI)
578                  ? ether_addmulti(ifr, &sc->arpcom)
579                  : ether_delmulti(ifr, &sc->arpcom);
580       if (error == ENETRESET) {
581           if (ifp->if_flags & IFF_RUNNING)
582              GTeth_ifchange(sc);
583           else
584              error = 0;
585       }
586       break;
587    case SIOCSIFMTU:
588       if (ifr->ifr_mtu > ETHERMTU || ifr->ifr_mtu < ETHERMIN) {
589          error = EINVAL;
590          break;
591       }
592       ifp->if_mtu = ifr->ifr_mtu;
593       break;
594  }
595
596#ifdef GT_DEBUG
597  printk("exit ioctl\n");
598#endif
599  return error;
600}
601
602static void GTeth_ifstart(struct ifnet *ifp)
603{
604  struct GTeth_softc *sc = ifp->if_softc;
605
606#ifdef GT_DEBUG
607  printk("GTeth_ifstart(");
608#endif
609
610  if ((ifp->if_flags & IFF_RUNNING) == 0) {
611#ifdef GT_DEBUG
612     printk("IFF_RUNNING==0\n");
613#endif
614     return;
615  }
616
617  ifp->if_flags |= IFF_OACTIVE;
618  rtems_event_send (sc->daemonTid, START_TRANSMIT_EVENT);
619#ifdef GT_DEBUG
620  printk(")\n");
621#endif
622}
623
624/* Initialize the Rx rings */
625static void GTeth_init_rx_ring(struct GTeth_softc *sc)
626{
627  int i;
628  volatile struct GTeth_desc *rxd;
629  unsigned nxtaddr;
630
631  sc->rxq_fi=0;
632  sc->rxq_head_desc = &sc->rxq_desc[0];
633  rxd = sc->rxq_head_desc;
634
635  sc->rxq_desc_busaddr = (unsigned long) sc->rxq_head_desc;
636#ifdef GT_DEBUG
637  printk("rxq_desc_busaddr %x ,&sc->rxq_desc[0] %x\n",
638        sc->rxq_desc_busaddr, sc->rxq_head_desc);
639#endif
640
641  nxtaddr = sc->rxq_desc_busaddr + sizeof(*rxd);
642  sc->rx_buf_sz = (sc->arpcom.ac_if.if_mtu <= 1500 ? PKT_BUF_SZ : sc->arpcom.ac_if.if_mtu + 32);
643  sc->rxq_active = RX_RING_SIZE;
644
645  for (i = 0; i < RX_RING_SIZE; i++, rxd++, nxtaddr += sizeof(*rxd)) {
646    struct mbuf *m;
647
648    rxd->ed_lencnt= sc->rx_buf_sz <<16;
649    rxd->ed_cmdsts = RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI;
650
651    MGETHDR(m, M_WAIT, MT_DATA);
652    MCLGET(m, M_WAIT);
653    m->m_pkthdr.rcvif =  &sc->arpcom.ac_if;
654    sc->rxq_mbuf[i] = m;
655
656    /* convert mbuf pointer to data pointer of correct type */
657    rxd->ed_bufptr = (unsigned) mtod(m, void *);
658
659    /*
660     * update the nxtptr to point to the next txd.
661     */
662    if (i == RX_RING_SIZE - 1)
663        nxtaddr = sc->rxq_desc_busaddr;
664    rxd->ed_nxtptr = nxtaddr;
665
666#ifdef GT_DEBUG
667  printk("ed_lencnt %x, rx_buf_sz %x ",rxd->ed_lencnt, sc->rx_buf_sz);
668  printk("ed_cmdsts %x \n",rxd->ed_cmdsts);
669  printk("mbuf @ 0x%x, next desc. @ 0x%x\n",rxd->ed_bufptr,rxd->ed_nxtptr);
670#endif
671  }
672}
673
674void GTeth_rxprio_setup(struct GTeth_softc *sc)
675{
676
677  GTeth_init_rx_ring(sc);
678
679  sc->rxq_intrbits = ETH_IR_RxBuffer|ETH_IR_RxError|ETH_IR_RxBuffer_3|ETH_IR_RxError_3;
680}
681
682static int GT64260eth_rx(struct GTeth_softc *sc)
683{
684  struct ifnet *ifp = &sc->arpcom.ac_if;
685  struct mbuf *m;
686  int nloops=0;
687
688#ifdef GT_DEBUG
689  if (GTeth_rx_debug>0) printk("GT64260eth_rx(");
690#endif
691
692  while (sc->rxq_active > 0) {
693    volatile struct GTeth_desc *rxd = &sc->rxq_desc[sc->rxq_fi];
694    struct ether_header *eh;
695    unsigned int cmdsts;
696    unsigned int byteCount;
697
698    cmdsts = rxd->ed_cmdsts;
699
700    /*
701     * Sometimes the GE "forgets" to reset the ownership bit.
702     * But if the length has been rewritten, the packet is ours
703     * so pretend the O bit is set.
704     *
705     */
706    byteCount = rxd->ed_lencnt & 0xffff;
707
708    if (cmdsts & RX_CMD_O) {
709      if (byteCount == 0)
710         return(0);
711
712     /* <Kate Feng> Setting command/status to be zero seems to eliminate
713      * the spurious interrupt associated with the GE_FORGOT issue.
714      */
715      rxd->ed_cmdsts=0;
716
717#ifdef GE_FORGOT
718      /*
719       * For dignosis purpose only. Not a good practice to turn it on
720       */
721      printk("Rxq %d %d %d\n", sc->rxq_fi, byteCount,nloops);
722#endif
723    }
724
725    /* GT gave the ownership back to the CPU or the length has
726     * been rewritten , which means there
727     * is new packet in the descriptor/buffer
728     */
729
730    nloops++;
731    /*
732     * If this is not a single buffer packet with no errors
733     * or for some reason it's bigger than our frame size,
734     * ignore it and go to the next packet.
735     */
736    if ((cmdsts & (RX_CMD_F|RX_CMD_L|RX_STS_ES)) !=
737                            (RX_CMD_F|RX_CMD_L) ||
738                    byteCount > sc->sc_max_frame_length) {
739        --sc->rxq_active;
740        ifp->if_ipackets++;
741        ifp->if_ierrors++;
742        if (cmdsts & RX_STS_OR) sc->stats.or_errors++;
743        if (cmdsts & RX_STS_CE) sc->stats.crc_errors++;
744        if (cmdsts & RX_STS_MFL) sc->stats.length_errors++;
745        if (cmdsts & RX_STS_SF) sc->stats.frame_errors++;
746        if ((cmdsts & RX_STS_LC) || (cmdsts & RX_STS_COL))
747           ifp->if_collisions++;
748        /* recycle the buffer */
749        m->m_len=sc->rx_buf_sz;       
750    }
751    else {
752        m = sc->rxq_mbuf[sc->rxq_fi];
753        m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);
754        eh = mtod (m, struct ether_header *);
755        m->m_data += sizeof(struct ether_header);
756        ether_input (ifp, eh, m);
757
758        ifp->if_ipackets++;
759        ifp->if_ibytes+=byteCount;
760        --sc->rxq_active;
761        MGETHDR (m, M_WAIT, MT_DATA);
762        MCLGET (m, M_WAIT);
763     }
764     m->m_pkthdr.rcvif = ifp;
765     sc->rxq_mbuf[sc->rxq_fi]= m;
766     /* convert mbuf pointer to data pointer of correct type */
767     rxd->ed_bufptr = (unsigned) mtod(m, void*);
768     rxd->ed_lencnt = (unsigned long) sc->rx_buf_sz <<16;
769     rxd->ed_cmdsts = RX_CMD_F|RX_CMD_L|RX_CMD_O|RX_CMD_EI;
770
771     if (++sc->rxq_fi == RX_RING_SIZE) sc->rxq_fi = 0;
772
773     sc->rxq_active++;
774  } /* while (sc->rxq_active > 0) */
775#ifdef GT_DEBUG
776  if (GTeth_rx_debug>0) printk(")");
777#endif
778  return nloops;
779}
780
781static void GTeth_rx_setup(struct GTeth_softc *sc)
782{
783
784  if (GTeth_rx_debug>0) printk("GTeth_rx_setup(");
785
786  GTeth_rxprio_setup(sc);
787
788  if ((sc->sc_flags & GE_RXACTIVE) == 0) {
789     /* First Rx Descriptor Pointer 3 */
790     outl( sc->rxq_desc_busaddr, ETH0_EFRDP3);
791     /* Current Rx Descriptor Pointer 3 */
792     outl( sc->rxq_desc_busaddr,ETH0_ECRDP3);
793#ifdef GT_DEBUG
794     printk("ETH0_EFRDP3 0x%x, ETH0_ECRDP3 0x%x \n", inl(ETH0_EFRDP3),
795            inl(ETH0_ECRDP3));
796#endif
797  }
798  sc->sc_intrmask |= sc->rxq_intrbits;
799
800  if (GTeth_rx_debug>0) printk(")\n");
801}
802
803static void GTeth_rx_cleanup(struct GTeth_softc *sc)
804{
805  int i;
806
807  if (GTeth_rx_debug>0) printk( "GTeth_rx_cleanup(");
808
809  for (i=0; i< RX_RING_SIZE; i++) {
810    if (sc->rxq_mbuf[i]) {
811      m_freem(sc->rxq_mbuf[i]);
812      sc->rxq_mbuf[i]=0;
813    }
814  }
815  if (GTeth_rx_debug>0) printk(")");
816}
817
818static void GTeth_rx_stop(struct GTeth_softc *sc)
819{
820  if (GTeth_rx_debug>0) printk( "GTeth_rx_stop(");
821  sc->sc_flags &= ~GE_RXACTIVE;
822  sc->sc_idlemask &= ~(ETH_IR_RxBits|ETH_IR_RxBuffer_3|ETH_IR_RxError_3);
823  sc->sc_intrmask &= ~(ETH_IR_RxBits|ETH_IR_RxBuffer_3|ETH_IR_RxError_3);
824  outl(sc->sc_intrmask, ETH0_EIMR);
825  outl(ETH_ESDCMR_AR, ETH0_ESDCMR); /* abort receive */
826  do {
827     rtems_bsp_delay(10);
828  } while (inl(ETH0_ESDCMR) & ETH_ESDCMR_AR);
829  GTeth_rx_cleanup(sc);
830  if (GTeth_rx_debug>0) printk(")");
831}
832
833static void GTeth_txq_free(struct GTeth_softc *sc, unsigned cmdsts)
834{
835  struct ifnet *ifp = &sc->arpcom.ac_if;
836  volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_fi];
837
838  /* ownership is sent back to CPU */
839  if (GTeth_debug>0) printk("txq%d,active %d\n", sc->txq_fi, sc->txq_nactive);
840
841  txd->ed_cmdsts &= ~TX_CMD_O; /* <skf> in case GT forgot */
842
843  /* statistics */
844  ifp->if_opackets++;
845  ifp->if_obytes += sc->txq_mbuf[sc->txq_fi]->m_len;
846  if (cmdsts & TX_STS_ES) {
847       ifp->if_oerrors++;
848       if ((cmdsts & TX_STS_LC) || (cmdsts & TX_STS_COL))
849           ifp->if_collisions++;
850  }
851  /* Free the original mbuf chain */
852  m_freem(sc->txq_mbuf[sc->txq_fi]);
853  sc->txq_mbuf[sc->txq_fi] = 0;
854  ifp->if_timer = 5;
855
856  sc->txq_free++;
857  if (++sc->txq_fi == TX_RING_SIZE) sc->txq_fi = 0;
858  --sc->txq_nactive;
859}
860
861#if UNUSED
862static int txq_high_limit(struct GTeth_softc *sc)
863{
864  /*
865   * Have we [over]consumed our limit of descriptors?
866   * Do we have enough free descriptors?
867   */
868  if ( TX_RING_SIZE == sc->txq_nactive + TXQ_HiLmt_OFF) {
869     volatile struct GTeth_desc *txd2 = &sc->txq_desc[sc->txq_fi];
870     unsigned cmdsts;
871
872     cmdsts = txd2->ed_cmdsts;
873     if (cmdsts & TX_CMD_O) {  /* Ownership (1=GT 0=CPU) */
874         int nextin;
875
876         /*
877          * Sometime the Discovery forgets to update the
878          * last descriptor.  See if CPU owned the descriptor
879          * after it (since we know we've turned that to
880          * the discovery and if CPU owned it, the Discovery
881          * gave it back).  If CPU does, we know the Discovery
882          * gave back this one but forgot to mark it back to CPU.
883          */
884         nextin = (sc->txq_fi + 1) % TX_RING_SIZE;
885         if (sc->txq_desc[nextin].ed_cmdsts & TX_CMD_O) {
886#if 0
887            printk("Overconsuming Tx descriptors!\n");
888#endif
889            return 1;
890         }
891         printk("Txq %d forgot\n", sc->txq_fi);
892     }
893    /* Txq ring is almost full, let's free the current buffer here */
894#if 0
895    printk("Txq ring near full, free desc%d\n",sc->txq_fi);
896#endif
897    GTeth_txq_free(sc, cmdsts);
898  } /* end if ( TX_RING_SIZE == sc->txq_nactive + TXQ_HiLmt_OFF) */
899  return 0;
900}
901#endif
902
903#define MAX(a,b) (((a) > (b)) ? (a) : (b))
904
905static int GT64260eth_sendpacket(struct GTeth_softc *sc,struct mbuf *m)
906{
907  volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_lo];
908  unsigned intrmask = sc->sc_intrmask;
909  unsigned loop=0, index= sc->txq_lo;
910
911  /*
912   * The end-of-list descriptor we put on last time is the starting point
913   * for this packet.  The GT is supposed to terminate list processing on
914   * a NULL nxtptr but that currently is broken so a CPU-owned descriptor
915   * must terminate the list.
916   */
917  intrmask = sc->sc_intrmask;
918
919  if ( !(m->m_next)) {/* single buffer packet */
920    sc->txq_mbuf[index]= m;
921    sc->stats.txSinglMaxLen= MAX(m->m_len, sc->stats.txSinglMaxLen);
922  }
923  else /* multiple mbufs in this packet */
924  {
925    struct mbuf *mtp, *mdest;
926    volatile unsigned char *pt;
927    int len, y;
928
929#ifdef GT_DEBUG
930    printk("multi mbufs ");
931#endif
932    MGETHDR(mdest, M_WAIT, MT_DATA);
933    MCLGET(mdest, M_WAIT);
934    pt = (volatile unsigned char *)mdest->m_data;
935    for (mtp=m,len=0;mtp;mtp=mtp->m_next) {
936      loop++;
937      if ( (y=(len+mtp->m_len)) > sizeof(union mcluster)) {
938        /* GT64260 allows us to chain the remaining to the next
939         * free descriptors.
940         */
941        printk("packet size %x > mcluster %x\n", y,sizeof(union mcluster));
942        printk("GT64260eth : packet too large ");
943      }
944      memcpy((void *)pt,(char *)mtp->m_data, mtp->m_len);
945      pt += mtp->m_len;
946#if 0
947    printk("%d ",mtp->m_len);
948#endif
949      len += mtp->m_len;
950      sc->stats.txBuffMaxLen=MAX(mtp->m_len,sc->stats.txBuffMaxLen);
951    }
952    sc->stats.txMultiMaxLoop=MAX(loop, sc->stats.txMultiMaxLoop);
953#if 0
954    printk("\n");
955#endif
956    mdest->m_len=len;
957    /* free old mbuf chain */
958    m_freem(m);
959    sc->txq_mbuf[index] = m = mdest;
960    sc->stats.txMultiBuffPacket++;
961    sc->stats.txMultiMaxLen= MAX(m->m_len, sc->stats.txMultiMaxLen);
962  }
963  if (m->m_len < ET_MINLEN) m->m_len = ET_MINLEN;
964
965  txd->ed_bufptr = (unsigned) mtod(m, void*);
966  txd->ed_lencnt = m->m_len << 16;
967  /*txd->ed_cmdsts = TX_CMD_L|TX_CMD_GC|TX_CMD_P|TX_CMD_O|TX_CMD_F|TX_CMD_EI;*/
968  txd->ed_cmdsts = 0x80c70000;
969  while (txd->ed_cmdsts != 0x80c70000);
970  memBar();
971
972#ifdef GT_DEBUG
973  printk("len = %d, cmdsts 0x%x ", m->m_len,txd->ed_cmdsts);
974#endif
975
976  /*
977   * Tell the SDMA engine to "Fetch!"
978   * Start Tx high.
979   */
980  sc->txq_nactive++;
981  outl(0x800080, ETH0_ESDCMR); /* ETH_ESDCMR_TXDH| ETH_ESDCMR_ERD */
982  if ( ++sc->txq_lo == TX_RING_SIZE) sc->txq_lo = 0;
983  sc->txq_free--;
984
985#if 0
986  /*
987   * Since we have put an item into the packet queue, we now want
988   * an interrupt when the transmit queue finishes processing the
989   * list.  But only update the mask if needs changing.
990   */
991  intrmask |= sc->txq_intrbits & ( ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh);
992  if (sc->sc_intrmask != intrmask) {
993      sc->sc_intrmask = intrmask;
994      outl(sc->sc_intrmask, ETH0_EIMR);
995  }
996#endif
997
998#if 0
999  printk("EICR= %x, EIMR= %x ", inl(ETH0_EICR), inl(ETH0_EIMR));
1000  printk("%s:transmit frame #%d queued in slot %d.\n",
1001              sc->arpcom.ac_if.if_name, sc->txq_lo, index);
1002  printk("pcr %x, pcxr %x DMA dcr %x cmr %x\n", inl(ETH0_EPCR), inl(ETH0_EPCXR), inl(ETH0_ESDCR), inl(ETH0_ESDCMR));
1003#endif
1004
1005  return 1;
1006}
1007
1008static unsigned GTeth_txq_done(struct GTeth_softc *sc)
1009{
1010  if (GTeth_debug>0) printk("Txdone(" );
1011
1012  while (sc->txq_nactive > 0) {
1013    /* next to be returned to the CPU */
1014    volatile struct GTeth_desc *txd = &sc->txq_desc[sc->txq_fi];
1015    unsigned cmdsts;
1016
1017    /* if GT64260 still owns it ....... */
1018    if ((cmdsts = txd->ed_cmdsts) & TX_CMD_O) {
1019       int nextin;
1020
1021       /* Someone quoted :
1022        * "Sometimes the Discovery forgets to update the
1023        * ownership bit in the descriptor."
1024        * <skf> More correctly, the last descriptor of each
1025        * transmitted frame is returned to CPU ownership and
1026        * status is updated only after the actual transmission
1027        * of the packet is completed.  Also, if there is an error
1028        * during transmission, we want to continue the
1029        * transmission of the next descriptor, in additions to
1030        * reporting the error.
1031        */
1032       /* The last descriptor */
1033       if (sc->txq_nactive == 1) return(0);
1034
1035       /*
1036        * Sometimes the Discovery forgets to update the
1037        * ownership bit in the descriptor.  See if CPU owned
1038        * the descriptor after it (since we know we've turned
1039        * that to the Discovery and if CPU owned it now then the
1040        * Discovery gave it back).  If we do, we know the
1041        * Discovery gave back this one but forgot to mark it
1042        * back to CPU.
1043        */
1044       nextin = (sc->txq_fi + 1) % TX_RING_SIZE;
1045
1046       if (sc->txq_desc[nextin].ed_cmdsts & TX_CMD_O) return(0);
1047       printk("Txq%d forgot\n",sc->txq_fi);
1048    } /* end checking GT64260eth owner */
1049    GTeth_txq_free(sc, cmdsts);
1050  }  /* end while */
1051  if (GTeth_debug>0) printk(")\n");
1052  return(1);
1053}
1054
1055static void GTeth_tx_start(struct GTeth_softc *sc)
1056{
1057  int i;
1058  volatile struct GTeth_desc *txd;
1059  unsigned nxtaddr;
1060
1061#ifdef GT_DEBUG
1062  printk("GTeth_tx_start(");
1063#endif
1064  sc->sc_intrmask &= ~(ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh|
1065                             ETH_IR_TxEndLow |ETH_IR_TxBufferLow);
1066
1067  txd = &sc->txq_desc[0];
1068  sc->txq_desc_busaddr = (unsigned long) &sc->txq_desc[0];
1069#ifdef GT_DEBUG
1070  printk("txq_desc_busaddr %x, &sc->txq_desc[0] %x \n",
1071         sc->txq_desc_busaddr,&sc->txq_desc[0]);
1072#endif
1073
1074  nxtaddr = sc->txq_desc_busaddr + sizeof(*txd);
1075
1076  sc->txq_pendq.ifq_maxlen = 10;
1077  sc->txq_pendq.ifq_head= NULL;
1078  sc->txq_pendq.ifq_tail= NULL;
1079  sc->txq_nactive = 0;
1080  sc->txq_fi = 0;
1081  sc->txq_lo = 0;
1082  sc->txq_inptr = PKT_BUF_SZ;
1083  sc->txq_outptr = 0;
1084  sc->txq_free = TX_RING_SIZE;
1085
1086  for (i = 0; i < TX_RING_SIZE;
1087       i++, txd++,  nxtaddr += sizeof(*txd)) {
1088      sc->txq_mbuf[i]=0;
1089      txd->ed_bufptr = 0;
1090
1091      /*
1092       * update the nxtptr to point to the next txd.
1093       */
1094      txd->ed_cmdsts = 0;
1095      if ( i== TX_RING_SIZE-1) nxtaddr = sc->txq_desc_busaddr;
1096      txd->ed_nxtptr =  nxtaddr;
1097#ifdef GT_DEBUG
1098      printk("next desc. @ 0x%x\n",txd->ed_nxtptr);
1099#endif
1100  }
1101
1102  sc->txq_intrbits = ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh;
1103  sc->txq_esdcmrbits = ETH_ESDCMR_TXDH; /* Start Tx high */
1104  sc->txq_epsrbits = ETH_EPSR_TxHigh;
1105  /* offset to current tx desc ptr reg */
1106  sc->txq_ectdp = (caddr_t)ETH0_ECTDP1;
1107  /* Current Tx Desc Pointer 1 */
1108  outl(sc->txq_desc_busaddr,ETH0_ECTDP1);
1109
1110#ifdef GT_DEBUG
1111  printk(")\n");
1112#endif
1113}
1114
1115static void GTeth_tx_cleanup(struct GTeth_softc *sc)
1116{
1117  int i;
1118
1119  for (i=0; i< TX_RING_SIZE; i++) {
1120    if (sc->txq_mbuf[i]) {
1121      m_freem(sc->txq_mbuf[i]);
1122      sc->txq_mbuf[i]=0;
1123    }
1124  }
1125}
1126
1127static void GTeth_tx_stop(struct GTeth_softc *sc)
1128{
1129  /* SDMA command register : stop Tx high and low */
1130  outl(ETH_ESDCMR_STDH|ETH_ESDCMR_STDL, ETH0_ESDCMR);
1131
1132  GTeth_txq_done(sc);
1133  sc->sc_intrmask &= ~(ETH_IR_TxEndHigh|ETH_IR_TxBufferHigh|
1134                             ETH_IR_TxEndLow |ETH_IR_TxBufferLow);
1135  GTeth_tx_cleanup(sc);
1136
1137  sc->arpcom.ac_if.if_timer = 0;
1138}
1139
1140static void GTeth_ifchange(struct GTeth_softc *sc)
1141{
1142  if (GTeth_debug>0) printk("GTeth_ifchange(");
1143  if (GTeth_debug>5) printk("(pcr=%#x,imr=%#x)",inl(ETH0_EPCR),inl(ETH0_EIMR));
1144  /*  printk("SIOCADDMULTI (SIOCDELMULTI): is it about rx or tx ?\n");*/
1145  outl(sc->sc_pcr | ETH_EPCR_EN, ETH0_EPCR);
1146  outl(sc->sc_intrmask, ETH0_EIMR);
1147  GTeth_ifstart(&sc->arpcom.ac_if);
1148  /* Current Tx Desc Pointer 0 and 1 */
1149  if (GTeth_debug>5) printk("(ectdp0=%#x, ectdp1=%#x)",
1150            inl(ETH0_ECTDP0), inl(ETH0_ECTDP1));
1151  if (GTeth_debug>0) printk(")");
1152}
1153
1154static int GTeth_hash_compute(struct GTeth_softc *sc,unsigned char eaddr[ETHER_ADDR_LEN])
1155{
1156  unsigned w0, add0, add1;
1157  unsigned result;
1158
1159  if (GTeth_debug>0) printk("GTeth_hash_compute(");
1160  add0 = ((unsigned) eaddr[5] <<  0) |
1161         ((unsigned) eaddr[4] <<  8) |
1162         ((unsigned) eaddr[3] << 16);
1163
1164  add0 = ((add0 & 0x00f0f0f0) >> 4) | ((add0 & 0x000f0f0f) << 4);
1165  add0 = ((add0 & 0x00cccccc) >> 2) | ((add0 & 0x00333333) << 2);
1166  add0 = ((add0 & 0x00aaaaaa) >> 1) | ((add0 & 0x00555555) << 1);
1167
1168  add1 = ((unsigned) eaddr[2] <<  0) |
1169         ((unsigned) eaddr[1] <<  8) |
1170         ((unsigned) eaddr[0] << 16);
1171
1172  add1 = ((add1 & 0x00f0f0f0) >> 4) | ((add1 & 0x000f0f0f) << 4);
1173  add1 = ((add1 & 0x00cccccc) >> 2) | ((add1 & 0x00333333) << 2);
1174  add1 = ((add1 & 0x00aaaaaa) >> 1) | ((add1 & 0x00555555) << 1);
1175
1176#ifdef GT_DEBUG
1177  printk("eaddr= %s add1:%x add0:%x\n", ether_sprintf1(eaddr), add1, add0);
1178#endif
1179
1180  /*
1181   * hashResult is the 15 bits Hash entry address.
1182   * ethernetADD is a 48 bit number, which is derived from the Ethernet
1183   * MAC address, by nibble swapping in every byte (i.e MAC address
1184   * of 0x123456789abc translates to ethernetADD of 0x21436587a9cb).
1185   */
1186  if ((sc->sc_pcr & ETH_EPCR_HM) == 0) {
1187     /*
1188      * hashResult[14:0] = hashFunc0(ethernetADD[47:0])
1189      *
1190      * hashFunc0 calculates the hashResult in the following manner:
1191      * hashResult[ 8:0] = ethernetADD[14:8,1,0]
1192      * XOR ethernetADD[23:15] XOR ethernetADD[32:24]
1193      */
1194     result = (add0 & 3) | ((add0 >> 6) & ~3);
1195     result ^= (add0 >> 15) ^ (add1 >>  0);
1196     result &= 0x1ff;
1197     /*
1198      *   hashResult[14:9] = ethernetADD[7:2]
1199      */
1200     result |= (add0 & ~3) << 7;        /* excess bits will be masked */
1201#ifdef GT_DEBUG
1202     printk("hash result %x  ", result & 0x7fff);
1203#endif
1204  } else {
1205#define TRIBITFLIP      073516240       /* yes its in octal */
1206     /*
1207      * hashResult[14:0] = hashFunc1(ethernetADD[47:0])
1208      *
1209      * hashFunc1 calculates the hashResult in the following manner:
1210      * hashResult[08:00] = ethernetADD[06:14]
1211      * XOR ethernetADD[15:23] XOR ethernetADD[24:32]
1212      */
1213     w0 = ((add0 >> 6) ^ (add0 >> 15) ^ (add1)) & 0x1ff;
1214     /*
1215      * Now bitswap those 9 bits
1216      */
1217     result = 0;
1218     result |= ((TRIBITFLIP >> (((w0 >> 0) & 7) * 3)) & 7) << 6;
1219     result |= ((TRIBITFLIP >> (((w0 >> 3) & 7) * 3)) & 7) << 3;
1220     result |= ((TRIBITFLIP >> (((w0 >> 6) & 7) * 3)) & 7) << 0;
1221
1222     /*
1223      *   hashResult[14:09] = ethernetADD[00:05]
1224      */
1225     result |= ((TRIBITFLIP >> (((add0 >> 0) & 7) * 3)) & 7) << 12;
1226     result |= ((TRIBITFLIP >> (((add0 >> 3) & 7) * 3)) & 7) << 9;
1227#ifdef GT_DEBUG
1228     printk("1(%#x)", result);
1229#endif
1230  }
1231#ifdef GT_DEBUG
1232  printk(")");
1233#endif
1234
1235  /* 1/2K address filtering (MOTLoad default )? ->16KB memory required
1236   * or 8k address filtering ? -> 256KB memory required
1237   */
1238  return result & ((sc->sc_pcr & ETH_EPCR_HS_512) ? 0x7ff : 0x7fff);
1239}
1240
1241static int GTeth_hash_entry_op(struct GTeth_softc *sc, enum GTeth_hash_op op,
1242        enum GTeth_rxprio prio,unsigned char eaddr[ETHER_ADDR_LEN])
1243{
1244  unsigned long long he;
1245  unsigned long long *maybe_he_p = NULL;
1246  int limit;
1247  int hash;
1248  int maybe_hash = 0;
1249
1250#ifdef GT_DEBUG
1251  printk("GTeth_hash_entry_op(prio %d ", prio);
1252#endif
1253
1254  hash = GTeth_hash_compute(sc, eaddr);
1255
1256  if (sc->sc_hashtable == NULL) {
1257        printk("hashtable == NULL!");
1258  }
1259#ifdef GT_DEBUG
1260  printk("Hash computed %x eaddr %s\n", hash,ether_sprintf1(eaddr));
1261#endif
1262
1263  /*
1264   * Assume we are going to insert so create the hash entry we
1265   * are going to insert.  We also use it to match entries we
1266   * will be removing.  The datasheet is wrong for this.
1267   */
1268  he = (((unsigned long long) eaddr[5]) << 43) |
1269       (((unsigned long long) eaddr[4]) << 35) |
1270       (((unsigned long long) eaddr[3]) << 27) |
1271       (((unsigned long long) eaddr[2]) << 19) |
1272       (((unsigned long long) eaddr[1]) << 11) |
1273       (((unsigned long long) eaddr[0]) <<  3) |
1274       ((unsigned long long) HSH_PRIO_INS(prio) | HSH_V | HSH_R);
1275  /*   he = 0x1b1acd87d08005;*/
1276  /*
1277   * The GT will search upto 12 entries for a hit, so we must mimic that.
1278   */
1279  hash &= (sc->sc_hashmask / sizeof(he));
1280
1281#ifdef GT_DEBUG
1282  if (GTeth_debug>0) {
1283    unsigned val1, val2;
1284
1285    val1= he & 0xffffffff;
1286    val2= (he >>32) & 0xffffffff;
1287    printk("Hash addr value %x%x, entry %x\n",val2,val1, hash);
1288  }
1289#endif
1290
1291  for (limit = HSH_LIMIT; limit > 0 ; --limit) {
1292      /*
1293       * Does the GT wrap at the end, stop at the, or overrun the
1294       * end?  Assume it wraps for now.  Stash a copy of the
1295       * current hash entry.
1296       */
1297      unsigned long long *he_p = &sc->sc_hashtable[hash];
1298      unsigned long long thishe = *he_p;
1299
1300      /*
1301       * If the hash entry isn't valid, that break the chain.  And
1302       * this entry a good candidate for reuse.
1303       */
1304      if ((thishe & HSH_V) == 0) {
1305         maybe_he_p = he_p;
1306         break;
1307      }
1308
1309      /*
1310       * If the hash entry has the same address we are looking for
1311       * then ...  if we are removing and the skip bit is set, its
1312       * already been removed.  if are adding and the skip bit is
1313       * clear, then its already added.  In either return EBUSY
1314       * indicating the op has already been done.  Otherwise flip
1315       * the skip bit and return 0.
1316       */
1317      if (((he ^ thishe) & HSH_ADDR_MASK) == 0) {
1318         if (((op == GE_HASH_REMOVE) && (thishe & HSH_S)) ||
1319            ((op == GE_HASH_ADD) && (thishe & HSH_S) == 0))
1320            return EBUSY;
1321          *he_p = thishe ^ HSH_S;
1322
1323          if (GTeth_debug>0) {
1324             unsigned val1, val2;
1325
1326             val1= *he_p & 0xffffffff;
1327             val2= (*he_p >>32) & 0xffffffff;
1328             printk("flip skip bit result %x%x entry %x ",val2,val1, hash);
1329          }
1330          return 0;
1331       }
1332
1333       /*
1334        * If we haven't found a slot for the entry and this entry
1335        * is currently being skipped, return this entry.
1336        */
1337       if (maybe_he_p == NULL && (thishe & HSH_S)) {
1338          maybe_he_p = he_p;
1339          maybe_hash = hash;
1340       }
1341       hash = (hash + 1) & (sc->sc_hashmask / sizeof(he));
1342  }
1343
1344  /*
1345   * If we got here, then there was no entry to remove.
1346   */
1347  if (op == GE_HASH_REMOVE) {
1348     printk("GT64260eth : No entry to remove\n");
1349     return ENOENT;
1350  }
1351
1352  /*
1353   * If we couldn't find a slot, return an error.
1354   */
1355  if (maybe_he_p == NULL) {
1356     printk("GT64260eth : No slot found");
1357     return ENOSPC;
1358  }
1359
1360  /* Update the entry.*/
1361  *maybe_he_p = he;
1362  if (GTeth_debug>0) {
1363    unsigned val1, val2;
1364#if 0
1365    unsigned long *pt= sc->sc_hashtable;
1366    int i, loop;
1367
1368  for (loop= 0; loop< 256; loop++) {
1369    printk("%d)", loop);
1370    for (i=0; i< 16; i++, pt++) printk("%x ",*pt);
1371    printk("\n");
1372  }
1373#endif
1374    val1= he & 0xffffffff;
1375    val2= (he >>32) & 0xffffffff;
1376    printk("Update Hash result %x%x, table addr %x entry %x )\n",val2, val1, maybe_he_p, hash);
1377  }
1378  return 0;
1379}
1380
1381static int GTeth_hash_fill(struct GTeth_softc *sc)
1382{
1383  struct ether_multistep step;
1384  struct ether_multi *enm;
1385  int error;
1386
1387#ifdef GT_DEBUG
1388  printk( "GTeth_hash_fill(");
1389#endif
1390  error = GTeth_hash_entry_op(sc,GE_HASH_ADD,GE_RXPRIO_HI,sc->arpcom.ac_enaddr);
1391
1392  if (error) {
1393     if (GTeth_debug>0) printk("!");
1394     return error;
1395  }
1396
1397  sc->sc_flags &= ~GE_ALLMULTI;
1398  if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) == 0)
1399     sc->sc_pcr &= ~ETH_EPCR_PM;
1400  /* see lib/include/netinet/if_ether.h */
1401  ETHER_FIRST_MULTI(step, &sc->arpcom, enm);
1402  while (enm != NULL) {
1403    if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
1404      /* Frames are received regardless of their destinatin address */
1405       sc->sc_flags |= GE_ALLMULTI;
1406       sc->sc_pcr |= ETH_EPCR_PM;
1407    } else {
1408      /* Frames are only received if the destinatin address is found
1409       * in the hash table
1410       */
1411       error = GTeth_hash_entry_op(sc, GE_HASH_ADD,
1412             GE_RXPRIO_MEDLO, enm->enm_addrlo);
1413       if (error == ENOSPC) break;
1414    }
1415    ETHER_NEXT_MULTI(step, enm);
1416  }
1417#ifdef GT_DEBUG
1418  printk(")\n");
1419#endif
1420  return error;
1421}
1422
1423static void GTeth_hash_init(struct GTeth_softc *sc)
1424{
1425  void *hash_mem;
1426
1427  if (GTeth_debug>0) printk("GTeth_hash_init(");
1428  /* MOTLoad defualt : 512 bytes of address filtering, which
1429   * requires 16KB of memory
1430   */
1431#if 1
1432  hash_mem = rtems_bsdnet_malloc(HASH_DRAM_SIZE + HASH_ALIGN, M_FREE, M_NOWAIT);
1433  sc->sc_hashtable  =(void *)(((long)hash_mem+ HASH_ALIGN) & ~HASH_ALIGN);
1434#else
1435  /* only for test */
1436  hash_mem = 0x68F000;
1437  sc->sc_hashtable  =(unsigned long long *)hash_mem;
1438#endif
1439  sc->sc_hashmask = HASH_DRAM_SIZE - 1;
1440
1441  memset((void *)sc->sc_hashtable, 0,HASH_DRAM_SIZE);
1442#ifdef GT_DEBUG
1443  printk("hashtable addr:%x, mask %x)\n", sc->sc_hashtable,sc->sc_hashmask);
1444#endif
1445}
1446
1447#ifdef GT64260eth_DEBUG
1448static void GT64260eth_error(struct GTeth_softc *sc)
1449{
1450  struct ifnet          *ifp = &sc->arpcom.ac_if;
1451  unsigned int          intr_status= sc->intr_errsts[sc->intr_err_ptr1];
1452
1453  /* read and reset the status; because this is written
1454   * by the ISR, we must disable interrupts here
1455   */
1456  if (intr_status) {
1457    printk("%s%d: ICR = 0x%x ",
1458           ifp->if_name, ifp->if_unit, intr_status);
1459#if 1
1460    if (intr_status & INTR_RX_ERROR) {
1461       printk("Rxq error, if_ierrors %d\n",
1462              ifp->if_ierrors);
1463    }
1464#endif
1465    /* Rx error is handled in GT64260eth_rx() */
1466    if (intr_status & INTR_TX_ERROR) {
1467       ifp->if_oerrors++;
1468       printk("Txq error,  if_oerrors %d\n",ifp->if_oerrors);
1469    }
1470  }
1471  else
1472    printk("%s%d: Ghost interrupt ?\n",ifp->if_name,
1473           ifp->if_unit);
1474  sc->intr_errsts[sc->intr_err_ptr1++]=0;
1475  sc->intr_err_ptr1 %= INTR_ERR_SIZE;   /* Till Straumann */
1476}
1477#endif
1478
1479/* The daemon does all of the work; RX, TX and cleaning up buffers/descriptors */
1480static void GT64260eth_daemon(void *arg)
1481{
1482  struct GTeth_softc *sc = (struct GTeth_softc*)arg;
1483  rtems_event_set       events;
1484  struct mbuf   *m=0;
1485  struct ifnet  *ifp=&sc->arpcom.ac_if;
1486
1487#if 0
1488  /* see comments in GT64260eth_init(); in newer versions of
1489   * rtems, we hold the network semaphore at this point
1490   */
1491  rtems_semaphore_release(sc->daemonSync);
1492#endif
1493
1494  /* NOTE: our creator possibly holds the bsdnet_semaphore.
1495   *       since that has PRIORITY_INVERSION enabled, our
1496   *       subsequent call to bsdnet_event_receive() will
1497   *       _not_ release it. It's still in posession of our
1498   *       owner.
1499   *       This is different from how killing this task
1500   *       is handled.
1501   */
1502
1503  for (;;) {
1504     /* sleep until there's work to be done */
1505     /* Note: bsdnet_event_receive() acquires
1506      *       the global bsdnet semaphore for
1507      *       mutual exclusion.
1508      */
1509     rtems_bsdnet_event_receive(ALL_EVENTS,
1510                                RTEMS_WAIT | RTEMS_EVENT_ANY,
1511                                RTEMS_NO_TIMEOUT,
1512                                &events);
1513
1514     if (KILL_EVENT & events) break;
1515
1516#ifndef GE_NORX
1517     if (events & RX_EVENT) GT64260eth_rx(sc);
1518#endif
1519#if 0
1520     printk("%x ", inb(ETH0_EPSR));
1521     if ( ((i++) % 15)==0) printk("\n");
1522#endif
1523
1524     /* clean up and try sending packets */
1525     do {
1526         if (sc->txq_nactive) GTeth_txq_done(sc);
1527
1528         while (sc->txq_free>0) {
1529           if (sc->txq_free>TXQ_HiLmt_OFF) {
1530              m=0;
1531              IF_DEQUEUE(&ifp->if_snd,m);
1532              if (m==0) break;
1533              GT64260eth_sendpacket(sc, m);
1534           }
1535           else {
1536              GTeth_txq_done(sc);
1537              break;
1538           }
1539         }
1540         /* we leave this loop
1541          *  - either because there's no free buffer
1542          *    (m=0 initializer && !sc->txq_free)
1543          *  - or there's nothing to send (IF_DEQUEUE
1544          *    returned 0
1545          */
1546       } while (m);
1547
1548       ifp->if_flags &= ~IFF_OACTIVE;
1549
1550       /* Log errors and other uncommon events. */
1551#ifdef GT64260eth_DEBUG
1552       if (events & ERR_EVENT) GT64260eth_error(sc);
1553#endif
1554  } /* end for(;;) { rtems_bsdnet_event_receive() .....*/
1555
1556  ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
1557
1558  /* shut down the hardware */
1559  GT64260eth_stop_hw(sc);
1560  /* flush the output queue */
1561  for (;;) {
1562      IF_DEQUEUE(&ifp->if_snd,m);
1563      if (!m) break;
1564      m_freem(m);
1565  }
1566  /* as of 'rtems_bsdnet_event_receive()' we own the
1567   * networking semaphore
1568   */
1569  rtems_bsdnet_semaphore_release();
1570  rtems_semaphore_release(sc->daemonSync);
1571
1572  /* Note that I dont use sc->daemonTid here -
1573   * theoretically, that variable could already
1574   * hold a newly created TID
1575   */
1576  rtems_task_delete(RTEMS_SELF);
1577}
1578
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