source: rtems/c/src/lib/libbsp/powerpc/mvme5500/irq/irq_init.c @ f75b730

4.104.114.84.95
Last change on this file since f75b730 was f75b730, checked in by Eric Norum <WENorum@…>, on 11/12/04 at 19:27:09

Change by Shuchen Feng to permit DMA-complete interrupts.
  • Property mode set to 100644
File size: 8.4 KB
Line 
1/* irq_init.c
2 *
3 * This file contains the implementation of rtems initialization
4 * related to interrupt handling.
5 *
6 * CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 * Special acknowledgement to Till Straumann <strauman@slac.stanford.edu>
9 * for providing inputs to the IRQ optimization.
10 *
11 * Modified and added support for the MVME5500.
12 * Copyright 2003, 2004, Brookhaven National Laboratory and
13 *                 Shuchen Kate Feng <feng1@bnl.gov>
14 *
15 * The license and distribution terms for this file may be
16 * found in the file LICENSE in this distribution or at
17 *  http://www.rtems.com/license/LICENSE.
18 *
19 *  $Id$
20 */
21
22#include <libcpu/io.h>
23#include <libcpu/spr.h>
24#include <bsp/irq.h>
25#include <bsp.h>
26#include <libcpu/raw_exception.h>  /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */
27
28extern unsigned int external_exception_vector_prolog_code_size[];
29extern void external_exception_vector_prolog_code();
30extern unsigned int decrementer_exception_vector_prolog_code_size[];
31extern void decrementer_exception_vector_prolog_code();
32extern void GT_GPP_IntHandler0(), GT_GPP_IntHandler1();
33extern void GT_GPP_IntHandler2(), GT_GPP_IntHandler3();
34extern void BSP_GT64260INT_init();
35
36/*
37 * default on/off function
38 */
39static void nop_func(){}
40/*
41 * default isOn function
42 */
43static int not_connected() {return 0;}
44/*
45 * default possible isOn function
46 */
47static int connected() {return 1;}
48
49static rtems_irq_connect_data           rtemsIrq[BSP_IRQ_NUMBER];
50static rtems_irq_global_settings        initial_config;
51static rtems_irq_connect_data           defaultIrq = {
52  /* vectorIdex,         hdl            , on            , off           , isOn */
53  0,                     nop_func       , nop_func      , nop_func      , not_connected
54};
55
56rtems_irq_prio BSPirqPrioTable[BSP_MAIN_IRQ_NUMBER]={
57  /*
58   * This table is where the developers can change the levels of priority
59   * based on the need of their applications.
60   *
61   * actual priorities for CPU MAIN interrupts 0-63:
62   *    0   means that only current interrupt is masked (lowest priority)
63   *    255 means all other interrupts are masked
64   */
65  /* CPU Main cause low interrupt */
66  /* 0-15 */
67  0, 0, 0, 0, 0, 0, 0, 0, 4/*Timer*/, 0, 0, 0, 0, 0, 0, 0,
68   /* 16-31 */
69  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
70  /* CPU Main cause high interrupt */
71  /* 32-47 */
72  1/*10/100MHZ*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
73  /* 48-63 */
74  0, 0, 0, 0, 0, 0, 0, 0, 0/*serial*/, 3/*VME*/, 2/*1GHZ*/, 5/*WD*/, 0, 0, 0, 0
75};
76
77/* The mainIrqTbl[64] lists the enabled CPU main interrupt
78 * numbers [0-63] starting from the highest priority one
79 * to the lowest priority one.
80 *
81 * The highest priority interrupt is located at mainIrqTbl[0], and
82 * the lowest priority interrupt is located at
83 * mainIrqTbl[MainIrqTblPtr-1].
84 */
85
86#if DynamicIrqTbl
87/* The mainIrqTbl[64] is updated dynamically based on the priority
88 * levels set at BSPirqPrioTable[64], as the BSP_enable_main_irq() and
89 * BSP_disable_main_irq() commands are invoked.
90 *
91 * Caveat: The eight GPP IRQs for each BSP_MAIN_GPPx_y_IRQ group are set
92 * at the same main priority in the BSPirqPrioTable, while the
93 * sub-priority levels for the eight GPP in each group  are sorted
94 * statically by developers in the GPPx_yIrqTbl[8] from the highest
95 * priority to the lowest one.
96 */
97int MainIrqTblPtr=0;
98unsigned long long MainIrqInTbl=0;
99unsigned char GPPinMainIrqTbl[4]={0,0,0,0};
100/* BitNums for Main Interrupt Lo/High Cause, -1 means invalid bit */
101unsigned int mainIrqTbl[BSP_MAIN_IRQ_NUMBER]={ 
102                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
103                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
104                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
105                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
106                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
107                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
108                               -1, -1, -1, -1};
109#else
110/* Pre-sorted for IRQ optimization, and prioritization
111 * The interrupts sorted are :
112
113 1. Watchdog timer      (GPP #25)
114 2. Timers 0-1          (Main interrupt low cause, bit 8)
115 3. VME interrupt       (GPP #12)
116 4. 1 GHZ ethernet      (GPP #20)
117 5. 10/100 MHZ ethernet (Main interrupt high cause, bit 0)
118 6. COM1/COM2           (GPP #0)
119
120*/
121/* BitNums for Main Interrupt Lo/High Cause, -1 means invalid bit */
122unsigned int mainIrqTbl[64]={ BSP_MAIN_GPP31_24_IRQ, /* 59:watchdog timer */
123                               BSP_MAIN_TIMER0_1_IRQ, /* 8:Timers 0-1 */
124                               BSP_MAIN_GPP15_8_IRQ,  /* 57:VME interrupt */
125                               BSP_MAIN_GPP23_16_IRQ, /* 58: 1 GHZ ethernet */
126                               BSP_MAIN_ETH0_IRQ,  /* 32:10/100 MHZ ethernet */
127                               BSP_MAIN_GPP7_0_IRQ, /* 56:COM1/COM2 */
128                               -1, -1, -1, -1,
129                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
130                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
131                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
132                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
133                               -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
134                               -1, -1, -1, -1};
135#endif
136
137unsigned int GPP7_0IrqTbl[8]={0, /* COM1/COM2 */
138                               -1, -1, -1, -1, -1, -1, -1};
139unsigned int GPP15_8IrqTbl[8]={ 0, 1, 2, 3, /* PMC1 INT A, B, C, D */
140                                4, 5, 6, 7  /* VME interrupt 0-3 */};
141unsigned int GPP23_16IrqTbl[8]={0, 1, 2, 3, /* PMC2 INT A, B, C, D */
142                                4, /* 82544 1GHZ ethernet (20-16=4)*/
143                                                                                        -1, -1, -1};
144unsigned int GPP31_24IrqTbl[8]={1, /* watchdog timer (25-24=1) */
145                                -1, -1, -1, -1, -1, -1, -1};
146
147static int
148doit(unsigned intNum, rtems_irq_hdl handler, int (*p)(const rtems_irq_connect_data*))
149{
150        rtems_irq_connect_data d={0};
151        d.name = intNum;
152        d.isOn = connected;
153        d.hdl  = handler;
154        return p(&d);
155}
156
157int BSP_GT64260_install_isr(unsigned intNum,rtems_irq_hdl handler)
158{
159  return doit(intNum, handler, BSP_install_rtems_irq_handler);
160}
161
162/*
163 * This code assumes the exceptions management setup has already
164 * been done. We just need to replace the exceptions that will
165 * be handled like interrupt. On MPC7455 and many PPC processors
166 * this means the decrementer exception and the external exception.
167 */
168void BSP_rtems_irq_mng_init(unsigned cpuId)
169{
170  rtems_raw_except_connect_data vectorDesc;
171  int i;
172
173  /*
174   * First initialize the Interrupt management hardware
175   */
176#ifdef TRACE_IRQ_INIT 
177  printk("Initializing the interrupt controller of the GT64260\n");
178#endif       
179  BSP_GT64260INT_init();
180
181#ifdef TRACE_IRQ_INIT 
182  printk("Going to re-initialize the rtemsIrq table %d\n",BSP_IRQ_NUMBER);
183#endif       
184  /*
185   * Initialize Rtems management interrupt table
186   */
187  /*
188   * re-init the rtemsIrq table
189   */
190  for (i = 0; i < BSP_IRQ_NUMBER; i++) {
191      rtemsIrq[i]      = defaultIrq;
192      rtemsIrq[i].name = i;
193  }
194
195  /*
196   * Init initial Interrupt management config
197   */
198  initial_config.irqNb  = BSP_IRQ_NUMBER;
199  initial_config.defaultEntry   = defaultIrq;
200  initial_config.irqHdlTbl      = rtemsIrq;
201  initial_config.irqBase        = BSP_ASM_IRQ_VECTOR_BASE;
202  initial_config.irqPrioTbl     = BSPirqPrioTable;
203
204#ifdef TRACE_IRQ_INIT 
205  printk("Going to setup irq mngt configuration\n");
206#endif       
207
208  if (!BSP_rtems_irq_mngt_set(&initial_config)) {
209      /*
210       * put something here that will show the failure...
211       */
212      BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
213  }
214
215  /* Connect the GPP int handler to each of the associated main cause bits */
216  BSP_GT64260_install_isr(BSP_MAIN_GPP7_0_IRQ, GT_GPP_IntHandler0); /* COM1 & COM2, .... */
217  BSP_GT64260_install_isr(BSP_MAIN_GPP15_8_IRQ, GT_GPP_IntHandler1);
218  BSP_GT64260_install_isr(BSP_MAIN_GPP23_16_IRQ, GT_GPP_IntHandler2);
219  BSP_GT64260_install_isr(BSP_MAIN_GPP31_24_IRQ, GT_GPP_IntHandler3);
220 
221  /*
222   * We must connect the raw irq handler for the two
223   * expected interrupt sources : decrementer and external interrupts.
224   */
225  vectorDesc.exceptIndex        = ASM_DEC_VECTOR;
226  vectorDesc.hdl.vector = ASM_DEC_VECTOR;
227  vectorDesc.hdl.raw_hdl        = decrementer_exception_vector_prolog_code;
228  vectorDesc.hdl.raw_hdl_size   = (unsigned) decrementer_exception_vector_prolog_code_size;
229  vectorDesc.on         = nop_func;
230  vectorDesc.off                = nop_func;
231  vectorDesc.isOn               = connected;
232  if (!mpc60x_set_exception (&vectorDesc)) {
233      BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
234  }
235  vectorDesc.exceptIndex        = ASM_EXT_VECTOR;
236  vectorDesc.hdl.vector = ASM_EXT_VECTOR;
237  vectorDesc.hdl.raw_hdl        = external_exception_vector_prolog_code;
238  vectorDesc.hdl.raw_hdl_size   = (unsigned) external_exception_vector_prolog_code_size;
239  if (!mpc60x_set_exception (&vectorDesc)) {
240      BSP_panic("Unable to initialize RTEMS external raw exception\n");
241    }
242#ifdef TRACE_IRQ_INIT 
243  printk("RTEMS IRQ management is now operationnal\n");
244#endif
245}
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