1 | /* irq_init.c |
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2 | * |
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3 | * This file contains the implementation of rtems initialization |
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4 | * related to interrupt handling. |
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5 | * |
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6 | * CopyRight (C) 1999 valette@crf.canon.fr |
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7 | * |
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8 | * Modified and added support for the MVME5500. |
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9 | * Copyright 2003, 2004, 2005, Brookhaven National Laboratory and |
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10 | * Shuchen Kate Feng <feng1@bnl.gov> |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in the file LICENSE in this distribution or at |
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14 | * http://www.rtems.org/license/LICENSE |
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15 | * |
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16 | */ |
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17 | #include <libcpu/io.h> |
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18 | #include <libcpu/spr.h> |
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19 | #include <bsp/irq.h> |
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20 | #include <bsp.h> |
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21 | #include <bsp/vectors.h> /* ASM_EXT_VECTOR, ASM_DEC_VECTOR ... */ |
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22 | /*#define TRACE_IRQ_INIT*/ |
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23 | |
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24 | /* |
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25 | * default on/off function |
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26 | */ |
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27 | static void nop_func(void){} |
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28 | /* |
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29 | * default isOn function |
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30 | */ |
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31 | static int not_connected(void) {return 0;} |
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32 | |
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33 | static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; |
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34 | static rtems_irq_global_settings initial_config; |
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35 | |
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36 | static rtems_irq_connect_data defaultIrq = { |
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37 | .name = 0, |
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38 | .hdl = NULL, |
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39 | .handle = NULL, |
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40 | .on = (rtems_irq_enable) nop_func, |
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41 | .off = (rtems_irq_disable) nop_func, |
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42 | .isOn = (rtems_irq_is_enabled) not_connected, |
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43 | #ifdef BSP_SHARED_HANDLER_SUPPORT |
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44 | .next_handler = NULL |
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45 | #endif |
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46 | }; |
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47 | |
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48 | rtems_irq_prio BSPirqPrioTable[BSP_PIC_IRQ_NUMBER] = { |
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49 | /* |
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50 | * This table is where the developers can change the levels of priority |
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51 | * based on the need of their applications. |
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52 | * |
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53 | * actual priorities for CPU MAIN and GPP interrupts (0-95) |
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54 | * |
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55 | * 0 means that only current interrupt is masked (lowest priority) |
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56 | * 255 is only used by bits 24, 25, 26 and 27 of the CPU high |
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57 | * interrupt Mask: (e.g. GPP7_0, GPP15_8, GPP23_16, GPP31_24). |
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58 | * The IRQs of those four bits are always enabled. When it's used, |
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59 | * the IRQ number is never listed in the dynamic picIsrTable[96]. |
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60 | * |
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61 | * The priorities of GPP interrupts were decided by their own |
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62 | * value set at BSPirqPrioTable. |
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63 | * |
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64 | */ |
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65 | /* CPU Main cause low interrupt */ |
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66 | /* 0-15 */ |
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67 | 0, 0, 0, 0, 0, 0, 0, 0, 64/*Timer*/, 0, 0, 0, 0, 0, 0, 0, |
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68 | /* 16-31 */ |
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69 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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70 | /* CPU Main cause high interrupt */ |
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71 | /* 32-47 */ |
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72 | 2/*10/100MHZ*/, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
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73 | /* 48-63 */ |
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74 | 0, 0, 0, 0, 0, 0, 0, 0, |
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75 | 255 /*GPP0-7*/, 255/*GPP8-15*/, 255/*GPP16-23*/, 255/*GPP24-31*/, 0, 0, 0, 0, |
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76 | /* GPP interrupts */ |
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77 | /* GPP0-7 */ |
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78 | 1/*serial*/,0, 0, 0, 0, 0, 0, 0, |
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79 | /* GPP8-15 */ |
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80 | 47/*PMC1A*/,46/*PMC1B*/,45/*PMC1C*/,44/*PMC1D*/,30/*VME0*/, 29/*VME1*/,3,1, |
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81 | /* GPP16-23 */ |
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82 | 37/*PMC2A*/,36/*PMC2B*/,35/*PMC2C*/,34/*PMC2D*/,23/*1GHZ*/, 0,0,0, |
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83 | /* GPP24-31 */ |
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84 | 7/*watchdog*/, 0,0,0,0,0,0,0 |
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85 | }; |
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86 | |
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87 | /* |
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88 | * This code assumes the exceptions management setup has already |
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89 | * been done. We just need to replace the exceptions that will |
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90 | * be handled like interrupt. On MPC7455 and many PPC processors |
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91 | * this means the decrementer exception and the external exception. |
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92 | */ |
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93 | void BSP_rtems_irq_mng_init(unsigned cpuId) |
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94 | { |
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95 | int i; |
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96 | rtems_interrupt_level level; |
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97 | |
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98 | /* |
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99 | * First initialize the Interrupt management hardware |
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100 | */ |
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101 | #ifdef TRACE_IRQ_INIT |
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102 | printk("Initializing the interrupt controller of the GT64260\n"); |
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103 | #endif |
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104 | |
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105 | #ifdef TRACE_IRQ_INIT |
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106 | printk("Going to re-initialize the rtemsIrq table %d\n",BSP_IRQ_NUMBER); |
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107 | #endif |
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108 | /* |
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109 | * Initialize Rtems management interrupt table |
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110 | */ |
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111 | /* |
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112 | * re-init the rtemsIrq table |
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113 | */ |
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114 | for (i = 0; i < BSP_IRQ_NUMBER; i++) { |
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115 | rtemsIrq[i] = defaultIrq; |
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116 | rtemsIrq[i].name = i; |
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117 | } |
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118 | |
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119 | /* |
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120 | * Init initial Interrupt management config |
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121 | */ |
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122 | initial_config.irqNb = BSP_IRQ_NUMBER; |
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123 | initial_config.defaultEntry = defaultIrq; |
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124 | initial_config.irqHdlTbl = rtemsIrq; |
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125 | initial_config.irqBase = BSP_LOWEST_OFFSET; |
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126 | initial_config.irqPrioTbl = BSPirqPrioTable; |
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127 | |
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128 | #ifdef TRACE_IRQ_INIT |
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129 | printk("Going to setup irq mngt configuration\n"); |
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130 | #endif |
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131 | |
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132 | rtems_interrupt_disable(level); |
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133 | (void) level; /* avoid set but not used warning */ |
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134 | |
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135 | if (!BSP_rtems_irq_mngt_set(&initial_config)) { |
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136 | /* |
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137 | * put something here that will show the failure... |
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138 | */ |
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139 | rtems_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); |
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140 | } |
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141 | #ifdef TRACE_IRQ_INIT |
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142 | printk("Done setup irq mngt configuration\n"); |
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143 | #endif |
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144 | |
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145 | #ifdef TRACE_IRQ_INIT |
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146 | printk("RTEMS IRQ management is now operationnal\n"); |
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147 | #endif |
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148 | } |
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