source: rtems/c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h @ cf599996

4.9
Last change on this file since cf599996 was cf599996, checked in by Joel Sherrill <joel.sherrill@…>, on May 8, 2009 at 6:22:51 PM

2009-05-08 Kate Feng <feng1@…>

PR1395/bsps

  • Updated the changes from RTEMS-4.8.0, which were made since Oct. 2007.
  • network/if_1GHz/if_wm.c: fixed some bugs in the 1GHz driver.
  • pci/pci_interface.c: + Enabled PCI "Read", "Read Line", and "Read Multiple" + Agressive Prefetch to improve the performance of the PCI based

applications (e.g. 1GHz NIC).

  • irq/BSP_irq.c : Replaced the irq/irq.c, and used GT_GPP_Value register to monitor the cause of the level sensitive interrupts. This unique solution solves various bugs in the 1GHz network drivers Fixed bugs in compute_pic_masks_from_prio()
  • pci/pci.c : Updated it to be consistent with the original pci.c
  • written by Eric Valette. There is no change in its function.
  • irq/irq_init.c : set defaultIrq->next_handler to be 0
  • for BSP_SHARED_HANDLER_SUPPORT.
  • Property mode set to 100644
File size: 5.0 KB
Line 
1/*
2 *  bsp.h  -- contain BSP API definition.
3 *
4 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
5 *
6 *  The license and distribution terms for this file may be
7 *  found in found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 *
10 *  (C) S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
11 *
12 *
13 */
14
15#ifndef _BSP_H
16#define _BSP_H
17
18#include <bspopts.h>
19
20#include <rtems.h>
21#include <rtems/console.h>
22#include <rtems/clockdrv.h>
23#include <libcpu/io.h>
24#include <bsp/vectors.h>
25
26/* Board type */
27typedef enum {
28        undefined = 0,
29        MVME5500,
30        MVME6100
31} BSP_BoardTypes;
32
33BSP_BoardTypes BSP_getBoardType();
34
35/* Board type */
36typedef enum {
37        Undefined,
38        UNIVERSE2,
39        TSI148,
40} BSP_VMEchipTypes;
41
42BSP_VMEchipTypes BSP_getVMEchipType();
43
44/* The version of Discovery system controller */
45
46typedef enum {
47        notdefined, 
48        GT64260A,
49        GT64260B,           
50        MV64360,
51} DiscoveryChipVersion;
52
53DiscoveryChipVersion BSP_getDiscoveryChipVersion();
54
55#define _256M           0x10000000
56#define _512M           0x20000000
57
58#define GT64x60_REG_BASE        0xf1000000  /* Base of GT64260 Reg Space */
59#define GT64x60_REG_SPACE_SIZE  0x10000     /* 64Kb Internal Reg Space */
60
61#define GT64x60_DEV1_BASE       0xf1100000  /* Device bank1(chip select 1) base
62                                             */
63#define GT64260_DEV1_SIZE       0x00100000 /* Device bank size */
64
65/* fundamental addresses for this BSP (PREPxxx are from libcpu/io.h) */
66#define _IO_BASE GT64x60_REG_BASE
67
68#define BSP_NVRAM_BASE_ADDR     0xf1110000
69
70#define BSP_RTC_INTA_REG        0x7ff0
71#define BSP_RTC_SECOND          0x7ff2 
72#define BSP_RTC_MINUTE          0x7ff3
73#define BSP_RTC_HOUR            0x7ff4 
74#define BSP_RTC_DATE            0x7ff5
75#define BSP_RTC_INTERRUPTS      0x7ff6
76#define BSP_RTC_WATCHDOG        0x7ff7
77
78/* PCI0 Domain I/O space */
79#define PCI0_IO_BASE            0xf0000000
80#define PCI1_IO_BASE            0xf0800000
81
82/* PCI 0 memory space as seen from the CPU */
83#define PCI0_MEM_BASE           0x80000000
84#define PCI_MEM_BASE            0  /* glue for vmeUniverse */
85#define PCI_MEM_BASE_ADJUSTMENT        0
86
87/* address of our ram on the PCI bus */
88#define PCI_DRAM_OFFSET         0
89
90/* PCI 1 memory space as seen from the CPU */
91#define PCI1_MEM_BASE           0xe0000000
92#define PCI1_MEM_SIZE           0x10000000
93
94/* Needed for hot adding via PMCspan on the PCI0 local bus.
95 * This is board dependent, only because mvme5500
96 * supports hot adding and has more than one local PCI
97 * bus.
98 */
99#define BSP_MAX_PCI_BUS_ON_PCI0 8
100#define BSP_MAX_PCI_BUS_ON_PCI1 2
101#define BSP_MAX_PCI_BUS  (BSP_MAX_PCI_BUS_ON_PCI0+BSP_MAX_PCI_BUS_ON_PCI1)
102
103
104/* The glues to Till's vmeUniverse, although the name does not
105 * actually reflect the relevant architect of the MVME5500.
106 * Till TODO ? :  BSP_PCI_DO_EOI instead ?
107 * BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
108 *
109 */
110#define BSP_PIC_DO_EOI  inl(0xc34)  /* PCI IACK */
111#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
112
113/*
114 *  confdefs.h overrides for this BSP:
115 *   - termios serial ports (defaults to 1)
116 *   - Interrupt stack space is not minimum if defined.
117 */
118
119#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
120#define BSP_INTERRUPT_STACK_SIZE  (16 * 1024) /* <skf> 2/09 wants it to be adjustable by BSP */
121
122/* uart.c uses out_8 instead of outb  */
123#define BSP_UART_IOBASE_COM1    GT64x60_DEV1_BASE + 0x20000
124#define BSP_UART_IOBASE_COM2    GT64x60_DEV1_BASE + 0x21000
125
126#define BSP_CONSOLE_PORT                BSP_UART_COM1  /* console */
127#define BSP_UART_BAUD_BASE              115200
128
129/*
130 * Total memory using RESIDUAL DATA
131 */
132extern unsigned int BSP_mem_size;
133/*
134 * PCI Bus Frequency
135 */
136extern unsigned int BSP_bus_frequency;
137/*
138 * processor clock frequency
139 */
140extern unsigned int BSP_processor_frequency;
141/*
142 * Time base divisior (how many tick for 1 second).
143 */
144extern unsigned int BSP_time_base_divisor;
145
146#define BSP_Convert_decrementer( _value ) \
147  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
148
149extern rtems_configuration_table  BSP_Configuration;
150extern void BSP_panic(char *s);
151extern void bsp_reset(void);
152/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
153extern int BSP_disconnect_clock_handler (void);
154extern int BSP_connect_clock_handler (void);
155
156extern unsigned long _BSP_clear_hostbridge_errors();
157
158extern unsigned int BSP_heap_start;
159
160#if 0
161#define RTEMS_BSP_NETWORK_DRIVER_NAME   "gt1"
162#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_GT64260eth_driver_attach
163#else
164#define RTEMS_BSP_NETWORK_DRIVER_NAME   "wmG1"
165#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_i82544EI_driver_attach
166#endif
167
168extern int RTEMS_BSP_NETWORK_DRIVER_ATTACH();
169
170/*
171 *  BSP Configuration Default Overrides
172 */
173#define BSP_ZERO_WORKSPACE_AUTOMATICALLY TRUE
174
175#define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER()
176
177static inline void lwmemBar()
178{
179    asm volatile("lwsync":::"memory");
180}
181
182static inline void io_flush()
183{
184    asm volatile("isync":::"memory");
185}
186static inline void memBar()
187{
188    asm volatile("sync":::"memory");
189}
190static inline void ioBar()
191{
192    asm volatile("eieio":::"memory");
193}
194
195#endif
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