source: rtems/c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h @ 844609f9

4.104.114.84.95
Last change on this file since 844609f9 was 4406c2f, checked in by Eric Norum <WENorum@…>, on 11/30/04 at 15:01:13

Add definition.
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File size: 3.1 KB
Line 
1/*
2 *  bsp.h  -- contain BSP API definition.
3 *
4 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
5 *
6 *  The license and distribution terms for this file may be
7 *  found in found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 *
10 *  S. Kate Feng 12/03 : Modified it to support the MVME5500 board.
11 *
12 */
13
14#ifndef LIBBSP_POWERPC_MVME5500_BSP_H
15#define LIBBSP_POWERPC_MVME5500_BSP_H
16
17#include <bspopts.h>
18
19#include <rtems.h>
20#include <rtems/console.h>
21#include <rtems/clockdrv.h>
22#include <libcpu/io.h>
23#include <bsp/vectors.h>
24
25#include <bsp/bspMvme5500.h>
26
27/* fundamental addresses for this BSP (PREPxxx are from libcpu/io.h) */
28#define _IO_BASE GT64260_REG_BASE
29
30/* PCI0 Domain I/O space */
31#define PCI0_IO_BASE            0xf0000000
32#define PCI1_IO_BASE            0xf0800000
33
34/* PCI 0 memory space as seen from the CPU */
35#define PCI0_MEM_BASE           0x80000000
36#define PCI_MEM_BASE            0  /* glue for vmeUniverse */
37#define PCI_MEM_BASE_ADJUSTMENT        0
38
39/* address of our ram on the PCI bus */
40#define PCI_DRAM_OFFSET         0
41
42/* PCI 1 memory space as seen from the CPU */
43#define PCI1_MEM_BASE           0xe0000000
44#define PCI1_MEM_SIZE           0x10000000
45
46/* The glues to Till's vmeUniverse, although the name does not
47 * actually reflect the relevant architect of the MVME5500.
48 * Till TODO ? :  BSP_PCI_DO_EOI instead ?
49 * BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
50 *
51 */
52#define BSP_PIC_DO_EOI  inl(0xc34)  /* PCI IACK */
53#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
54
55/*
56 *  confdefs.h overrides for this BSP:
57 *   - termios serial ports (defaults to 1)
58 *   - Interrupt stack space is not minimum if defined.
59 */
60
61#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
62#define CONFIGURE_INTERRUPT_STACK_MEMORY  (16 * 1024)
63
64/* uart.c uses out_8 instead of outb  */
65#define BSP_UART_IOBASE_COM1    GT64260_DEV1_BASE + 0x20000
66#define BSP_UART_IOBASE_COM2    GT64260_DEV1_BASE + 0x21000
67
68#define BSP_CONSOLE_PORT                BSP_UART_COM1  /* console */
69#define BSP_UART_BAUD_BASE              115200
70
71/*
72 * Vital Board data Start using DATA RESIDUAL
73 */
74/*
75 * Total memory using RESIDUAL DATA
76 */
77extern unsigned int BSP_mem_size;
78/*
79 * PCI Bus Frequency
80 */
81extern unsigned int BSP_bus_frequency;
82/*
83 * processor clock frequency
84 */
85extern unsigned int BSP_processor_frequency;
86/*
87 * Time base divisior (how many tick for 1 second).
88 */
89extern unsigned int BSP_time_base_divisor;
90
91#define BSP_Convert_decrementer( _value ) \
92  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
93
94extern rtems_configuration_table  BSP_Configuration;
95extern void BSP_panic(char *s);
96extern void rtemsReboot(void);
97/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
98extern int BSP_disconnect_clock_handler (void);
99extern int BSP_connect_clock_handler (void);
100
101extern unsigned long _BSP_clear_hostbridge_errors();
102
103#define RTEMS_BSP_NETWORK_DRIVER_NAME   "gt1"
104#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_GT64260eth_driver_attach
105
106extern int
107RTEMS_BSP_NETWORK_DRIVER_ATTACH(/* struct rtems_bsdnet_ifconfig * */);
108
109
110#endif
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