source: rtems/c/src/lib/libbsp/powerpc/mvme5500/README @ ee732739

4.104.114.84.9
Last change on this file since ee732739 was ee732739, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 13, 2007 at 2:26:24 PM

2007-09-07 Kate Feng <feng1@…>

  • ChangeLog?, Makefile.am, README, README.booting, README.irq, preinstall.am, GT64260/MVME5500I2C.c, include/bsp.h, irq/irq.c, irq/irq.h, irq/irq_init.c, pci/detect_host_bridge.c, pci/pci.c, pci/pci_interface.c, pci/pcifinddevice.c, start/preload.S, startup/bspclean.c, startup/bspstart.c, startup/pgtbl_activate.c, startup/reboot.c, vectors/bspException.h, vectors/exceptionhandler.c: Merge my improvements in this BSP including a new network driver for the 1GHz NIC.
  • network/if_100MHz/GT64260eth.c, network/if_100MHz/GT64260eth.h, network/if_100MHz/GT64260ethreg.h, network/if_100MHz/Makefile.am, network/if_1GHz/Makefile.am, network/if_1GHz/POSSIBLEBUG, network/if_1GHz/if_wm.c, network/if_1GHz/if_wmreg.h, network/if_1GHz/pci_map.c, network/if_1GHz/pcireg.h: New files.
  • Property mode set to 100644
File size: 4.1 KB
Line 
1#
2#  $Id: README,v 1.3.1  Shuchen Kate Feng, NSLS, BNL (08/27/07)
3#
4
5Please reference README.booting for the boot/load process.
6
7For the priority setting of the Interrupt Requests (IRQs), please
8reference README.irq
9
10The BSP is built and tested on the 4.7.1 and 4.7.99.2 CVS RTEMS release.
11
12I believe in valuable real-time programming, where technical neatness,
13performance and truth are.  Any suggestion, bug reports, or even bug
14fixes (great!) would be highly appreciated so that I still believe
15what I believe.
16
17
18ACKNOWLEDGEMENTS
19----------------
20Acknowledgements:
21
22Valuable information was obtained from the following:
231) Marvell NDA document for the discovery system controller.
24Other related documents are listed at :
25http://www.aps.anl.gov/epics/meetings/2006-06/RTEMS_Primer_SIG/RTEMS_BSP_MVME5500.pdf
262) netBSD: For the two NICS and some headers :
27           Allegro Networks, Inc., Wasabi Systems, Inc. 
283) RTEMS: For the SVGM5 BSP
29          Stanford Linear Accelerator Center, Till Straumann
30
31 This BSP also builds on top of the work of others who have contributed
32 to similar RTEMS powerpc shared and motorola_powerpc BSPs, most notably
33 Eric Valette, Till Straumann, Eric Norum and others.
34
35LICENSE
36-------
37See ./LICENSE file.
38
39BSP NAME:           mvme5500
40BOARD:              MVME5500 by Motorola
41BUS:                PCI
42CPU FAMILY:         ppc
43CPU:                MPC7455 @ 1GHZ
44COPROCESSORS:       N/A
45MODE:               32/64 bit mode (support 32 bit for now)
46DEBUG MONITOR:      MOTLoad
47SYSTEM CONTROLLER:  GT64260B
48
49PERIPHERALS
50===========
51TIMERS:             Eight, 32 bit programmable
52SERIAL PORTS:       2 NS 16550 on GT64260B
53REAL-TIME CLOCK:    MK48T37V
5432K NVSRAM:         MK48T37V
55WATCHDOG TIMER:     use the one in GT-64260B
56DMA:                8 channel DMA controller (GT-64260B)
57VIDEO:              none
58NETWORKING:         Port 1: Intel 82544EI Gigabit Ethernet Controller
59                    10/100/1000Mb/s routed to front panel RJ-45
60                    Port 2: 10/100 Mb ethernet unit integrated on the
61                    Marvell's GT64260 system controller
62
63DRIVER INFORMATION
64==================
65CLOCK DRIVER:       PPC internal
66IOSUPP DRIVER:      N/A
67SHMSUPP:            N/A
68TIMER DRIVER:       PPC internal
69TTY DRIVER:         PPC internal
70
71STDIO
72=====
73PORT:               Console port 0
74ELECTRICAL:         na
75BAUD:               na
76BITS PER CHARACTER: na
77PARITY:             na
78STOP BITS:          na
79
80
81Jumpers
82=======
83
841) The BSP is tested with the 60x bus mode instead of the MPX bus mode.
85   ( No jumper or a jumper across pins 1-2 on J19 selects the 60x bus mode)
86
872) On the mvme5500 board, Ethernet 1 is the Gigabit Ethernet port and is
88   front panel only. Ethernet 2 is 10/100 BaseT Ethernet. For front-panel
89   Ethernet2, install jumpers across pins 1-2 on all J6, J7, J100 and
90   J101 headers.
91
923) Enable SROM initialization at startup. (No jumper or a jumper across
93   pins 1-2 on J17)
94
95In fact, (if I did not miss anything) the mvme5500 board should function
96properly if one keeps all the jumpers at factory configuration.
97One can leave out the jumper on J30 to disable EEPROM programming.
98
99Notes
100=====
101
102BSP BAT usage
103----------------------
104DBAT0 and IBAT0
1050x00000000
1060x0fffffff  1st 256M, for MEMORY access (caching enabled)
107
108DBAT1 and IBAT1
1090x00000000
1100x0fffffff  2nd 256M, for MEMORY access (caching enabled)
111
112UPDATE: (2004/5).
113The BSP now uses page tables for mapping the entire 512MB
114of RAM. DBAT0 and DBAT1 is hence free for use by the
115application. A simple 1:1 (virt<->phys) mapping is employed.
116The BSP write-protects the text and read-only data
117areas of the application.  Special acknowledgement to Till
118Straumann <strauman@slac.stanford.edu> for providing inputs in
119porting the memory protection software he wrote (BSP_pgtbl_xxx())
120to MVME5500.
121
122
123The default VME configuration uses DBAT0 to map
124more PCI memory space for use by the universe VME
125bridge:
126
127DBAT0
1280x90000000      PCI memory space <-> VME
1290x9fffffff
130
131Port  VME-Addr   Size       PCI-Adrs   Mode:
1320:    0x20000000 0x0F000000 0x90000000 A32, Dat, Sup
1331:    0x00000000 0x00FF0000 0x9F000000 A24, Dat, Sup
1342:    0x00000000 0x00010000 0x9FFF0000 A16, Dat, Sup
135
136
Note: See TracBrowser for help on using the repository browser.