source: rtems/c/src/lib/libbsp/powerpc/mvme5500/README.irq @ 46a6fa91

4.104.114.84.95
Last change on this file since 46a6fa91 was 7be6ad9, checked in by Eric Norum <WENorum@…>, on Oct 20, 2004 at 3:21:05 PM

Add MVME550 BSP

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1README.irq : Shuchen Kate Feng  <feng1@bnl.gov>, 10/10/04
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3
4The BSPirqPrioTable[] listed in irq_init.c is where the
5software developers can change the levels of priority
6for main interrupts based on the need of their
7applications.
8
9
10Presently, a dynamic IRQ table (e.g. mainIrqTbl[64]), which is
11arranged dynamically based on the priority levels of enabled
12main interrupts, is used in C_dispatch_irq_handler() to
13incorporate the handling of the software priority levels.
14
15
16The valid entries listed in mainIrqTbl[64] by the BSP are:
17
181. Main interrupt 59   (GPP31_24 : no enabled IRQ yet,
19                        to enable 'watchdog timer' if needed)
202. Main interrupt 57   (GPP15_8  : VME interrupt enabled,
21                        to enable 'PMC1' if needed)
223. Main interrupt 58   (GPP23_16 : no enabled IRQ yet,
23                        to enable '1 GHZ ethernet' or 'PMC2'
24                        if needed)
254. Main interrupt 32   (10/100 MHZ ethernet)
265. Main interrupt 56   (GPP7_0 : presently only COM1/COM2 enabled)
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28
29The main IRQs can be added to the mainIrqTbl[] dynamically
30via the BSP_enable_main_irq(), or removed from the mainIrqTbl[]
31dynamically via the BSP_disable_main_irq().
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33
34Regarding other GPP interrupts not listed in the GPP7_0IrqTbl[8],
35GPP15_8IrqTbl[8], GPP23_16IrqTbl[8], or GPP31_24IrqTbl[8], they
36could be enabled by being added to the correspondent of
37the four aforementioned tables listed in the irq_init.c.
38
39
40Caveat: Presently, the eight GPP IRQs for each BSP_MAIN_GPPx_y_IRQ group
41are set at the same main priority in the BSPirqPrioTable[], while the
42sub-priority levels for the eight GPP in each group  are sorted
43statically by developers in the GPPx_yIrqTbl[8] from the highest
44priority to the lowest one.
45
46
47Note :
481. GPP7-0   (Main interrupt high cause, bit 24)
492. GPP15-8  (Main interrupt high cause, bit 25)
503. GPP23-16 (Main interrupt high cause, bit 26)
514. GPP31-24 (Main interrupt high cause, bit 27)
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