source: rtems/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c @ ef5f359

4.115
Last change on this file since ef5f359 was ef5f359, checked in by Sebastian Huber <sebastian.huber@…>, on 11/06/12 at 11:18:10

sapi: Delete duplicate declarations

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File size: 11.4 KB
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1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-1998.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified for mvme3100 by T. Straumann
18 */
19
20#include <string.h>
21#include <stdlib.h>
22
23#include <rtems.h>
24#include <bsp.h>
25#include <rtems/bspIo.h>
26#include <libcpu/spr.h>
27#include <libcpu/io.h>
28#include <libcpu/e500_mmu.h>
29#include <bsp/uart.h>
30#include <bsp/irq.h>
31#include <bsp/pci.h>
32#include <bsp/vpd.h>
33#include <libcpu/cpuIdent.h>
34#include <bsp/vectors.h>
35#include <rtems/powerpc/powerpc.h>
36
37#define SHOW_MORE_INIT_SETTINGS
38#undef  DEBUG
39
40#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
41
42#ifdef  DEBUG
43#define STATIC
44#else
45#define STATIC static
46#endif
47
48extern unsigned long __rtems_end[];
49extern void              BSP_vme_config(void);
50extern void          BSP_pciConfigDump_early( void );
51extern unsigned      ppc_exc_lock_std, ppc_exc_gpr3_std;
52
53/*
54 * Copy Additional boot param passed by boot loader
55 */
56#define CMDLINE_BUF_SIZE        2048
57
58static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
59char *BSP_commandline_string         = cmdline_buf;
60
61/*
62 * Vital Board data Start using DATA RESIDUAL
63 */
64uint32_t bsp_clicks_per_usec         = 0;
65/*
66 * Total memory using RESIDUAL DATA
67 */
68unsigned int BSP_mem_size            = 0;
69/*
70 * PCI Bus Frequency
71 */
72unsigned int BSP_pci_bus_frequency   = 0xdeadbeef;
73/*
74 * PPC Bus Frequency
75 */
76unsigned int BSP_bus_frequency       = 0;
77/*
78 * processor clock frequency
79 */
80unsigned int BSP_processor_frequency = 0;
81/*
82 * Time base divisior (how many tick for 1 second).
83 */
84unsigned int BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
85
86/* Board identification string */
87char BSP_productIdent[20]            = {0};
88char BSP_serialNumber[20]            = {0};
89
90/* VPD appends an extra char -- what for ? */
91char BSP_enetAddr0[7]                = {0};
92char BSP_enetAddr1[7]                = {0};
93char BSP_enetAddr2[7]                = {0};
94
95static void
96prether(char *b, int idx)
97{
98int i;
99        printk("Ethernet %i                  %02X", idx, *b++);
100        for ( i=0; i<5; i++ )
101                printk(":%02X",*b++);
102        printk("\n");
103}
104
105
106BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
107BSP_polling_getchar_function_type BSP_poll_char = NULL;
108
109void BSP_panic(char *s)
110{
111  printk("\n%s PANIC %s\n",_RTEMS_version, s);
112  __asm__ __volatile ("sc");
113}
114
115void _BSP_Fatal_error(unsigned int v)
116{
117  printk("\n%s PANIC ERROR %x\n",_RTEMS_version, v);
118  __asm__ __volatile ("sc");
119}
120
121char *rtems_progname;
122
123/*
124 *  Use the shared implementations of the following routines
125 */
126
127char * save_boot_params(void* r3, void *r4, void* r5, char *additional_boot_options)
128{
129
130  strncpy(cmdline_buf, additional_boot_options, CMDLINE_BUF_SIZE);
131  cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
132  return cmdline_buf;
133}
134
135#define CS_CONFIG_CS_EN (1<<31)
136#define CS_BNDS_SA(x)   ((((uint32_t)(x))>>(31-15)) & 0xff)
137#define CS_BNDS_EA(x)   ((((uint32_t)(x))>>(31-31)) & 0xff)
138
139static inline uint32_t
140_ccsr_rd32(uint32_t off)
141{
142        return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) );
143}
144
145static inline void
146_ccsr_wr32(uint32_t off, uint32_t val)
147{
148        out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val );
149}
150
151
152STATIC uint32_t
153BSP_get_mem_size( void )
154{
155int i;
156uint32_t        cs_bnds, cs_config;
157uint32_t        memsz=0;
158uint32_t        v;
159
160        for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
161                if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
162                        v = _ccsr_rd32( cs_bnds );
163
164                        memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
165                }
166        }
167        return memsz << 24;
168}
169
170STATIC void
171BSP_calc_freqs( void )
172{
173uint32_t        porpllsr   = _ccsr_rd32( 0xe0000 );
174unsigned        plat_ratio = (porpllsr >> (31-30)) & 0x1f;
175unsigned    e500_ratio = (porpllsr >> (31-15)) & 0x3f;
176
177        switch ( plat_ratio ) {
178                case  2: case  3: case  4: case  5: case  6:
179                case  8: case  9: case 10: case 12: case 16:
180                /* supported ratios */
181                        BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
182                break;
183
184                default:
185                        BSP_panic("Unknown PLL sys-clock ratio; something's wrong here");
186        }
187
188        switch ( e500_ratio ) {
189                case 4: case 5: case 6: case 7:
190                        BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
191                break;
192
193                default:
194                        BSP_panic("Unknown PLL e500-clock ratio; something's wrong here");
195        }
196
197        printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
198        printk("CPU Clock Freq:                    %10u Hz\n", BSP_processor_frequency);
199}
200
201void
202bsp_predriver_hook(void)
203{
204        /* Some drivers (RTC) may need i2c */
205        BSP_i2c_initialize();
206}
207
208/*
209 *  bsp_start
210 *
211 *  This routine does the bulk of the system initialization.
212 */
213
214#include <libcpu/spr.h>
215
216SPR_RW(HID1)
217
218void bsp_start( void )
219{
220rtems_status_code   sc;
221unsigned char       *stack;
222uintptr_t           intrStackStart;
223uintptr_t           intrStackSize;
224char                *chpt;
225ppc_cpu_id_t        myCpu;
226ppc_cpu_revision_t  myCpuRevision;
227int                 i;
228E500_tlb_va_cache_t *tlb;
229
230VpdBufRec          vpdData [] = {
231        { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
232        { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
233        { key: BusClockHz,   instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency)  },
234        { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
235        { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
236        { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
237        VPD_END
238};
239
240        /* Intersperse messages with actions to help locate problems */
241        printk("-----------------------------------------\n");
242
243        /*
244         * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
245         * function store the result in global variables so that it can be used
246         * later...
247         */
248        myCpu         = get_ppc_cpu_type();
249        myCpuRevision = get_ppc_cpu_revision();
250
251        printk("Welcome to %s\n", _RTEMS_version);
252        printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
253
254        /*
255         * the initial stack  has aready been set to this value in start.S
256         * so there is no need to set it in r1 again... It is just for info
257         * so that It can be printed without accessing R1.
258         */
259        asm volatile("mr %0, 1":"=r"(stack));
260
261        /* tag the bottom */
262        *((uint32_t*)stack) = 0;
263
264        /*
265         * Initialize the interrupt related settings.
266         */
267        intrStackStart = (uintptr_t) __rtems_end;
268        intrStackSize = rtems_configuration_get_interrupt_stack_size();
269
270        /*
271         * Initialize default raw exception handlers.
272         */
273        sc = ppc_exc_initialize(
274                PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
275                intrStackStart,
276                intrStackSize
277        );
278        if (sc != RTEMS_SUCCESSFUL) {
279                BSP_panic("cannot initialize exceptions");
280        }
281
282        printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
283
284#ifdef SHOW_MORE_INIT_SETTINGS
285        printk("Additionnal boot options are %s\n", BSP_commandline_string);
286        printk("Initial system stack at %x\n",      stack);
287        printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
288#endif
289
290#ifdef SHOW_MORE_INIT_SETTINGS
291        printk("Going to start PCI buses scanning and initialization\n");
292#endif
293
294        BSP_mem_size            = BSP_get_mem_size();
295
296        {
297                /* memory-select errors were disabled in 'start.S';
298                 * motload has all TLBs mapping a possible larger area as
299                 * memory (not-guarded, caching-enabled) than actual physical
300                 * memory is available.
301                 * In case of speculative loads this may cause 'memory-select' errors
302                 * which seem to raise 'core_fault_in' (found no description in
303                 * the manual but I experienced this problem).
304                 * Such errors (if HID1[RFXE] is clear) may *stall* execution
305                 * leading to mysterious 'hangs'.
306                 *
307                 * Here we remove all mappings, re-enable memory-select
308                 * errors and make sure we enable HID1[RFXE] to avoid
309                 * stalls (since we don't implement handling individual
310                 * error-handling interrupts).
311                 */
312
313                /* enable machine check for bad bus errors */
314                _write_HID1( _read_HID1() | 0x20000 );
315
316                rtems_e500_initlb();
317
318                for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
319                        /* disable TLBs for caching-enabled, non-guarded areas
320                         * beyond physical memory
321                         */
322                        if (    tlb->att.v
323                            &&  0xa != (tlb->att.wimge & 0xa)
324                                &&  (tlb->va.va_epn<<12) >= BSP_mem_size ) {
325                                rtems_e500_clrtlb( E500_SELTLB_1 | i );
326                        }
327                }
328
329                /* clear all pending memory errors */
330                _ccsr_wr32(0x2e40, 0xffffffff);
331                /* enable checking for memory-select errors */
332                _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
333        }
334
335        BSP_vpdRetrieveFields( vpdData );
336
337        printk("Board Type: %s (S/N %s)\n",
338                        BSP_productIdent[0] ? BSP_productIdent : "n/a",
339                        BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
340
341        printk("External (=PCI Bus) Clock Freq   ");
342        if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
343                BSP_pci_bus_frequency   = 66666666;
344                printk(" NOT FOUND in VPD; using %10u Hz\n",
345                                BSP_pci_bus_frequency);
346        } else {
347                printk(": %10u Hz\n",
348                                BSP_pci_bus_frequency);
349        }
350
351        /* Calculate CPU and CCB bus freqs */
352        BSP_calc_freqs();
353
354        pci_initialize();
355
356        prether(BSP_enetAddr0, 0);
357        prether(BSP_enetAddr1, 1);
358        prether(BSP_enetAddr2, 2);
359
360        /* need to tweak the motload setup */
361        BSP_motload_pci_fixup();
362
363#ifdef SHOW_MORE_INIT_SETTINGS
364        printk("Number of PCI buses found is : %d\n", pci_bus_count());
365        {
366                BSP_pciConfigDump_early();
367        }
368#endif
369
370        if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
371                char            *endp;
372                uint32_t        sz;
373                chpt+=6 /* strlen("MEMSZ=") */;
374                sz = strtoul(chpt, &endp, 0);
375                if ( endp != chpt )
376                        BSP_mem_size = sz;
377        }
378
379        printk("Memory:                            %10u bytes\n", BSP_mem_size);
380
381        BSP_bus_frequency       = 333333333;
382        BSP_processor_frequency = 833333333;
383        BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
384
385        /* clear hostbridge errors but leave MCP disabled -
386         * PCI config space scanning code will trip otherwise :-(
387         */
388        _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
389
390        bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
391
392        /*
393         * Initalize RTEMS IRQ system
394         */
395        BSP_rtems_irq_mng_init(0);
396
397        if (1) {
398                int i;
399                unsigned msr,tcr;
400                asm volatile("mfmsr %0":"=r"(msr));
401                asm volatile("mftcr %0":"=r"(tcr));
402                printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
403                asm volatile("mttcr %0"::"r"(0));
404                if (0) {
405                        asm volatile("mtmsr %0"::"r"(msr|0x8000));
406                        for (i=0; i<12; i++)
407                                BSP_enable_irq_at_pic(i);
408                        printk("IRQS enabled\n");
409                }
410        }
411
412        if (0) {
413                unsigned x;
414                asm volatile("mfivpr %0":"=r"(x));
415                printk("IVPR: 0x%08x\n",x);
416                asm volatile("mfivor8 %0":"=r"(x));
417                printk("IVOR8: 0x%08x\n",x);
418                printk("0x%08x\n",*(unsigned *)0xc00);
419                printk("0x%08x\n",*(unsigned *)0xc04);
420                printk("0x%08x\n",*(unsigned *)0xc08);
421                printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
422                if (0) {
423                        *(unsigned *)0xc08 = 0x4c000064;
424                        asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
425                }
426
427                printk("0x%08x\n", ppc_exc_lock_std);
428                printk("0x%08x\n", ppc_exc_gpr3_std);
429
430                asm volatile("sc");
431
432                printk("0x%08x\n", ppc_exc_lock_std);
433                printk("0x%08x\n", ppc_exc_gpr3_std);
434        }
435
436        printk("-----------------------------------------\n");
437
438#ifdef SHOW_MORE_INIT_SETTINGS
439        printk("Exit from bspstart\n");
440#endif
441
442}
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