source: rtems/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c @ becc686

4.11
Last change on this file since becc686 was becc686, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 13, 2014 at 8:49:46 PM

mvme3100/startup/bspstart.c: Remove myCpu variables and clean up

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File size: 11.6 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  Modified for mvme3100 by T. Straumann
17 */
18
19#include <string.h>
20#include <stdlib.h>
21
22#include <rtems.h>
23#include <bsp.h>
24#include <bsp/bootcard.h>
25#include <rtems/bspIo.h>
26#include <rtems/counter.h>
27#include <libcpu/spr.h>
28#include <libcpu/io.h>
29#include <libcpu/e500_mmu.h>
30#include <bsp/uart.h>
31#include <bsp/irq.h>
32#include <bsp/pci.h>
33#include <bsp/vpd.h>
34#include <libcpu/cpuIdent.h>
35#include <bsp/vectors.h>
36#include <rtems/powerpc/powerpc.h>
37
38#define SHOW_MORE_INIT_SETTINGS
39#undef  DEBUG
40
41#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
42
43#ifdef  DEBUG
44#define STATIC
45#else
46#define STATIC static
47#endif
48
49extern unsigned long __rtems_end[];
50extern void          BSP_vme_config(void);
51extern void          BSP_pciConfigDump_early( void );
52extern unsigned      ppc_exc_lock_std, ppc_exc_gpr3_std;
53
54/*
55 * Copy Additional boot param passed by boot loader
56 */
57#define CMDLINE_BUF_SIZE  2048
58
59static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
60char *BSP_commandline_string         = cmdline_buf;
61
62/*
63 * Vital Board data Start using DATA RESIDUAL
64 */
65uint32_t bsp_clicks_per_usec         = 0;
66/*
67 * Total memory using RESIDUAL DATA
68 */
69unsigned int BSP_mem_size            = 0;
70/*
71 * PCI Bus Frequency
72 */
73unsigned int BSP_pci_bus_frequency   = 0xdeadbeef;
74/*
75 * PPC Bus Frequency
76 */
77unsigned int BSP_bus_frequency       = 0;
78/*
79 * processor clock frequency
80 */
81unsigned int BSP_processor_frequency = 0;
82/*
83 * Time base divisior (how many tick for 1 second).
84 */
85unsigned int BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
86
87/* Board identification string */
88char BSP_productIdent[20]            = {0};
89char BSP_serialNumber[20]            = {0};
90
91/* VPD appends an extra char -- what for ? */
92char BSP_enetAddr0[7]                = {0};
93char BSP_enetAddr1[7]                = {0};
94char BSP_enetAddr2[7]                = {0};
95
96static void
97prether(char *b, int idx)
98{
99int i;
100  printk("Ethernet %i                  %02X", idx, *b++);
101  for ( i=0; i<5; i++ )
102    printk(":%02X",*b++);
103  printk("\n");
104}
105
106BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
107BSP_polling_getchar_function_type BSP_poll_char = NULL;
108
109void BSP_panic(char *s)
110{
111  printk("\n%s PANIC %s\n",_RTEMS_version, s);
112  __asm__ __volatile ("sc");
113}
114
115void _BSP_Fatal_error(unsigned int v)
116{
117  printk("\n%s PANIC ERROR %x\n",_RTEMS_version, v);
118  __asm__ __volatile ("sc");
119}
120
121char *rtems_progname;
122
123/*
124 *  Use the shared implementations of the following routines
125 */
126char * save_boot_params(
127  void* r3,
128  void *r4,
129  void* r5,
130  char *additional_boot_options)
131{
132
133  strncpy(cmdline_buf, additional_boot_options, CMDLINE_BUF_SIZE);
134  cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
135  return cmdline_buf;
136}
137
138#define CS_CONFIG_CS_EN (1<<31)
139#define CS_BNDS_SA(x)  ((((uint32_t)(x))>>(31-15)) & 0xff)
140#define CS_BNDS_EA(x)  ((((uint32_t)(x))>>(31-31)) & 0xff)
141
142static inline uint32_t
143_ccsr_rd32(uint32_t off)
144{
145  return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) );
146}
147
148static inline void
149_ccsr_wr32(uint32_t off, uint32_t val)
150{
151  out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val );
152}
153
154
155STATIC uint32_t
156BSP_get_mem_size( void )
157{
158  int i;
159  uint32_t  cs_bnds, cs_config;
160  uint32_t  memsz=0;
161  uint32_t  v;
162
163  for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
164    if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
165      v = _ccsr_rd32( cs_bnds );
166
167      memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
168    }
169  }
170  return memsz << 24;
171}
172
173STATIC void
174BSP_calc_freqs( void )
175{
176  uint32_t  porpllsr   = _ccsr_rd32( 0xe0000 );
177  unsigned  plat_ratio = (porpllsr >> (31-30)) & 0x1f;
178  unsigned    e500_ratio = (porpllsr >> (31-15)) & 0x3f;
179
180  switch ( plat_ratio ) {
181    case  2: case  3: case  4: case  5: case  6:
182    case  8: case  9: case 10: case 12: case 16:
183    /* supported ratios */
184      BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
185    break;
186
187    default:
188      BSP_panic("Unknown PLL sys-clock ratio; something's wrong here");
189  }
190
191  switch ( e500_ratio ) {
192    case 4: case 5: case 6: case 7:
193      BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
194    break;
195
196    default:
197      BSP_panic("Unknown PLL e500-clock ratio; something's wrong here");
198  }
199
200  printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
201  printk("CPU Clock Freq:                    %10u Hz\n", BSP_processor_frequency);
202}
203
204void
205bsp_predriver_hook(void)
206{
207  /* Some drivers (RTC) may need i2c */
208  BSP_i2c_initialize();
209}
210
211/*
212 *  bsp_start
213 *
214 *  This routine does the bulk of the system initialization.
215 */
216
217#include <libcpu/spr.h>
218
219SPR_RW(HID1)
220
221void bsp_start( void )
222{
223  unsigned char       *stack;
224  uintptr_t            intrStackStart;
225  uintptr_t            intrStackSize;
226  char                *chpt;
227  int                  i;
228  ppc_cpu_id_t         myCpu;
229  ppc_cpu_revision_t   myCpuRevision;
230  E500_tlb_va_cache_t *tlb;
231
232VpdBufRec          vpdData [] = {
233 { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
234 { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
235 { key: BusClockHz,   instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency)  },
236 { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
237 { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
238 { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
239 VPD_END
240};
241
242  /* Intersperse messages with actions to help locate problems */
243  printk("-----------------------------------------\n");
244
245  /*
246   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
247   * function store the result in global variables so that it can be used
248   * later...
249   */
250  myCpu = get_ppc_cpu_type();
251  myCpuRevision = get_ppc_cpu_revision();
252
253  printk("Welcome to %s\n", _RTEMS_version);
254  printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
255
256  /*
257   * the initial stack  has aready been set to this value in start.S
258   * so there is no need to set it in r1 again... It is just for info
259   * so that It can be printed without accessing R1.
260   */
261  asm volatile("mr %0, 1":"=r"(stack));
262
263  /* tag the bottom */
264  *((uint32_t*)stack) = 0;
265
266  /*
267   * Initialize the interrupt related settings.
268   */
269  intrStackStart = (uintptr_t) __rtems_end;
270  intrStackSize = rtems_configuration_get_interrupt_stack_size();
271
272  /*
273   * Initialize default raw exception handlers.
274   */
275  ppc_exc_initialize(intrStackStart, intrStackSize);
276
277  printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
278
279#ifdef SHOW_MORE_INIT_SETTINGS
280  printk("Additionnal boot options are %s\n", BSP_commandline_string);
281  printk("Initial system stack at %x\n",      stack);
282  printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
283#endif
284
285#ifdef SHOW_MORE_INIT_SETTINGS
286  printk("Going to start PCI buses scanning and initialization\n");
287#endif
288
289  BSP_mem_size            = BSP_get_mem_size();
290
291  {
292    /* memory-select errors were disabled in 'start.S';
293     * motload has all TLBs mapping a possible larger area as
294     * memory (not-guarded, caching-enabled) than actual physical
295     * memory is available.
296     * In case of speculative loads this may cause 'memory-select' errors
297     * which seem to raise 'core_fault_in' (found no description in
298     * the manual but I experienced this problem).
299     * Such errors (if HID1[RFXE] is clear) may *stall* execution
300     * leading to mysterious 'hangs'.
301     *
302     * Here we remove all mappings, re-enable memory-select
303     * errors and make sure we enable HID1[RFXE] to avoid
304     * stalls (since we don't implement handling individual
305     * error-handling interrupts).
306     */
307
308    /* enable machine check for bad bus errors */
309    _write_HID1( _read_HID1() | 0x20000 );
310
311    rtems_e500_initlb();
312
313    for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
314      /* disable TLBs for caching-enabled, non-guarded areas
315       * beyond physical memory
316       */
317      if (    tlb->att.v
318          &&  0xa != (tlb->att.wimge & 0xa)
319        &&  (tlb->va.va_epn<<12) >= BSP_mem_size ) {
320        rtems_e500_clrtlb( E500_SELTLB_1 | i );
321      }
322    }
323
324    /* clear all pending memory errors */
325    _ccsr_wr32(0x2e40, 0xffffffff);
326    /* enable checking for memory-select errors */
327    _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
328  }
329
330  BSP_vpdRetrieveFields( vpdData );
331
332  printk("Board Type: %s (S/N %s)\n",
333      BSP_productIdent[0] ? BSP_productIdent : "n/a",
334      BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
335
336  printk("External (=PCI Bus) Clock Freq   ");
337  if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
338    BSP_pci_bus_frequency  = 66666666;
339    printk(" NOT FOUND in VPD; using %10u Hz\n",
340        BSP_pci_bus_frequency);
341  } else {
342    printk(": %10u Hz\n",
343        BSP_pci_bus_frequency);
344  }
345
346  /* Calculate CPU and CCB bus freqs */
347  BSP_calc_freqs();
348
349  pci_initialize();
350
351  prether(BSP_enetAddr0, 0);
352  prether(BSP_enetAddr1, 1);
353  prether(BSP_enetAddr2, 2);
354
355  /* need to tweak the motload setup */
356  BSP_motload_pci_fixup();
357
358#ifdef SHOW_MORE_INIT_SETTINGS
359  printk("Number of PCI buses found is : %d\n", pci_bus_count());
360  {
361    BSP_pciConfigDump_early();
362  }
363#endif
364
365  if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
366    char    *endp;
367    uint32_t   sz;
368    chpt+=6 /* strlen("MEMSZ=") */;
369    sz = strtoul(chpt, &endp, 0);
370    if ( endp != chpt )
371      BSP_mem_size = sz;
372  }
373
374  printk("Memory:                            %10u bytes\n", BSP_mem_size);
375
376  BSP_bus_frequency       = 333333333;
377  BSP_processor_frequency = 833333333;
378  BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
379
380  /* clear hostbridge errors but leave MCP disabled -
381   * PCI config space scanning code will trip otherwise :-(
382   */
383  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
384
385  bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
386  rtems_counter_initialize_converter(
387    BSP_bus_frequency / (BSP_time_base_divisor / 1000)
388  );
389
390  /*
391   * Initalize RTEMS IRQ system
392   */
393  BSP_rtems_irq_mng_init(0);
394
395  if (1) {
396    int i;
397    unsigned msr,tcr;
398    asm volatile("mfmsr %0":"=r"(msr));
399    asm volatile("mftcr %0":"=r"(tcr));
400    printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
401    asm volatile("mttcr %0"::"r"(0));
402    if (0) {
403      asm volatile("mtmsr %0"::"r"(msr|0x8000));
404      for (i=0; i<12; i++)
405        BSP_enable_irq_at_pic(i);
406      printk("IRQS enabled\n");
407    }
408  }
409
410  if (0) {
411    unsigned x;
412    asm volatile("mfivpr %0":"=r"(x));
413    printk("IVPR: 0x%08x\n",x);
414    asm volatile("mfivor8 %0":"=r"(x));
415    printk("IVOR8: 0x%08x\n",x);
416    printk("0x%08x\n",*(unsigned *)0xc00);
417    printk("0x%08x\n",*(unsigned *)0xc04);
418    printk("0x%08x\n",*(unsigned *)0xc08);
419    printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
420    if (0) {
421      *(unsigned *)0xc08 = 0x4c000064;
422      asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
423    }
424
425    printk("0x%08x\n", ppc_exc_lock_std);
426    printk("0x%08x\n", ppc_exc_gpr3_std);
427
428    asm volatile("sc");
429
430    printk("0x%08x\n", ppc_exc_lock_std);
431    printk("0x%08x\n", ppc_exc_gpr3_std);
432  }
433
434  printk("-----------------------------------------\n");
435
436#ifdef SHOW_MORE_INIT_SETTINGS
437  printk("Exit from bspstart\n");
438#endif
439}
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