source: rtems/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c @ a884df3

5
Last change on this file since a884df3 was 07d96453, checked in by Sebastian Huber <sebastian.huber@…>, on 11/21/17 at 11:00:49

powerpc: Remove _BSP_Fatal_error()

BSPs can use the bsp_fatal_extension() to provide BSP-specific fatal
error handling. There is no need for a _BSP_Fatal_error().

Close #3246.

  • Property mode set to 100644
File size: 11.2 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.org/license/LICENSE.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  Modified for mvme3100 by T. Straumann
17 */
18
19#include <string.h>
20#include <stdlib.h>
21#include <inttypes.h>
22
23#include <rtems.h>
24#include <bsp.h>
25#include <bsp/bootcard.h>
26#include <rtems/bspIo.h>
27#include <rtems/counter.h>
28#include <libcpu/spr.h>
29#include <libcpu/io.h>
30#include <libcpu/e500_mmu.h>
31#include <bsp/uart.h>
32#include <bsp/irq.h>
33#include <bsp/pci.h>
34#include <bsp/vpd.h>
35#include <libcpu/cpuIdent.h>
36#include <bsp/vectors.h>
37#include <rtems/powerpc/powerpc.h>
38
39#define SHOW_MORE_INIT_SETTINGS
40#undef  DEBUG
41
42#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
43
44#ifdef  DEBUG
45#define STATIC
46#else
47#define STATIC static
48#endif
49
50extern unsigned long __rtems_end[];
51extern unsigned      ppc_exc_lock_std, ppc_exc_gpr3_std;
52
53/*
54 * Copy Additional boot param passed by boot loader
55 */
56#define CMDLINE_BUF_SIZE  2048
57
58static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
59char *BSP_commandline_string         = cmdline_buf;
60
61/*
62 * Vital Board data Start using DATA RESIDUAL
63 */
64uint32_t bsp_clicks_per_usec         = 0;
65/*
66 * Total memory using RESIDUAL DATA
67 */
68unsigned int BSP_mem_size            = 0;
69/*
70 * PCI Bus Frequency
71 */
72unsigned int BSP_pci_bus_frequency   = 0xdeadbeef;
73/*
74 * PPC Bus Frequency
75 */
76unsigned int BSP_bus_frequency       = 0;
77/*
78 * processor clock frequency
79 */
80unsigned int BSP_processor_frequency = 0;
81/*
82 * Time base divisior (how many tick for 1 second).
83 */
84unsigned int BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
85
86/* Board identification string */
87char BSP_productIdent[20]            = {0};
88char BSP_serialNumber[20]            = {0};
89
90/* VPD appends an extra char -- what for ? */
91char BSP_enetAddr0[7]                = {0};
92char BSP_enetAddr1[7]                = {0};
93char BSP_enetAddr2[7]                = {0};
94
95static void
96prether(char *b, int idx)
97{
98int i;
99  printk("Ethernet %i                  %02X", idx, *b++);
100  for ( i=0; i<5; i++ )
101    printk(":%02X",*b++);
102  printk("\n");
103}
104
105BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
106BSP_polling_getchar_function_type BSP_poll_char = NULL;
107
108char *rtems_progname;
109
110/*
111 *  Use the shared implementations of the following routines
112 */
113char *save_boot_params(
114  void *r3,
115  void *r4,
116  void *r5,
117  char *cmdline_start,
118  char *cmdline_end
119)
120{
121
122  strncpy(cmdline_buf, cmdline_start, CMDLINE_BUF_SIZE);
123  cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
124  return cmdline_buf;
125}
126
127#define CS_CONFIG_CS_EN (1<<31)
128#define CS_BNDS_SA(x)  ((((uint32_t)(x))>>(31-15)) & 0xff)
129#define CS_BNDS_EA(x)  ((((uint32_t)(x))>>(31-31)) & 0xff)
130
131static inline uint32_t
132_ccsr_rd32(uint32_t off)
133{
134  return in_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off) );
135}
136
137static inline void
138_ccsr_wr32(uint32_t off, uint32_t val)
139{
140  out_be32( (volatile uint32_t *)(BSP_8540_CCSR_BASE + off), val );
141}
142
143
144STATIC uint32_t
145BSP_get_mem_size( void )
146{
147  int i;
148  uint32_t  cs_bnds, cs_config;
149  uint32_t  memsz=0;
150  uint32_t  v;
151
152  for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
153    if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
154      v = _ccsr_rd32( cs_bnds );
155
156      memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
157    }
158  }
159  return memsz << 24;
160}
161
162STATIC void
163BSP_calc_freqs( void )
164{
165  uint32_t  porpllsr   = _ccsr_rd32( 0xe0000 );
166  unsigned  plat_ratio = (porpllsr >> (31-30)) & 0x1f;
167  unsigned    e500_ratio = (porpllsr >> (31-15)) & 0x3f;
168
169  switch ( plat_ratio ) {
170    case  2: case  3: case  4: case  5: case  6:
171    case  8: case  9: case 10: case 12: case 16:
172    /* supported ratios */
173      BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
174    break;
175
176    default:
177      rtems_panic("Unknown PLL sys-clock ratio; something's wrong here");
178  }
179
180  switch ( e500_ratio ) {
181    case 4: case 5: case 6: case 7:
182      BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
183    break;
184
185    default:
186      rtems_panic("Unknown PLL e500-clock ratio; something's wrong here");
187  }
188
189  printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
190  printk("CPU Clock Freq:                    %10u Hz\n", BSP_processor_frequency);
191}
192
193/*
194 *  bsp_start
195 *
196 *  This routine does the bulk of the system initialization.
197 */
198
199#include <libcpu/spr.h>
200
201SPR_RW(HID1)
202
203void bsp_start( void )
204{
205  unsigned char       *stack;
206  uintptr_t            intrStackStart;
207  uintptr_t            intrStackSize;
208  char                *chpt;
209  int                  i;
210  ppc_cpu_id_t         myCpu;
211  ppc_cpu_revision_t   myCpuRevision;
212  E500_tlb_va_cache_t *tlb;
213
214VpdBufRec          vpdData [] = {
215 { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
216 { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
217 { key: BusClockHz,   instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency)  },
218 { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
219 { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
220 { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
221 VPD_END
222};
223
224  /* Intersperse messages with actions to help locate problems */
225  printk("-----------------------------------------\n");
226
227  /*
228   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
229   * function store the result in global variables so that it can be used
230   * later...
231   */
232  myCpu = get_ppc_cpu_type();
233  myCpuRevision = get_ppc_cpu_revision();
234
235  printk("Welcome to %s\n", _RTEMS_version);
236  printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
237
238  /*
239   * the initial stack  has aready been set to this value in start.S
240   * so there is no need to set it in r1 again... It is just for info
241   * so that It can be printed without accessing R1.
242   */
243  asm volatile("mr %0, 1":"=r"(stack));
244
245  /* tag the bottom */
246  *((uint32_t*)stack) = 0;
247
248  /*
249   * Initialize the interrupt related settings.
250   */
251  intrStackStart = (uintptr_t) __rtems_end;
252  intrStackSize = rtems_configuration_get_interrupt_stack_size();
253
254  /*
255   * Initialize default raw exception handlers.
256   */
257  ppc_exc_initialize(intrStackStart, intrStackSize);
258
259  printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
260
261#ifdef SHOW_MORE_INIT_SETTINGS
262  printk("Additionnal boot options are %s\n", BSP_commandline_string);
263  printk("Initial system stack at %" PRIxPTR "\n", (uintptr_t) stack);
264  printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
265#endif
266
267#ifdef SHOW_MORE_INIT_SETTINGS
268  printk("Going to start PCI buses scanning and initialization\n");
269#endif
270
271  BSP_mem_size            = BSP_get_mem_size();
272
273  {
274    /* memory-select errors were disabled in 'start.S';
275     * motload has all TLBs mapping a possible larger area as
276     * memory (not-guarded, caching-enabled) than actual physical
277     * memory is available.
278     * In case of speculative loads this may cause 'memory-select' errors
279     * which seem to raise 'core_fault_in' (found no description in
280     * the manual but I experienced this problem).
281     * Such errors (if HID1[RFXE] is clear) may *stall* execution
282     * leading to mysterious 'hangs'.
283     *
284     * Here we remove all mappings, re-enable memory-select
285     * errors and make sure we enable HID1[RFXE] to avoid
286     * stalls (since we don't implement handling individual
287     * error-handling interrupts).
288     */
289
290    /* enable machine check for bad bus errors */
291    _write_HID1( _read_HID1() | 0x20000 );
292
293    rtems_e500_initlb();
294
295    for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
296      /* disable TLBs for caching-enabled, non-guarded areas
297       * beyond physical memory
298       */
299      if (    tlb->att.v
300          &&  0xa != (tlb->att.wimge & 0xa)
301        &&  (tlb->va.va_epn<<12) >= BSP_mem_size ) {
302        rtems_e500_clrtlb( E500_SELTLB_1 | i );
303      }
304    }
305
306    /* clear all pending memory errors */
307    _ccsr_wr32(0x2e40, 0xffffffff);
308    /* enable checking for memory-select errors */
309    _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
310  }
311
312  BSP_vpdRetrieveFields( vpdData );
313
314  printk("Board Type: %s (S/N %s)\n",
315      BSP_productIdent[0] ? BSP_productIdent : "n/a",
316      BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
317
318  printk("External (=PCI Bus) Clock Freq   ");
319  if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
320    BSP_pci_bus_frequency  = 66666666;
321    printk(" NOT FOUND in VPD; using %10u Hz\n",
322        BSP_pci_bus_frequency);
323  } else {
324    printk(": %10u Hz\n",
325        BSP_pci_bus_frequency);
326  }
327
328  /* Calculate CPU and CCB bus freqs */
329  BSP_calc_freqs();
330
331  pci_initialize();
332
333  prether(BSP_enetAddr0, 0);
334  prether(BSP_enetAddr1, 1);
335  prether(BSP_enetAddr2, 2);
336
337  /* need to tweak the motload setup */
338  BSP_motload_pci_fixup();
339
340#ifdef SHOW_MORE_INIT_SETTINGS
341  printk("Number of PCI buses found is : %d\n", pci_bus_count());
342  {
343    BSP_pciConfigDump_early();
344  }
345#endif
346
347  if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
348    char    *endp;
349    uint32_t   sz;
350    chpt+=6 /* strlen("MEMSZ=") */;
351    sz = strtoul(chpt, &endp, 0);
352    if ( endp != chpt )
353      BSP_mem_size = sz;
354  }
355
356  printk("Memory:                            %10u bytes\n", BSP_mem_size);
357
358  BSP_bus_frequency       = 333333333;
359  BSP_processor_frequency = 833333333;
360  BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
361
362  /* clear hostbridge errors but leave MCP disabled -
363   * PCI config space scanning code will trip otherwise :-(
364   */
365  _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
366
367  bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
368  rtems_counter_initialize_converter(
369    BSP_bus_frequency / (BSP_time_base_divisor / 1000)
370  );
371
372  /*
373   * Initalize RTEMS IRQ system
374   */
375  BSP_rtems_irq_mng_init(0);
376
377  if (1) {
378    int i;
379    unsigned msr,tcr;
380    asm volatile("mfmsr %0":"=r"(msr));
381    asm volatile("mftcr %0":"=r"(tcr));
382    printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
383    asm volatile("mttcr %0"::"r"(0));
384    if (0) {
385      asm volatile("mtmsr %0"::"r"(msr|0x8000));
386      for (i=0; i<12; i++)
387        BSP_enable_irq_at_pic(i);
388      printk("IRQS enabled\n");
389    }
390  }
391
392  if (0) {
393    unsigned x;
394    asm volatile("mfivpr %0":"=r"(x));
395    printk("IVPR: 0x%08x\n",x);
396    asm volatile("mfivor8 %0":"=r"(x));
397    printk("IVOR8: 0x%08x\n",x);
398    printk("0x%08x\n",*(unsigned *)0xc00);
399    printk("0x%08x\n",*(unsigned *)0xc04);
400    printk("0x%08x\n",*(unsigned *)0xc08);
401    printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
402    if (0) {
403      *(unsigned *)0xc08 = 0x4c000064;
404      asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
405    }
406
407    printk("0x%08x\n", ppc_exc_lock_std);
408    printk("0x%08x\n", ppc_exc_gpr3_std);
409
410    asm volatile("sc");
411
412    printk("0x%08x\n", ppc_exc_lock_std);
413    printk("0x%08x\n", ppc_exc_gpr3_std);
414  }
415
416  printk("-----------------------------------------\n");
417
418#ifdef SHOW_MORE_INIT_SETTINGS
419  printk("Exit from bspstart\n");
420#endif
421}
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