1 | /* |
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2 | * This routine starts the application. It includes application, |
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3 | * board, and monitor specific initialization and configuration. |
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4 | * The generic CPU dependent initialization has been performed |
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5 | * before this routine is invoked. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-1998. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.rtems.com/license/LICENSE. |
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13 | * |
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14 | * Modified to support the MCP750. |
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15 | * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
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16 | * |
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17 | * Modified for mvme3100 by T. Straumann |
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18 | * |
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19 | * $Id$ |
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20 | */ |
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21 | |
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22 | #include <string.h> |
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23 | #include <stdlib.h> |
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24 | |
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25 | #include <rtems.h> |
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26 | #include <bsp.h> |
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27 | #include <rtems/bspIo.h> |
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28 | #include <libcpu/spr.h> |
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29 | #include <libcpu/io.h> |
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30 | #include <bsp/uart.h> |
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31 | #include <bsp/irq.h> |
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32 | #include <bsp/pci.h> |
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33 | #include <bsp/vpd.h> |
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34 | #include <libcpu/cpuIdent.h> |
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35 | #include <bsp/vectors.h> |
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36 | #include <rtems/powerpc/powerpc.h> |
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37 | |
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38 | #define SHOW_MORE_INIT_SETTINGS |
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39 | #undef DEBUG |
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40 | |
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41 | #ifdef DEBUG |
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42 | #define STATIC |
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43 | #else |
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44 | #define STATIC static |
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45 | #endif |
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46 | |
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47 | extern unsigned long __rtems_end[]; |
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48 | extern void bsp_cleanup(void); |
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49 | extern void BSP_vme_config(); |
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50 | |
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51 | SPR_RW(SPRG0) |
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52 | SPR_RW(SPRG1) |
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53 | |
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54 | /* |
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55 | * Copy Additional boot param passed by boot loader |
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56 | */ |
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57 | #define CMDLINE_BUF_SIZE 2048 |
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58 | |
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59 | static char cmdline_buf[CMDLINE_BUF_SIZE] = {0}; |
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60 | char *BSP_commandline_string = cmdline_buf; |
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61 | |
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62 | extern const char *BSP_build_date; |
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63 | |
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64 | /* |
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65 | * Vital Board data Start using DATA RESIDUAL |
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66 | */ |
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67 | uint32_t bsp_clicks_per_usec = 0; |
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68 | /* |
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69 | * Total memory using RESIDUAL DATA |
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70 | */ |
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71 | unsigned int BSP_mem_size = 0; |
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72 | /* |
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73 | * Where the heap starts; is used by bsp_pretasking_hook; |
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74 | */ |
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75 | unsigned int BSP_heap_start = 0; |
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76 | /* |
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77 | * PCI Bus Frequency |
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78 | */ |
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79 | unsigned int BSP_pci_bus_frequency = 0xdeadbeef; |
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80 | /* |
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81 | * PPC Bus Frequency |
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82 | */ |
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83 | unsigned int BSP_bus_frequency = 0; |
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84 | /* |
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85 | * processor clock frequency |
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86 | */ |
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87 | unsigned int BSP_processor_frequency = 0; |
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88 | /* |
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89 | * Time base divisior (how many tick for 1 second). |
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90 | */ |
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91 | unsigned int BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */ |
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92 | |
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93 | /* Board identification string */ |
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94 | char BSP_productIdent[20] = {0}; |
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95 | char BSP_serialNumber[20] = {0}; |
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96 | |
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97 | /* VPD appends an extra char -- what for ? */ |
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98 | char BSP_enetAddr0[7] = {0}; |
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99 | char BSP_enetAddr1[7] = {0}; |
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100 | char BSP_enetAddr2[7] = {0}; |
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101 | |
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102 | static void |
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103 | prether(char *b, int idx) |
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104 | { |
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105 | int i; |
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106 | printk("Ethernet %i %02X", idx, *b++); |
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107 | for ( i=0; i<5; i++ ) |
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108 | printk(":%02X",*b++); |
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109 | printk("\n"); |
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110 | } |
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111 | |
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112 | /* |
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113 | * system init stack and soft ir stack size |
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114 | */ |
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115 | #define INIT_STACK_SIZE 0x1000 |
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116 | #define INTR_STACK_SIZE rtems_configuration_get_interrupt_stack_size() |
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117 | |
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118 | BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial; |
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119 | |
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120 | void BSP_panic(char *s) |
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121 | { |
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122 | printk("\n%s PANIC %s\n",_RTEMS_version, s); |
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123 | __asm__ __volatile ("sc"); |
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124 | } |
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125 | |
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126 | void _BSP_Fatal_error(unsigned int v) |
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127 | { |
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128 | printk("\n%s PANIC ERROR %x\n",_RTEMS_version, v); |
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129 | __asm__ __volatile ("sc"); |
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130 | } |
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131 | |
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132 | /* |
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133 | * The original table from the application and our copy of it with |
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134 | * some changes. |
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135 | */ |
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136 | |
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137 | extern rtems_configuration_table Configuration; |
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138 | |
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139 | char *rtems_progname; |
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140 | |
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141 | /* |
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142 | * Use the shared implementations of the following routines |
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143 | */ |
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144 | |
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145 | void save_boot_params(void* r3, void *r4, void* r5, char *additional_boot_options) |
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146 | { |
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147 | |
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148 | strncpy(cmdline_buf, additional_boot_options, CMDLINE_BUF_SIZE); |
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149 | cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0'; |
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150 | } |
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151 | |
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152 | #define CS_CONFIG_CS_EN (1<<31) |
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153 | #define CS_BNDS_SA(x) ((((uint32_t)(x))>>(31-15)) & 0xff) |
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154 | #define CS_BNDS_EA(x) ((((uint32_t)(x))>>(31-31)) & 0xff) |
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155 | |
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156 | static inline uint32_t |
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157 | _ccsr_rd32(uint32_t off) |
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158 | { |
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159 | return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) ); |
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160 | } |
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161 | |
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162 | static inline void |
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163 | _ccsr_wr32(uint32_t off, uint32_t val) |
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164 | { |
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165 | out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val ); |
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166 | } |
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167 | |
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168 | |
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169 | STATIC uint32_t |
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170 | BSP_get_mem_size() |
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171 | { |
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172 | int i; |
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173 | uint32_t cs_bnds, cs_config; |
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174 | uint32_t memsz=0; |
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175 | uint32_t v; |
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176 | |
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177 | for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) { |
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178 | if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) { |
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179 | v = _ccsr_rd32( cs_bnds ); |
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180 | |
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181 | memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1; |
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182 | } |
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183 | } |
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184 | return memsz << 24; |
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185 | } |
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186 | |
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187 | STATIC void |
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188 | BSP_calc_freqs() |
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189 | { |
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190 | uint32_t porpllsr = _ccsr_rd32( 0xe0000 ); |
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191 | unsigned plat_ratio = (porpllsr >> (31-30)) & 0x1f; |
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192 | unsigned e500_ratio = (porpllsr >> (31-15)) & 0x3f; |
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193 | |
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194 | switch ( plat_ratio ) { |
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195 | case 2: case 3: case 4: case 5: case 6: |
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196 | case 8: case 9: case 10: case 12: case 16: |
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197 | /* supported ratios */ |
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198 | BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio; |
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199 | break; |
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200 | |
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201 | default: |
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202 | BSP_panic("Unknown PLL sys-clock ratio; something's wrong here"); |
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203 | } |
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204 | |
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205 | switch ( e500_ratio ) { |
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206 | case 4: case 5: case 6: case 7: |
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207 | BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1; |
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208 | break; |
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209 | |
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210 | default: |
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211 | BSP_panic("Unknown PLL e500-clock ratio; something's wrong here"); |
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212 | } |
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213 | |
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214 | printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency); |
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215 | printk("CPU Clock Freq: %10u Hz\n", BSP_processor_frequency); |
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216 | } |
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217 | |
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218 | void |
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219 | bsp_predriver_hook(void) |
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220 | { |
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221 | /* Some drivers (RTC) may need i2c */ |
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222 | BSP_i2c_initialize(); |
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223 | } |
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224 | |
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225 | /* |
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226 | * bsp_start |
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227 | * |
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228 | * This routine does the bulk of the system initialization. |
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229 | */ |
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230 | |
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231 | #include <libcpu/spr.h> |
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232 | |
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233 | SPR_RW(HID1) |
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234 | |
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235 | void bsp_start( void ) |
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236 | { |
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237 | unsigned char *stack; |
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238 | register uint32_t intrStack; |
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239 | register uint32_t *intrStackPtr; |
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240 | unsigned char *work_space_start; |
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241 | char *chpt; |
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242 | ppc_cpu_id_t myCpu; |
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243 | ppc_cpu_revision_t myCpuRevision; |
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244 | |
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245 | VpdBufRec vpdData [] = { |
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246 | { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 }, |
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247 | { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 }, |
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248 | { key: BusClockHz, instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency) }, |
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249 | { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) }, |
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250 | { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) }, |
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251 | { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) }, |
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252 | VPD_END |
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253 | }; |
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254 | |
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255 | /* Intersperse messages with actions to help locate problems */ |
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256 | printk("-----------------------------------------\n"); |
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257 | |
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258 | /* |
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259 | * Get CPU identification dynamically. Note that the get_ppc_cpu_type() |
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260 | * function store the result in global variables so that it can be used |
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261 | * later... |
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262 | */ |
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263 | myCpu = get_ppc_cpu_type(); |
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264 | myCpuRevision = get_ppc_cpu_revision(); |
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265 | |
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266 | printk("Welcome to %s\n", _RTEMS_version); |
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267 | printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100"); |
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268 | |
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269 | /* |
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270 | * the initial stack has aready been set to this value in start.S |
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271 | * so there is no need to set it in r1 again... It is just for info |
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272 | * so that It can be printed without accessing R1. |
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273 | */ |
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274 | asm volatile("mr %0, 1":"=r"(stack)); |
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275 | #if 0 |
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276 | stack = ((unsigned char*) __rtems_end) + |
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277 | INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE; |
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278 | #endif |
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279 | |
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280 | /* tag the bottom */ |
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281 | *((uint32_t*)stack) = 0; |
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282 | |
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283 | /* |
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284 | * Initialize the interrupt related settings |
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285 | * SPRG1 = software managed IRQ stack |
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286 | * |
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287 | * This could be done later (e.g in IRQ_INIT) but it helps to understand |
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288 | * some settings below... |
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289 | */ |
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290 | BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE; |
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291 | |
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292 | /* reserve space for the marker/tag frame */ |
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293 | intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE; |
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294 | |
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295 | /* make sure it's properly aligned */ |
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296 | intrStack &= ~(CPU_STACK_ALIGNMENT-1); |
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297 | |
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298 | /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ |
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299 | intrStackPtr = (uint32_t*) intrStack; |
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300 | *intrStackPtr = 0; |
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301 | |
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302 | _write_SPRG1(intrStack); |
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303 | |
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304 | /* signal them that we have fixed PR288 - eventually, this should go away */ |
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305 | _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); |
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306 | |
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307 | /* |
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308 | * Initialize default raw exception handlers. See vectors/vectors_init.c |
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309 | */ |
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310 | initialize_exceptions(); |
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311 | |
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312 | printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision); |
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313 | |
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314 | #ifdef SHOW_MORE_INIT_SETTINGS |
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315 | printk("Additionnal boot options are %s\n", BSP_commandline_string); |
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316 | printk("Initial system stack at %x\n", stack); |
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317 | printk("Software IRQ stack at %x\n", intrStack); |
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318 | #endif |
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319 | |
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320 | #ifdef SHOW_MORE_INIT_SETTINGS |
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321 | printk("Going to start PCI buses scanning and initialization\n"); |
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322 | #endif |
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323 | |
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324 | { |
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325 | /* disable checking for memory-select errors */ |
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326 | *(volatile uint32_t*)0xe1002e44 |= 1; |
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327 | /* clear all pending errors */ |
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328 | *(volatile uint32_t*)0xe1002e40 = 0xffffffff; |
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329 | /* enable machine check for bad bus errors */ |
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330 | _write_HID1( _read_HID1() | 0x20000 ); |
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331 | } |
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332 | |
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333 | printk("Build Date: %s\n",BSP_build_date); |
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334 | |
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335 | BSP_vpdRetrieveFields( vpdData ); |
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336 | |
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337 | printk("Board Type: %s (S/N %s)\n", |
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338 | BSP_productIdent[0] ? BSP_productIdent : "n/a", |
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339 | BSP_serialNumber[0] ? BSP_serialNumber : "n/a"); |
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340 | |
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341 | printk("External (=PCI Bus) Clock Freq "); |
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342 | if ( 0xdeadbeef == BSP_pci_bus_frequency ) { |
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343 | BSP_pci_bus_frequency = 66666666; |
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344 | printk(" NOT FOUND in VPD; using %10u Hz\n", |
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345 | BSP_pci_bus_frequency); |
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346 | } else { |
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347 | printk(": %10u Hz\n", |
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348 | BSP_pci_bus_frequency); |
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349 | } |
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350 | |
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351 | /* Calculate CPU and CCB bus freqs */ |
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352 | BSP_calc_freqs(); |
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353 | |
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354 | pci_initialize(); |
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355 | |
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356 | prether(BSP_enetAddr0, 0); |
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357 | prether(BSP_enetAddr1, 1); |
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358 | prether(BSP_enetAddr2, 2); |
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359 | |
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360 | /* need to tweak the motload setup */ |
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361 | BSP_motload_pci_fixup(); |
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362 | |
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363 | #ifdef SHOW_MORE_INIT_SETTINGS |
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364 | printk("Number of PCI buses found is : %d\n", pci_bus_count()); |
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365 | { |
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366 | void BSP_pciConfigDump_early(); |
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367 | BSP_pciConfigDump_early(); |
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368 | } |
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369 | #endif |
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370 | |
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371 | #ifdef TEST_RAW_EXCEPTION_CODE |
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372 | printk("Testing exception handling Part 1\n"); |
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373 | /* |
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374 | * Cause a software exception |
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375 | */ |
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376 | __asm__ __volatile ("sc"); |
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377 | /* |
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378 | * Check we can still catch exceptions and return coorectly. |
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379 | */ |
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380 | printk("Testing exception handling Part 2\n"); |
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381 | __asm__ __volatile ("sc"); |
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382 | |
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383 | /* |
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384 | * Somehow doing the above seems to clobber SPRG0 on the mvme2100. It |
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385 | * is probably a not so subtle hint that you do not want to use PPCBug |
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386 | * once RTEMS is up and running. Anyway, we still needs to indicate |
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387 | * that we have fixed PR288. Eventually, this should go away. |
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388 | */ |
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389 | _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); |
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390 | #endif |
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391 | |
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392 | BSP_mem_size = BSP_get_mem_size(); |
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393 | |
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394 | if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) { |
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395 | char *endp; |
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396 | uint32_t sz; |
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397 | chpt+=6 /* strlen("MEMSZ=") */; |
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398 | sz = strtoul(chpt, &endp, 0); |
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399 | if ( endp != chpt ) |
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400 | BSP_mem_size = sz; |
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401 | } |
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402 | |
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403 | printk("Memory: %10u bytes\n", BSP_mem_size); |
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404 | |
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405 | BSP_bus_frequency = 333333333; |
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406 | BSP_processor_frequency = 833333333; |
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407 | BSP_time_base_divisor = 8000; /* if external RTC clock unused (HID0) */ |
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408 | |
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409 | /* clear hostbridge errors but leave MCP disabled - |
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410 | * PCI config space scanning code will trip otherwise :-( |
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411 | */ |
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412 | _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/); |
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413 | |
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414 | /* |
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415 | * Set up our hooks |
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416 | * Make sure libc_init is done before drivers initialized so that |
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417 | * they can use atexit() |
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418 | */ |
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419 | |
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420 | #if 0 |
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421 | Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; |
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422 | /* FIXME */ |
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423 | #endif |
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424 | bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000); |
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425 | |
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426 | #ifdef SHOW_MORE_INIT_SETTINGS |
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427 | printk("Configuration.work_space_size = %x\n", |
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428 | Configuration.work_space_size); |
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429 | #endif |
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430 | |
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431 | work_space_start = |
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432 | (unsigned char *)BSP_mem_size - Configuration.work_space_size; |
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433 | |
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434 | if ( work_space_start <= |
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435 | ((unsigned char *)__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE) { |
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436 | printk( "bspstart: Not enough RAM!!!\n" ); |
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437 | bsp_cleanup(); |
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438 | } |
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439 | |
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440 | Configuration.work_space_start = work_space_start; |
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441 | |
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442 | /* |
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443 | * Initalize RTEMS IRQ system |
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444 | */ |
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445 | BSP_rtems_irq_mng_init(0); |
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446 | |
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447 | if (1) { |
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448 | int i; |
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449 | unsigned msr,tcr; |
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450 | asm volatile("mfmsr %0":"=r"(msr)); |
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451 | asm volatile("mftcr %0":"=r"(tcr)); |
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452 | printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr); |
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453 | asm volatile("mttcr %0"::"r"(0)); |
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454 | if (0) { |
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455 | asm volatile("mtmsr %0"::"r"(msr|0x8000)); |
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456 | for (i=0; i<12; i++) |
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457 | BSP_enable_irq_at_pic(i); |
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458 | printk("IRQS enabled\n"); |
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459 | } |
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460 | } |
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461 | |
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462 | if (0) { |
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463 | extern unsigned ppc_exc_lock_std, ppc_exc_gpr3_std; |
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464 | unsigned x; |
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465 | asm volatile("mfivpr %0":"=r"(x)); |
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466 | printk("IVPR: 0x%08x\n",x); |
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467 | asm volatile("mfivor8 %0":"=r"(x)); |
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468 | printk("IVOR8: 0x%08x\n",x); |
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469 | printk("0x%08x\n",*(unsigned *)0xc00); |
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470 | printk("0x%08x\n",*(unsigned *)0xc04); |
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471 | printk("0x%08x\n",*(unsigned *)0xc08); |
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472 | printk("0x%08x\n\n\n",*(unsigned *)0xc0c); |
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473 | if (0) { |
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474 | *(unsigned *)0xc08 = 0x4c000064; |
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475 | asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00)); |
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476 | } |
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477 | |
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478 | printk("0x%08x\n", ppc_exc_lock_std); |
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479 | printk("0x%08x\n", ppc_exc_gpr3_std); |
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480 | |
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481 | asm volatile("sc"); |
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482 | |
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483 | printk("0x%08x\n", ppc_exc_lock_std); |
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484 | printk("0x%08x\n", ppc_exc_gpr3_std); |
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485 | } |
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486 | |
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487 | printk("-----------------------------------------\n"); |
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488 | |
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489 | #ifdef SHOW_MORE_INIT_SETTINGS |
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490 | printk("Exit from bspstart\n"); |
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491 | #endif |
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492 | |
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493 | } |
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