source: rtems/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c @ 704e371

4.104.115
Last change on this file since 704e371 was 704e371, checked in by Joel Sherrill <joel.sherrill@…>, on 09/15/08 at 22:05:08

2008-09-15 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, include/bsp.h, include/bspopts.h.in, startup/bspstart.c: Add use of bsp_get_work_area() in its own file and rely on BSP Framework to perform more initialization.
  • Property mode set to 100644
File size: 12.2 KB
RevLine 
[b599faa]1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-1998.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  Modified to support the MCP750.
15 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
16 *
17 *  Modified for mvme3100 by T. Straumann
18 *
19 *  $Id$
20 */
21
22#include <string.h>
23#include <stdlib.h>
24
25#include <rtems.h>
26#include <bsp.h>
27#include <rtems/bspIo.h>
28#include <libcpu/spr.h>
29#include <libcpu/io.h>
[02d2330]30#include <libcpu/e500_mmu.h>
[b599faa]31#include <bsp/uart.h>
32#include <bsp/irq.h>
33#include <bsp/pci.h>
34#include <bsp/vpd.h>
35#include <libcpu/cpuIdent.h>
36#include <bsp/vectors.h>
37#include <rtems/powerpc/powerpc.h>
38
39#define SHOW_MORE_INIT_SETTINGS
40#undef  DEBUG
41
[02d2330]42#define NumberOf(arr) (sizeof(arr)/sizeof(arr[0]))
43
[b599faa]44#ifdef  DEBUG
45#define STATIC
46#else
47#define STATIC static
48#endif
49
50extern unsigned long __rtems_end[];
[8da29747]51extern void          BSP_vme_config(void);
[b599faa]52
53SPR_RW(SPRG1)
54
55/*
56 * Copy Additional boot param passed by boot loader
57 */
58#define CMDLINE_BUF_SIZE        2048
59
60static char cmdline_buf[CMDLINE_BUF_SIZE] = {0};
61char *BSP_commandline_string         = cmdline_buf;
62
63extern const char *BSP_build_date;
64
65/*
66 * Vital Board data Start using DATA RESIDUAL
67 */
68uint32_t bsp_clicks_per_usec         = 0;
69/*
70 * Total memory using RESIDUAL DATA
71 */
72unsigned int BSP_mem_size            = 0;
73/*
74 * PCI Bus Frequency
75 */
76unsigned int BSP_pci_bus_frequency   = 0xdeadbeef;
77/*
78 * PPC Bus Frequency
79 */
80unsigned int BSP_bus_frequency       = 0;
81/*
82 * processor clock frequency
83 */
84unsigned int BSP_processor_frequency = 0;
85/*
86 * Time base divisior (how many tick for 1 second).
87 */
88unsigned int BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
89
90/* Board identification string */
91char BSP_productIdent[20]            = {0};
92char BSP_serialNumber[20]            = {0};
93
94/* VPD appends an extra char -- what for ? */
95char BSP_enetAddr0[7]                = {0};
96char BSP_enetAddr1[7]                = {0};
97char BSP_enetAddr2[7]                = {0};
98
99static void
100prether(char *b, int idx)
101{
102int i;
103        printk("Ethernet %i                  %02X", idx, *b++);
104        for ( i=0; i<5; i++ )
105                printk(":%02X",*b++);
106        printk("\n");
107}
108
109
110BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
111
112void BSP_panic(char *s)
113{
114  printk("\n%s PANIC %s\n",_RTEMS_version, s);
115  __asm__ __volatile ("sc");
116}
117
118void _BSP_Fatal_error(unsigned int v)
119{
120  printk("\n%s PANIC ERROR %x\n",_RTEMS_version, v);
121  __asm__ __volatile ("sc");
122}
123
124/*
125 *  The original table from the application and our copy of it with
126 *  some changes.
127 */
128
129extern rtems_configuration_table Configuration;
130
131char *rtems_progname;
132
133/*
134 *  Use the shared implementations of the following routines
135 */
136
137void save_boot_params(void* r3, void *r4, void* r5, char *additional_boot_options)
138{
139
140  strncpy(cmdline_buf, additional_boot_options, CMDLINE_BUF_SIZE);
141  cmdline_buf[CMDLINE_BUF_SIZE - 1] ='\0';
142}
143
144#define CS_CONFIG_CS_EN (1<<31)
145#define CS_BNDS_SA(x)   ((((uint32_t)(x))>>(31-15)) & 0xff)
146#define CS_BNDS_EA(x)   ((((uint32_t)(x))>>(31-31)) & 0xff)
147
148static inline uint32_t
149_ccsr_rd32(uint32_t off)
150{
151        return in_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off) );
152}
153
154static inline void
155_ccsr_wr32(uint32_t off, uint32_t val)
156{
157        out_be32( (volatile unsigned *)(BSP_8540_CCSR_BASE + off), val );
158}
159
160
161STATIC uint32_t
162BSP_get_mem_size()
163{
164int i;
165uint32_t        cs_bnds, cs_config;
166uint32_t        memsz=0;
167uint32_t        v;
168
169        for ( cs_bnds = 0x2000, cs_config=0x2080, i=0; i<4; i++, cs_bnds+=8, cs_config+=4 ) {
170                if ( CS_CONFIG_CS_EN & _ccsr_rd32( cs_config ) ) {
171                        v = _ccsr_rd32( cs_bnds );
172
173                        memsz += CS_BNDS_EA(v) - CS_BNDS_SA(v) + 1;
174                }
175        }
176        return memsz << 24;
177}
178
179STATIC void
180BSP_calc_freqs()
181{
182uint32_t        porpllsr   = _ccsr_rd32( 0xe0000 );
183unsigned        plat_ratio = (porpllsr >> (31-30)) & 0x1f;
184unsigned    e500_ratio = (porpllsr >> (31-15)) & 0x3f;
185
186        switch ( plat_ratio ) {
187                case  2: case  3: case  4: case  5: case  6:
188                case  8: case  9: case 10: case 12: case 16:
189                /* supported ratios */
190                        BSP_bus_frequency = BSP_pci_bus_frequency * plat_ratio;
191                break;
192
193                default:
194                        BSP_panic("Unknown PLL sys-clock ratio; something's wrong here");
195        }
196
197        switch ( e500_ratio ) {
198                case 4: case 5: case 6: case 7:
199                        BSP_processor_frequency = (BSP_pci_bus_frequency * e500_ratio) >> 1;
200                break;
201
202                default:
203                        BSP_panic("Unknown PLL e500-clock ratio; something's wrong here");
204        }
205
206        printk("Core Complex Bus (CCB) Clock Freq: %10u Hz\n", BSP_bus_frequency);
207        printk("CPU Clock Freq:                    %10u Hz\n", BSP_processor_frequency);
208}
209
210void
211bsp_predriver_hook(void)
212{
213        /* Some drivers (RTC) may need i2c */
214        BSP_i2c_initialize();
215}
216
217/*
218 *  bsp_start
219 *
220 *  This routine does the bulk of the system initialization.
221 */
222
[27d4569]223#include <libcpu/spr.h>
224
225SPR_RW(HID1)
226
[b599faa]227void bsp_start( void )
228{
[02d2330]229unsigned char       *stack;
[a86f3aac]230uint32_t            intrStackStart;
231uint32_t            intrStackSize;
[02d2330]232char                *chpt;
233ppc_cpu_id_t        myCpu;
234ppc_cpu_revision_t  myCpuRevision;
235int                 i;
236E500_tlb_va_cache_t *tlb;
[b599faa]237
238VpdBufRec          vpdData [] = {
239        { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
240        { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
241        { key: BusClockHz,   instance: 0, buf: &BSP_pci_bus_frequency, buflen: sizeof(BSP_pci_bus_frequency)  },
242        { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
243        { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
244        { key: EthernetAddr, instance: 2, buf: BSP_enetAddr2, buflen: sizeof(BSP_enetAddr2) },
245        VPD_END
246};
247
248        /* Intersperse messages with actions to help locate problems */
249        printk("-----------------------------------------\n");
250
251        /*
252         * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
253         * function store the result in global variables so that it can be used
254         * later...
255         */
256        myCpu         = get_ppc_cpu_type();
257        myCpuRevision = get_ppc_cpu_revision();
258
259        printk("Welcome to %s\n", _RTEMS_version);
260        printk("BSP: %s, CVS Release ($Name$)\n", "mvme3100");
261
262        /*
263         * the initial stack  has aready been set to this value in start.S
264         * so there is no need to set it in r1 again... It is just for info
265         * so that It can be printed without accessing R1.
266         */
267        asm volatile("mr %0, 1":"=r"(stack));
268#if 0
269        stack = ((unsigned char*) __rtems_end) +
270                INIT_STACK_SIZE - PPC_MINIMUM_STACK_FRAME_SIZE;
271#endif
272
273        /* tag the bottom */
274        *((uint32_t*)stack) = 0;
275
276        /*
[a86f3aac]277         * Initialize the interrupt related settings.
[b599faa]278         */
[704e371]279        intrStackStart = (uint32_t) __rtems_end + BSP_INIT_STACK_SIZE;
280        intrStackSize = rtems_configuration_get_interrupt_stack_size();
[b599faa]281
282        /*
[a86f3aac]283         * Initialize default raw exception handlers.
[b599faa]284         */
[a86f3aac]285        ppc_exc_initialize(
286                PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
287                intrStackStart,
288                intrStackSize
289        );
[b599faa]290
291        printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
292
293#ifdef SHOW_MORE_INIT_SETTINGS
294        printk("Additionnal boot options are %s\n", BSP_commandline_string);
295        printk("Initial system stack at %x\n",      stack);
[a86f3aac]296        printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize);
[b599faa]297#endif
298
299#ifdef SHOW_MORE_INIT_SETTINGS
300        printk("Going to start PCI buses scanning and initialization\n");
301#endif
302
[02d2330]303        BSP_mem_size            = BSP_get_mem_size();
304
[27d4569]305        {
[02d2330]306                /* memory-select errors were disabled in 'start.S';
307                 * motload has all TLBs mapping a possible larger area as
308                 * memory (not-guarded, caching-enabled) than actual physical
309                 * memory is available.
310                 * In case of speculative loads this may cause 'memory-select' errors
311                 * which seem to raise 'core_fault_in' (found no description in
312                 * the manual but I experienced this problem).
313                 * Such errors (if HID1[RFXE] is clear) may *stall* execution
314                 * leading to mysterious 'hangs'.
315                 *
316                 * Here we remove all mappings, re-enable memory-select
317                 * errors and make sure we enable HID1[RFXE] to avoid
318                 * stalls (since we don't implement handling individual
319                 * error-handling interrupts).
320                 */
321
[27d4569]322                /* enable machine check for bad bus errors */
323                _write_HID1( _read_HID1() | 0x20000 );
[02d2330]324
325                rtems_e500_initlb();
326
327                for ( i=0, tlb=rtems_e500_tlb_va_cache; i<NumberOf(rtems_e500_tlb_va_cache); i++, tlb++ ) {
328                        /* disable TLBs for caching-enabled, non-guarded areas
329                         * beyond physical memory
330                         */
331                        if (    tlb->att.v
332                            &&  0xa != (tlb->att.wimge & 0xa)
333                                &&  (tlb->va.va_epn<<12) >= BSP_mem_size ) {
334                                rtems_e500_clrtlb( E500_SELTLB_1 | i );
335                        }
336                }
337
338                /* clear all pending memory errors */
339                _ccsr_wr32(0x2e40, 0xffffffff);
340                /* enable checking for memory-select errors */
341                _ccsr_wr32(0x2e44, _ccsr_rd32(0x2e44) & ~1 );
[27d4569]342        }
343
[b599faa]344        printk("Build Date: %s\n",BSP_build_date);
345
346        BSP_vpdRetrieveFields( vpdData );
347
348        printk("Board Type: %s (S/N %s)\n",
349                        BSP_productIdent[0] ? BSP_productIdent : "n/a",
350                        BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
351
352        printk("External (=PCI Bus) Clock Freq   ");
353        if ( 0xdeadbeef == BSP_pci_bus_frequency ) {
354                BSP_pci_bus_frequency   = 66666666;
355                printk(" NOT FOUND in VPD; using %10u Hz\n",
356                                BSP_pci_bus_frequency);
357        } else {
358                printk(": %10u Hz\n",
359                                BSP_pci_bus_frequency);
360        }
361
362        /* Calculate CPU and CCB bus freqs */
363        BSP_calc_freqs();
364
365        pci_initialize();
366
367        prether(BSP_enetAddr0, 0);
368        prether(BSP_enetAddr1, 1);
369        prether(BSP_enetAddr2, 2);
370
371        /* need to tweak the motload setup */
372        BSP_motload_pci_fixup();
373
374#ifdef SHOW_MORE_INIT_SETTINGS
375        printk("Number of PCI buses found is : %d\n", pci_bus_count());
376        {
377                void BSP_pciConfigDump_early();
378                BSP_pciConfigDump_early();
379        }
380#endif
381
382#ifdef TEST_RAW_EXCEPTION_CODE
383        printk("Testing exception handling Part 1\n");
384        /*
385         * Cause a software exception
386         */
387        __asm__ __volatile ("sc");
388        /*
389         * Check we can still catch exceptions and return coorectly.
390         */
391        printk("Testing exception handling Part 2\n");
392        __asm__ __volatile ("sc");
393
394        /*
[a86f3aac]395         * Somehow doing the above seems to clobber SPRG0 on the mvme2100.  The
396         * interrupt disable mask is stored in SPRG0. Is this a problem?
[b599faa]397         */
[a86f3aac]398        ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
399
[b599faa]400#endif
401
[a86f3aac]402/* See above */
403#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
404
[b599faa]405        if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
406                char            *endp;
407                uint32_t        sz;
408                chpt+=6 /* strlen("MEMSZ=") */;
409                sz = strtoul(chpt, &endp, 0);
410                if ( endp != chpt )
411                        BSP_mem_size = sz;
412        }
413
414        printk("Memory:                            %10u bytes\n", BSP_mem_size);
415
416        BSP_bus_frequency       = 333333333;
417        BSP_processor_frequency = 833333333;
418        BSP_time_base_divisor   = 8000; /* if external RTC clock unused (HID0) */
419
420        /* clear hostbridge errors but leave MCP disabled -
421         * PCI config space scanning code will trip otherwise :-(
422         */
423        _BSP_clear_hostbridge_errors(0 /* enableMCP */, 0/*quiet*/);
424
[704e371]425        bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
[b599faa]426
427        /*
428         * Initalize RTEMS IRQ system
429         */
430        BSP_rtems_irq_mng_init(0);
431
432        if (1) {
433                int i;
434                unsigned msr,tcr;
435                asm volatile("mfmsr %0":"=r"(msr));
436                asm volatile("mftcr %0":"=r"(tcr));
437                printk("MSR is 0x%08x, TCR 0x%08x\n",msr,tcr);
438                asm volatile("mttcr %0"::"r"(0));
439                if (0) {
440                        asm volatile("mtmsr %0"::"r"(msr|0x8000));
441                        for (i=0; i<12; i++)
442                                BSP_enable_irq_at_pic(i);
443                        printk("IRQS enabled\n");
444                }
445        }
446
447        if (0) {
448                extern unsigned ppc_exc_lock_std, ppc_exc_gpr3_std;
449                unsigned x;
450                asm volatile("mfivpr %0":"=r"(x));
451                printk("IVPR: 0x%08x\n",x);
452                asm volatile("mfivor8 %0":"=r"(x));
453                printk("IVOR8: 0x%08x\n",x);
454                printk("0x%08x\n",*(unsigned *)0xc00);
455                printk("0x%08x\n",*(unsigned *)0xc04);
456                printk("0x%08x\n",*(unsigned *)0xc08);
457                printk("0x%08x\n\n\n",*(unsigned *)0xc0c);
458                if (0) {
459                        *(unsigned *)0xc08 = 0x4c000064;
460                        asm volatile("dcbf 0, %0; icbi 0, %0; sync; isync"::"r"(0xc00));
461                }
462
463                printk("0x%08x\n", ppc_exc_lock_std);
464                printk("0x%08x\n", ppc_exc_gpr3_std);
465
466                asm volatile("sc");
467
468                printk("0x%08x\n", ppc_exc_lock_std);
469                printk("0x%08x\n", ppc_exc_gpr3_std);
470        }
471
472        printk("-----------------------------------------\n");
473
474#ifdef SHOW_MORE_INIT_SETTINGS
475        printk("Exit from bspstart\n");
476#endif
477
478}
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