source:
rtems/c/src/lib/libbsp/powerpc/mvme3100/start/start.S
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0c875c6a
Last change on this file since 0c875c6a was 0c875c6a, checked in by Joel Sherrill <joel.sherrill@…>, on 01/28/11 at 20:29:53 | |
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1 | /* |
2 | * start.S : RTEMS entry point |
3 | * |
4 | * Copyright (C) 1999 Eric Valette. valette@crf.canon.fr |
5 | * |
6 | * The license and distribution terms for this file may be |
7 | * found in the file LICENSE in this distribution or at |
8 | * http://www.rtems.com/license/LICENSE. |
9 | * |
10 | * Modified for mvme3100 by T. Straumann, 2007. |
11 | * |
12 | * $Id$ |
13 | * |
14 | */ |
15 | |
16 | #include <rtems/asm.h> |
17 | #include <rtems/score/cpu.h> |
18 | #include <rtems/powerpc/powerpc.h> |
19 | |
20 | #include <bspopts.h> |
21 | |
22 | #define SYNC \ |
23 | sync; \ |
24 | isync |
25 | |
26 | #define KERNELBASE 0x0 |
27 | |
28 | /* cannot include <bsp.h> from assembly :-( */ |
29 | #ifndef BSP_8540_CCSR_BASE |
30 | #define BSP_8540_CCSR_BASE 0xe1000000 |
31 | #endif |
32 | |
33 | #define ERR_DISABLE_REG (BSP_8540_CCSR_BASE + 0x2e44) |
34 | |
35 | .text |
36 | .globl __rtems_entry_point |
37 | .type __rtems_entry_point,@function |
38 | __rtems_entry_point: |
39 | mr r31,r3 |
40 | mr r30,r4 |
41 | mr r29,r5 |
42 | mr r28,r6 |
43 | mr r27,r7 |
44 | /* disable checking for memory-select errors; motload has all TLBs |
45 | * mapping a possible larger area as memory (not-guarded, caching-enabled) |
46 | * than actual physical memory is available. |
47 | * In case of speculative loads this may cause 'memory-select' errors |
48 | * which seem to raise 'core_fault_in' (found no description in |
49 | * the manual but I experienced this problem). |
50 | * Such errors (if HID1[RFXE] is clear) may *stall* execution |
51 | * leading to mysterious 'hangs'. |
52 | * Note: enabling HID1[RFXE] at this point makes no sense since |
53 | * exceptions are not configured yet. Therefore we disable |
54 | * memory-select errors. |
55 | * Eventually (bspstart.c) we want to delete TLB entries for |
56 | * which no physical memory is present. |
57 | */ |
58 | lis r3, ERR_DISABLE_REG@ha |
59 | lwz r4, ERR_DISABLE_REG@l(r3) |
60 | /* disable memory-select errors */ |
61 | ori r4, r4, 1 |
62 | stw r4, ERR_DISABLE_REG@l(r3) |
63 | |
64 | /* Use MotLoad's TLB setup for now; caches are on already */ |
65 | bl __eabi /* setup EABI and SYSV environment */ |
66 | bl zero_bss |
67 | /* |
68 | * restore original args |
69 | */ |
70 | mr r3,r31 |
71 | mr r4,r30 |
72 | mr r5,r29 |
73 | mr r6,r28 |
74 | mr r7,r27 |
75 | bl save_boot_params |
76 | addis r9,r0, (__stack-PPC_MINIMUM_STACK_FRAME_SIZE)@ha |
77 | addi r9,r9, (__stack-PPC_MINIMUM_STACK_FRAME_SIZE)@l |
78 | /* align down to 16-bytes */ |
79 | li r5, (CPU_STACK_ALIGNMENT - 1) |
80 | andc r1, r9, r5 |
81 | /* |
82 | * We are now in a environment that is totally independent from |
83 | * bootloader setup. |
84 | */ |
85 | /* pass result of 'save_boot_params' to 'boot_card' in R3 */ |
86 | bl boot_card |
87 | /* point of no return: reset board here ? */ |
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