source: rtems/c/src/lib/libbsp/powerpc/mvme3100/irq/irq.h @ 9b4422a2

4.115
Last change on this file since 9b4422a2 was 9b4422a2, checked in by Joel Sherrill <joel.sherrill@…>, on 05/03/12 at 15:09:24

Remove All CVS Id Strings Possible Using a Script

Script does what is expected and tries to do it as
smartly as possible.

+ remove occurrences of two blank comment lines

next to each other after Id string line removed.

+ remove entire comment blocks which only exited to

contain CVS Ids

+ If the processing left a blank line at the top of

a file, it was removed.
  • Property mode set to 100644
File size: 3.9 KB
Line 
1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by RTEMS to write interrupt handlers.
5 *
6 *  Copyright (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 *
18 *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
19 */
20
21#ifndef BSP_POWERPC_IRQ_H
22#define BSP_POWERPC_IRQ_H
23
24#define BSP_SHARED_HANDLER_SUPPORT      1
25#include <rtems/irq.h>
26
27#ifndef ASM
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/*
34 * rtems_irq_number Definitions
35 */
36
37/* Must pad number of external sources to 16 because
38 * of the layout of vector/priority registers in the
39 * 8540's openpic where there is a gap between
40 * registers corresponding to external and core sources.
41 */
42#define BSP_EXT_IRQ_NUMBER          (16)
43#define BSP_CORE_IRQ_NUMBER                     (32)
44
45/* openpic glue code from shared/irq assigns priorities and configures
46 * initial ISRs for BSP_PCI_IRQ_NUMBER entries (plus ISA stuff on legacy
47 * boards). Hence PCI_IRQ_NUMBER must also cover the internal sources
48 * even though they have nothing to do with PCI.
49 */
50#define BSP_PCI_IRQ_NUMBER                      (BSP_EXT_IRQ_NUMBER + BSP_CORE_IRQ_NUMBER)
51#define BSP_PCI_IRQ_LOWEST_OFFSET       (0)
52#define BSP_PCI_IRQ_MAX_OFFSET          (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
53
54#define BSP_CORE_IRQ_LOWEST_OFFSET  (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_EXT_IRQ_NUMBER)
55#define BSP_CORE_IRQ_MAX_OFFSET         (BSP_CORE_IRQ_LOWEST_OFFSET + BSP_CORE_IRQ_NUMBER - 1)
56
57/*
58 * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
59 * handler might be connected
60 */
61#define BSP_PROCESSOR_IRQ_NUMBER        (1)
62#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CORE_IRQ_MAX_OFFSET + 1)
63#define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
64/* Misc vectors for OPENPIC irqs (IPI, timers)
65 */
66#define BSP_MISC_IRQ_NUMBER             (8)
67#define BSP_MISC_IRQ_LOWEST_OFFSET      (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
68#define BSP_MISC_IRQ_MAX_OFFSET         (BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1)
69/*
70 * Summary
71 */
72#define BSP_IRQ_NUMBER                  (BSP_MISC_IRQ_MAX_OFFSET + 1)
73#define BSP_LOWEST_OFFSET               (BSP_PCI_IRQ_LOWEST_OFFSET)
74#define BSP_MAX_OFFSET                  (BSP_MISC_IRQ_MAX_OFFSET)
75
76/*
77 * Some PCI IRQ symbolic name definition
78 */
79#define BSP_PCI_IRQ0                    (BSP_PCI_IRQ_LOWEST_OFFSET)
80
81#define BSP_VME0_IRQ                    (BSP_PCI_IRQ_LOWEST_OFFSET  +  0)
82#define BSP_VME1_IRQ                    (BSP_PCI_IRQ_LOWEST_OFFSET  +  1)
83#define BSP_VME2_IRQ                    (BSP_PCI_IRQ_LOWEST_OFFSET  +  2)
84#define BSP_VME3_IRQ                    (BSP_PCI_IRQ_LOWEST_OFFSET  +  3)
85
86#define BSP_ABORT_IRQ                   (BSP_PCI_IRQ_LOWEST_OFFSET  +  8)
87#define BSP_TEMP_IRQ                    (BSP_PCI_IRQ_LOWEST_OFFSET  +  9)
88#define BSP_PHY_IRQ                             (BSP_PCI_IRQ_LOWEST_OFFSET  + 10)
89#define BSP_RTC_IRQ                             (BSP_PCI_IRQ_LOWEST_OFFSET  + 11)
90
91/* Weird - they provide 3 different IRQ lines per ethernet controller
92 * but only one shared line for 2 UARTs ???
93 */
94#define BSP_UART_COM1_IRQ               (BSP_CORE_IRQ_LOWEST_OFFSET + 26)
95#define BSP_UART_COM2_IRQ               (BSP_CORE_IRQ_LOWEST_OFFSET + 26)
96#define BSP_I2C_IRQ                             (BSP_CORE_IRQ_LOWEST_OFFSET + 27)
97
98/*
99 * Some internal (CORE) name definitions
100 */
101/* Ethernet (FEC) */
102#define BSP_CORE_IRQ_FEC                (BSP_CORE_IRQ_LOWEST_OFFSET + 25)
103/* i2c controller */
104#define BSP_CORE_IRQ_I2C                (BSP_CORE_IRQ_LOWEST_OFFSET + 27)
105
106/*
107 * Some Processor execption handled as RTEMS IRQ symbolic name definition
108 */
109#define BSP_DECREMENTER                 (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
110
111/*-------------------------------------------------------------------------+
112| Function Prototypes.
113+--------------------------------------------------------------------------*/
114
115extern void BSP_rtems_irq_mng_init(unsigned cpuId);
116
117#include <bsp/irq_supp.h>
118
119#ifdef __cplusplus
120};
121#endif
122
123#endif
124#endif
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