source: rtems/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h @ c499856

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Last change on this file since c499856 was c499856, checked in by Chris Johns <chrisj@…>, on Mar 20, 2014 at 9:10:47 PM

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1/**
2 *  @file
3 *
4 *  @ingroup mvme3100_bsp
5 *
6 *  @brief This file contains BSP API definition.
7 */
8
9/*
10 *
11 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.org/license/LICENSE.
16 *
17 *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
18 */
19#ifndef _BSP_H
20#define _BSP_H
21
22#include <bspopts.h>
23#include <bsp/default-initial-extension.h>
24
25#include <rtems.h>
26#include <rtems/console.h>
27#include <libcpu/io.h>
28#include <rtems/clockdrv.h>
29#include <bsp/vectors.h>
30
31/**
32 *  @defgroup mvme3100_bsp confdefs.h overrides
33 *
34 *  @ingroup powerpc_mvme3100
35 *
36 *  @brief confdefs.h overrides for this BSP:
37 */
38
39#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
40
41/*
42 * diagram illustrating the role of the configuration
43 * constants
44 *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
45 *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
46 *                       address being 'visible' or not!).
47 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
48 * _VME_A32_WIN0_ON_VME: VME address of that same window
49 *
50 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
51 * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
52 * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
53 * the base address read from PCI config.space in order to translate that
54 * into a CPU address.
55 *
56 * NOTE: VME addresses should NEVER be translated using these constants!
57 *       they are strictly for BSP internal use. Drivers etc. should use
58 *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
59 *
60 *           CPU ADDR                  PCI_ADDR                                VME ADDR
61 *
62 *           00000000                  XXXXXXXX                                XXXXXXXX
63 *    ^  ^   ........
64 *    |  |
65 *    |  |  e.g., RAM                  XXXXXXXX
66 *    |  |                                                                     00000000
67 *    |  |  .........                                                          ^
68 *    |  |            (possible offset                                         |
69 *    |  |             between pci and XXXXXXXX                                | ......
70 *    |  |             cpu addresses)                                          |
71 *    |  v                                                                     |
72 *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
73 *    |     ........                   ........               ^                |
74 *    |                                invisible              |                |
75 *    |     ........                   from CPU               |                |
76 *    v                                                       |                |
77 *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
78 *                                                            |                |
79 *        pci devices   pci window                            |                |
80 *       visible here                                         v                v
81 *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
82 *                                                 vme window
83 *        VME devices   hostbridge                 mapped by
84 *       visible here                              universe
85 *                    =====================================================
86 *
87 */
88
89/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
90#define _IO_BASE            0xe0000000 /* Motload's PCI IO base */
91#define _ISA_MEM_BASE           CHRP_ISA_MEM_BASE
92/* address of our ram on the PCI bus   */
93#define PCI_DRAM_OFFSET         CHRP_PCI_DRAM_OFFSET
94/* offset of pci memory as seen from the CPU */
95#define PCI_MEM_BASE            0
96/* where (in CPU addr. space) does the PCI window start */
97#define PCI_MEM_WIN0            0x80000000
98
99/*
100 *  Base address definitions for several devices
101 */
102
103#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
104#define BSP_OPEN_PIC_BIG_ENDIAN
105
106#define BSP_8540_CCSR_BASE   (0xe1000000)
107
108#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500)
109#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
110#define PCI_CONFIG_ADDR      (BSP_8540_CCSR_BASE+0x8000)
111#define PCI_CONFIG_DATA      (BSP_8540_CCSR_BASE+0x8004)
112#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((unsigned int*)(addr), (val))
113
114#define BSP_CONSOLE_PORT        BSP_UART_COM1
115#define BSP_UART_BAUD_BASE      (-9600) /* use existing divisor to determine clock rate */
116#define BSP_UART_USE_SHARED_IRQS
117
118#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
119
120/* I2C Devices */
121/* Note that the i2c addresses stated in the manual are
122 * left-shifted by one bit.
123 */
124#define BSP_VPD_I2C_ADDR                        (0xA8>>1)               /* the VPD EEPROM  */
125#define BSP_USR0_I2C_ADDR                       (0xA4>>1)               /* the 1st user EEPROM */
126#define BSP_USR1_I2C_ADDR                       (0xA6>>1)               /* the 2nd user EEPROM */
127#define BSP_THM_I2C_ADDR                        (0x90>>1)               /* the DS1621 temperature sensor & thermostat */
128#define BSP_RTC_I2C_ADDR                        (0xD0>>1)               /* the DS1375 wall-clock */
129
130#define BSP_I2C_BUS_DESCRIPTOR          mpc8540_i2c_bus_descriptor
131
132#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
133
134#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
135#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
136#define BSP_I2C_USR1_EEPROM_NAME      "usr1-eeprom"
137#define BSP_I2C_DS1621_NAME           "ds1621"
138#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
139#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
140#define BSP_I2C_DS1375_RAW_NAME       "ds1375-raw"
141#define BSP_I2C_RTC_RAW_NAME          BSP_I2C_DS1375_RAW_NAME
142
143#define BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
144#define BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
145#define BSP_I2C_USR1_EEPROM_DEV_NAME     (BSP_I2C_BUS0_NAME"."BSP_I2C_USR1_EEPROM_NAME)
146#define BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
147#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
148#define BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
149#define BSP_I2C_DS1375_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1375_RAW_NAME)
150
151/* Definitions useful for bootloader (netboot); where to find
152 * boot/'environment' parameters.
153 */
154#define BSP_EEPROM_BOOTPARMS_NAME        BSP_I2C_USR1_EEPROM_DEV_NAME
155#define BSP_EEPROM_BOOTPARMS_SIZE        1024
156#define BSP_EEPROM_BOOTPARMS_OFFSET      0
157#define BSP_BOOTPARMS_WRITE_ENABLE()     do { BSP_eeprom_write_enable(); } while (0)
158#define BSP_BOOTPARMS_WRITE_DISABLE()    do { BSP_eeprom_write_protect();} while (0)
159
160
161#ifdef __cplusplus
162extern "C" {
163#endif
164/* Initialize the I2C driver and register all devices
165 * RETURNS 0 on success, -1 on error.
166 *
167 * Access to the VPD and user EEPROMS as well
168 * as the ds1621 temperature sensor is possible
169 * by means of file nodes
170 *
171 *   /dev/i2c0.vpd-eeprom   (read-only)
172 *   /dev/i2c0.usr-eeprom   (read-write)
173 *   /dev/i2c0.usr1-eeprom  (read-write)
174 *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
175 *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
176 *   /dev/i2c0.ds1375-raw   (read-write; transfer bytes to/from the ds1375)
177 *
178 */
179int
180BSP_i2c_initialize();
181
182/* System Control Register */
183#define BSP_MVME3100_SYS_CR                             ((volatile uint8_t *)0xe2000001)
184#define BSP_MVME3100_SYS_CR_RESET_MSK           (7<<5)
185#define BSP_MVME3100_SYS_CR_RESET                       (5<<5)
186#define BSP_MVME3100_SYS_CR_EEPROM_WP           (1<<1)
187#define BSP_MVME3100_SYS_CR_TSTAT_MSK           (1<<0)
188
189/* LED support */
190#define BSP_MVME3100_SYS_IND_REG                ((volatile uint8_t *)0xe2000002)
191#define BSP_LED_BRD_FAIL                                        (1<<0)
192#define BSP_LED_USR1                                            (1<<1)
193#define BSP_LED_USR2                                            (1<<2)
194#define BSP_LED_USR3                                            (1<<3)
195
196/* Flash CSR   */
197#define BSP_MVME3100_FLASH_CSR                  ((volatile uint8_t *)0xe2000003)
198#define BSP_MVME3100_FLASH_CSR_FLASH_RDY        (1<<0)
199#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL      (1<<1)
200#define BSP_MVME3100_FLASH_CSR_F_WP_HW          (1<<2)
201#define BSP_MVME3100_FLASH_CSR_F_WP_SW          (1<<3)
202#define BSP_MVME3100_FLASH_CSR_MAP_SEL          (1<<4)
203
204/* Phy interrupt detect */
205#define BSP_MVME3100_IRQ_DETECT_REG             ((volatile uint8_t *)0xe2000007)
206
207/* Atomically set bits in a sys-register; The bits set in 'mask'
208 * are set in the register others; are left unmodified.
209 *
210 * RETURNS: old state.
211 *
212 * NOTE   : since BSP_setSysReg( reg, 0 ) does not make
213 *          any changes this call may be used
214 *          to read the current status w/o modifying it.
215 */
216uint8_t
217BSP_setSysReg(volatile uint8_t *r, uint8_t mask);
218
219/* Atomically clear bits in a sys-register; The bits set in 'mask'
220 * are cleared in the register; others are left unmodified.
221 *
222 * RETURNS: old state.
223 *
224 * NOTE   : since BSP_clrSysReg( reg, 0 ) does not make
225 *          any changes this call may be used
226 *          to read the current status w/o modifying it.
227 */
228
229uint8_t
230BSP_clrSysReg(volatile uint8_t *r, uint8_t mask);
231
232/* Convenience wrappers around BSP_setSysReg()/BSP_clrSysReg() */
233
234/* Set write-protection for all EEPROM devices
235 * RETURNS: old status
236 */
237uint8_t
238BSP_eeprom_write_protect();
239
240/* Disengage write-protection for all EEPROM devices
241 * RETURNS: old status
242 */
243uint8_t
244BSP_eeprom_write_enable();
245
246/* Set LEDs that have their bit set in the mask
247 *
248 * RETURNS: old status.
249 *
250 * NOTE   : since BSP_setLEDs( 0 ) does not make
251 *          any changes this call may be used
252 *          to read the current status w/o modifying it.
253 */
254uint8_t
255BSP_setLEDs(uint8_t mask);
256
257/* Clear LEDs that have their bit set in the mask
258 *
259 * RETURNS: old status
260 *
261 * NOTE:  : see above (BSP_setLEDs)
262 */
263uint8_t
264BSP_clrLEDs(uint8_t mask);
265
266#if 0
267#define outport_byte(port,value) outb(value,port)
268#define outport_word(port,value) outw(value,port)
269#define outport_long(port,value) outl(value,port)
270
271#define inport_byte(port,value) (value = inb(port))
272#define inport_word(port,value) (value = inw(port))
273#define inport_long(port,value) (value = inl(port))
274#endif
275
276/*
277 * Total memory using RESIDUAL DATA
278 */
279extern unsigned int BSP_mem_size;
280/*
281 * PCI Bus Frequency
282 */
283extern unsigned int BSP_bus_frequency;
284/*
285 * processor clock frequency
286 */
287extern unsigned int BSP_processor_frequency;
288/*
289 * Time base divisior (how many tick for 1 second).
290 */
291extern unsigned int BSP_time_base_divisor;
292/*
293 * The commandline as passed from the bootloader.
294 */
295extern char *BSP_commandline_string;
296
297#define BSP_Convert_decrementer( _value ) \
298  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
299
300extern rtems_configuration_table  BSP_Configuration;
301extern void BSP_panic(char *s);
302/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
303extern int BSP_disconnect_clock_handler (void);
304extern int BSP_connect_clock_handler (void);
305
306/* clear hostbridge errors
307 *
308 * NOTE: The routine returns always (-1) if 'enableMCP==1'
309 *       [semantics needed by libbspExt] if the MCP input is not wired.
310 *       It returns and clears the error bits of the PCI status register.
311 *       MCP support is disabled because:
312 *         a) the 2100 has no raven chip
313 *         b) the raven (2300) would raise machine check interrupts
314 *            on PCI config space access to empty slots.
315 */
316extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
317extern void BSP_motload_pci_fixup();
318
319struct rtems_bsdnet_ifconfig;
320
321int
322rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching);
323
324#define RTEMS_BSP_NETWORK_DRIVER_NAME   "tse1"
325#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach
326
327#ifdef __cplusplus
328}
329#endif
330
331#endif
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