source: rtems/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h @ 704e371

4.104.11
Last change on this file since 704e371 was 704e371, checked in by Joel Sherrill <joel.sherrill@…>, on Sep 15, 2008 at 10:05:08 PM

2008-09-15 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, configure.ac, include/bsp.h, include/bspopts.h.in, startup/bspstart.c: Add use of bsp_get_work_area() in its own file and rely on BSP Framework to perform more initialization.
  • Property mode set to 100644
File size: 11.8 KB
Line 
1/*
2 *  bsp.h  -- contain BSP API definition.
3 *
4 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
5 *
6 *  The license and distribution terms for this file may be
7 *  found in found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 *
10 *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
11 *
12 * $Id$
13 */
14#ifndef _BSP_H
15#define _BSP_H
16
17#include <bspopts.h>
18
19#include <rtems.h>
20#include <rtems/console.h>
21#include <libcpu/io.h>
22#include <rtems/clockdrv.h>
23#include <bsp/vectors.h>
24
25/*
26 *  confdefs.h overrides for this BSP:
27 *   - termios serial ports (defaults to 1)
28 *   - Interrupt stack space is not minimum if defined.
29 */
30#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2
31#define CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
32 
33#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
34
35/*
36 * diagram illustrating the role of the configuration
37 * constants
38 *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
39 *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
40 *                       address being 'visible' or not!).
41 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
42 * _VME_A32_WIN0_ON_VME: VME address of that same window
43 *
44 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
45 * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
46 * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
47 * the base address read from PCI config.space in order to translate that
48 * into a CPU address.
49 *
50 * NOTE: VME addresses should NEVER be translated using these constants!
51 *       they are strictly for BSP internal use. Drivers etc. should use
52 *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
53 *
54 *           CPU ADDR                  PCI_ADDR                                VME ADDR
55 *
56 *           00000000                  XXXXXXXX                                XXXXXXXX
57 *    ^  ^   ........         
58 *    |  |
59 *    |  |  e.g., RAM                  XXXXXXXX
60 *    |  |                                                                     00000000
61 *    |  |  .........                                                          ^
62 *    |  |            (possible offset                                         |
63 *    |  |             between pci and XXXXXXXX                                | ......
64 *    |  |             cpu addresses)                                          |
65 *    |  v                                                                     |
66 *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
67 *    |     ........                   ........               ^                |
68 *    |                                invisible              |                |
69 *    |     ........                   from CPU               |                |
70 *    v                                                       |                |
71 *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
72 *                                                            |                |
73 *        pci devices   pci window                            |                |
74 *       visible here                                         v                v
75 *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
76 *                                                 vme window
77 *        VME devices   hostbridge                 mapped by
78 *       visible here                              universe
79 *                    =====================================================
80 *
81 */
82
83/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
84#define _IO_BASE            0xe0000000 /* Motload's PCI IO base */     
85#define _ISA_MEM_BASE           CHRP_ISA_MEM_BASE
86/* address of our ram on the PCI bus   */
87#define PCI_DRAM_OFFSET         CHRP_PCI_DRAM_OFFSET
88/* offset of pci memory as seen from the CPU */
89#define PCI_MEM_BASE            0
90/* where (in CPU addr. space) does the PCI window start */
91#define PCI_MEM_WIN0            0x80000000
92
93/*
94 *  Base address definitions for several devices
95 */
96
97#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
98#define BSP_OPEN_PIC_BIG_ENDIAN
99
100#define BSP_8540_CCSR_BASE   (0xe1000000)
101
102#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500)
103#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
104#define PCI_CONFIG_ADDR      (BSP_8540_CCSR_BASE+0x8000)
105#define PCI_CONFIG_DATA      (BSP_8540_CCSR_BASE+0x8004)
106#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((unsigned int*)(addr), (val))
107
108#define BSP_CONSOLE_PORT        BSP_UART_COM1
109#define BSP_UART_BAUD_BASE      (-9600) /* use existing divisor to determine clock rate */
110#define BSP_UART_USE_SHARED_IRQS
111
112#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
113
114/* I2C Devices */
115/* Note that the i2c addresses stated in the manual are
116 * left-shifted by one bit.
117 */
118#define BSP_VPD_I2C_ADDR                        (0xA8>>1)               /* the VPD EEPROM  */
119#define BSP_USR0_I2C_ADDR                       (0xA4>>1)               /* the 1st user EEPROM */
120#define BSP_USR1_I2C_ADDR                       (0xA6>>1)               /* the 2nd user EEPROM */
121#define BSP_THM_I2C_ADDR                        (0x90>>1)               /* the DS1621 temperature sensor & thermostat */
122#define BSP_RTC_I2C_ADDR                        (0xD0>>1)               /* the DS1375 wall-clock */
123       
124#define BSP_I2C_BUS_DESCRIPTOR          mpc8540_i2c_bus_descriptor
125
126#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
127
128#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
129#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
130#define BSP_I2C_USR1_EEPROM_NAME      "usr1-eeprom"
131#define BSP_I2C_DS1621_NAME           "ds1621"
132#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
133#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
134#define BSP_I2C_DS1375_RAW_NAME       "ds1375-raw"
135#define BSP_I2C_RTC_RAW_NAME          BSP_I2C_DS1375_RAW_NAME
136
137#define BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
138#define BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
139#define BSP_I2C_USR1_EEPROM_DEV_NAME     (BSP_I2C_BUS0_NAME"."BSP_I2C_USR1_EEPROM_NAME)
140#define BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
141#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
142#define BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
143#define BSP_I2C_DS1375_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1375_RAW_NAME)
144
145/* Definitions useful for bootloader (netboot); where to find
146 * boot/'environment' parameters.
147 */
148#define BSP_EEPROM_BOOTPARMS_NAME        BSP_I2C_USR1_EEPROM_DEV_NAME
149#define BSP_EEPROM_BOOTPARMS_SIZE        1024
150#define BSP_EEPROM_BOOTPARMS_OFFSET      0
151#define BSP_BOOTPARMS_WRITE_ENABLE()     do { BSP_eeprom_write_enable(); } while (0)
152#define BSP_BOOTPARMS_WRITE_DISABLE()    do { BSP_eeprom_write_protect();} while (0)
153
154
155#ifdef __cplusplus
156extern "C" {
157#endif
158/* Initialize the I2C driver and register all devices
159 * RETURNS 0 on success, -1 on error.
160 *
161 * Access to the VPD and user EEPROMS as well
162 * as the ds1621 temperature sensor is possible
163 * by means of file nodes
164 *
165 *   /dev/i2c0.vpd-eeprom   (read-only)
166 *   /dev/i2c0.usr-eeprom   (read-write)
167 *   /dev/i2c0.usr1-eeprom  (read-write)
168 *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
169 *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
170 *   /dev/i2c0.ds1375-raw   (read-write; transfer bytes to/from the ds1375)
171 *     
172 */
173int
174BSP_i2c_initialize();
175
176/* Misc utility definitions and routines */
177
178void
179rtemsReboot();
180
181/* System Control Register */
182#define BSP_MVME3100_SYS_CR                             ((volatile uint8_t *)0xe2000001)
183#define BSP_MVME3100_SYS_CR_RESET_MSK           (7<<5) 
184#define BSP_MVME3100_SYS_CR_RESET                       (5<<5) 
185#define BSP_MVME3100_SYS_CR_EEPROM_WP           (1<<1)
186#define BSP_MVME3100_SYS_CR_TSTAT_MSK           (1<<0)
187
188/* LED support */
189#define BSP_MVME3100_SYS_IND_REG                ((volatile uint8_t *)0xe2000002)
190#define BSP_LED_BRD_FAIL                                        (1<<0)
191#define BSP_LED_USR1                                            (1<<1)
192#define BSP_LED_USR2                                            (1<<2)
193#define BSP_LED_USR3                                            (1<<3)
194
195/* Flash CSR   */
196#define BSP_MVME3100_FLASH_CSR                  ((volatile uint8_t *)0xe2000003)
197#define BSP_MVME3100_FLASH_CSR_FLASH_RDY        (1<<0)
198#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL      (1<<1)
199#define BSP_MVME3100_FLASH_CSR_F_WP_HW          (1<<2)
200#define BSP_MVME3100_FLASH_CSR_F_WP_SW          (1<<3)
201#define BSP_MVME3100_FLASH_CSR_MAP_SEL          (1<<4)
202
203/* Phy interrupt detect */
204#define BSP_MVME3100_IRQ_DETECT_REG             ((volatile uint8_t *)0xe2000007)
205
206/* Atomically set bits in a sys-register; The bits set in 'mask'
207 * are set in the register others; are left unmodified.
208 *
209 * RETURNS: old state.
210 *
211 * NOTE   : since BSP_setSysReg( reg, 0 ) does not make
212 *          any changes this call may be used
213 *          to read the current status w/o modifying it.
214 */
215uint8_t
216BSP_setSysReg(volatile uint8_t *r, uint8_t mask);
217
218/* Atomically clear bits in a sys-register; The bits set in 'mask'
219 * are cleared in the register; others are left unmodified.
220 *
221 * RETURNS: old state.
222 *
223 * NOTE   : since BSP_clrSysReg( reg, 0 ) does not make
224 *          any changes this call may be used
225 *          to read the current status w/o modifying it.
226 */
227
228uint8_t
229BSP_clrSysReg(volatile uint8_t *r, uint8_t mask);
230
231/* Convenience wrappers around BSP_setSysReg()/BSP_clrSysReg() */
232
233/* Set write-protection for all EEPROM devices
234 * RETURNS: old status
235 */
236uint8_t
237BSP_eeprom_write_protect();
238
239/* Disengage write-protection for all EEPROM devices
240 * RETURNS: old status
241 */
242uint8_t
243BSP_eeprom_write_enable();
244
245/* Set LEDs that have their bit set in the mask
246 *
247 * RETURNS: old status.
248 *
249 * NOTE   : since BSP_setLEDs( 0 ) does not make
250 *          any changes this call may be used
251 *          to read the current status w/o modifying it.
252 */
253uint8_t
254BSP_setLEDs(uint8_t mask);
255
256/* Clear LEDs that have their bit set in the mask
257 *
258 * RETURNS: old status
259 *
260 * NOTE:  : see above (BSP_setLEDs)
261 */
262uint8_t
263BSP_clrLEDs(uint8_t mask);
264
265#if 0
266#define outport_byte(port,value) outb(value,port)
267#define outport_word(port,value) outw(value,port)
268#define outport_long(port,value) outl(value,port)
269
270#define inport_byte(port,value) (value = inb(port))
271#define inport_word(port,value) (value = inw(port))
272#define inport_long(port,value) (value = inl(port))
273#endif
274
275/*
276 * Total memory using RESIDUAL DATA
277 */
278extern unsigned int BSP_mem_size;
279/*
280 * PCI Bus Frequency
281 */
282extern unsigned int BSP_bus_frequency;
283/*
284 * processor clock frequency
285 */
286extern unsigned int BSP_processor_frequency;
287/*
288 * Time base divisior (how many tick for 1 second).
289 */
290extern unsigned int BSP_time_base_divisor;
291/*
292 * The commandline as passed from the bootloader.
293 */
294extern char *BSP_commandline_string;
295
296#define BSP_Convert_decrementer( _value ) \
297  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
298
299extern rtems_configuration_table  BSP_Configuration;
300extern void BSP_panic(char *s);
301extern void rtemsReboot(void);
302/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
303extern int BSP_disconnect_clock_handler (void);
304extern int BSP_connect_clock_handler (void);
305
306/* clear hostbridge errors
307 *
308 * NOTE: The routine returns always (-1) if 'enableMCP==1'
309 *       [semantics needed by libbspExt] if the MCP input is not wired.
310 *       It returns and clears the error bits of the PCI status register.
311 *       MCP support is disabled because:
312 *         a) the 2100 has no raven chip
313 *         b) the raven (2300) would raise machine check interrupts
314 *            on PCI config space access to empty slots.
315 */
316extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
317extern void BSP_motload_pci_fixup();
318
319struct rtems_bsdnet_ifconfig;
320
321int
322rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching);
323
324#define RTEMS_BSP_NETWORK_DRIVER_NAME   "tse1"
325#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach
326
327/*
328 * system init stack and soft ir stack size
329 */
330#define BSP_INIT_STACK_SIZE 0x1000
331
332#ifdef __cplusplus
333}
334#endif
335
336#endif
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