source: rtems/c/src/lib/libbsp/powerpc/mvme3100/include/bsp.h @ 0c875c6a

4.115
Last change on this file since 0c875c6a was 0c875c6a, checked in by Joel Sherrill <joel.sherrill@…>, on 01/28/11 at 20:29:53

2011-01-28 Joel Sherrill <joel.sherrilL@…>

  • beatnik/include/bsp.h, beatnik/irq/irq.h, beatnik/pci/gt_pci_init.c, ep1a/console/polled_io.c, ep1a/irq/openpic_xxx_irq.c, gen5200/include/irq.h, gen5200/irq/irq.c, gen5200/startup/bspstart.c, haleakala/irq/irq.c, mbx8xx/irq/irq.c, mbx8xx/irq/irq.h, motorola_powerpc/include/bsp.h, mpc8260ads/irq/irq.c, mpc8260ads/irq/irq.h, mvme3100/include/bsp.h, mvme3100/irq/irq.h, mvme3100/start/start.S, mvme5500/include/bsp.h, mvme5500/irq/irq.h, psim/include/bsp.h, psim/include/coverhd.h, psim/irq/irq.h, psim/shmsupp/addrconv.c, psim/shmsupp/getcfg.c, psim/startup/linkcmds, psim/tools/psim-gdb-top.in, psim/tools/psim-top.in, psim/tools/runtest-top.in, qemuppc/irq/irq.h, score603e/irq/irq.c, shared/bootloader/bootldr.h, shared/bootloader/em86.c, shared/bootloader/em86real.S, shared/bootloader/exception.S, shared/bootloader/head.S, shared/bootloader/lib.c, shared/bootloader/misc.c, shared/bootloader/mm.c, shared/bootloader/pci.c, shared/console/console.c, shared/console/consoleIo.h, shared/console/inch.c, shared/console/keyboard.h, shared/console/polled_io.c, shared/irq/i8259.c, shared/irq/irq.h, shared/irq/openpic_i8259_irq.c, shared/motorola/motorola.c, shared/motorola/motorola.h, shared/openpic/openpic.c, shared/openpic/openpic.h, shared/pci/pci.c, shared/residual/residual.c, shared/start/start.S, ss555/irq/irq.h: Fix typo where license said found in found in.
  • Property mode set to 100644
File size: 11.4 KB
Line 
1/*
2 *  bsp.h  -- contain BSP API definition.
3 *
4 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
5 *
6 *  The license and distribution terms for this file may be
7 *  found in the file LICENSE in this distribution or at
8 *  http://www.rtems.com/license/LICENSE.
9 *
10 *  Adapted for the mvme3100 BSP by T. Straumann, 2007.
11 *
12 * $Id$
13 */
14#ifndef _BSP_H
15#define _BSP_H
16
17#include <bspopts.h>
18
19#include <rtems.h>
20#include <rtems/console.h>
21#include <libcpu/io.h>
22#include <rtems/clockdrv.h>
23#include <bsp/vectors.h>
24
25/*
26 *  confdefs.h overrides for this BSP:
27 */
28#define CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK
29
30#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
31
32/*
33 * diagram illustrating the role of the configuration
34 * constants
35 *  PCI_MEM_WIN0:        CPU starting addr where PCI memory space is visible
36 *  PCI_MEM_BASE:        CPU address of PCI mem addr. zero. (regardless of this
37 *                       address being 'visible' or not!).
38 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
39 * _VME_A32_WIN0_ON_VME: VME address of that same window
40 *
41 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
42 * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
43 * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
44 * the base address read from PCI config.space in order to translate that
45 * into a CPU address.
46 *
47 * NOTE: VME addresses should NEVER be translated using these constants!
48 *       they are strictly for BSP internal use. Drivers etc. should use
49 *       the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
50 *
51 *           CPU ADDR                  PCI_ADDR                                VME ADDR
52 *
53 *           00000000                  XXXXXXXX                                XXXXXXXX
54 *    ^  ^   ........
55 *    |  |
56 *    |  |  e.g., RAM                  XXXXXXXX
57 *    |  |                                                                     00000000
58 *    |  |  .........                                                          ^
59 *    |  |            (possible offset                                         |
60 *    |  |             between pci and XXXXXXXX                                | ......
61 *    |  |             cpu addresses)                                          |
62 *    |  v                                                                     |
63 *    |  PCI_MEM_BASE  ------------->  00000000 ---------------                |
64 *    |     ........                   ........               ^                |
65 *    |                                invisible              |                |
66 *    |     ........                   from CPU               |                |
67 *    v                                                       |                |
68 *       PCI_MEM_WIN0 =============  first visible PCI addr   |                |
69 *                                                            |                |
70 *        pci devices   pci window                            |                |
71 *       visible here                                         v                v
72 *                      mapped by   ========== _VME_A32_WIN0_ON_PCI =======  _VME_A32_WIN0_ON_VME
73 *                                                 vme window
74 *        VME devices   hostbridge                 mapped by
75 *       visible here                              universe
76 *                    =====================================================
77 *
78 */
79
80/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
81#define _IO_BASE            0xe0000000 /* Motload's PCI IO base */
82#define _ISA_MEM_BASE           CHRP_ISA_MEM_BASE
83/* address of our ram on the PCI bus   */
84#define PCI_DRAM_OFFSET         CHRP_PCI_DRAM_OFFSET
85/* offset of pci memory as seen from the CPU */
86#define PCI_MEM_BASE            0
87/* where (in CPU addr. space) does the PCI window start */
88#define PCI_MEM_WIN0            0x80000000
89
90/*
91 *  Base address definitions for several devices
92 */
93
94#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
95#define BSP_OPEN_PIC_BIG_ENDIAN
96
97#define BSP_8540_CCSR_BASE   (0xe1000000)
98
99#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500)
100#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
101#define PCI_CONFIG_ADDR      (BSP_8540_CCSR_BASE+0x8000)
102#define PCI_CONFIG_DATA      (BSP_8540_CCSR_BASE+0x8004)
103#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((unsigned int*)(addr), (val))
104
105#define BSP_CONSOLE_PORT        BSP_UART_COM1
106#define BSP_UART_BAUD_BASE      (-9600) /* use existing divisor to determine clock rate */
107#define BSP_UART_USE_SHARED_IRQS
108
109#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
110
111/* I2C Devices */
112/* Note that the i2c addresses stated in the manual are
113 * left-shifted by one bit.
114 */
115#define BSP_VPD_I2C_ADDR                        (0xA8>>1)               /* the VPD EEPROM  */
116#define BSP_USR0_I2C_ADDR                       (0xA4>>1)               /* the 1st user EEPROM */
117#define BSP_USR1_I2C_ADDR                       (0xA6>>1)               /* the 2nd user EEPROM */
118#define BSP_THM_I2C_ADDR                        (0x90>>1)               /* the DS1621 temperature sensor & thermostat */
119#define BSP_RTC_I2C_ADDR                        (0xD0>>1)               /* the DS1375 wall-clock */
120
121#define BSP_I2C_BUS_DESCRIPTOR          mpc8540_i2c_bus_descriptor
122
123#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
124
125#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
126#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
127#define BSP_I2C_USR1_EEPROM_NAME      "usr1-eeprom"
128#define BSP_I2C_DS1621_NAME           "ds1621"
129#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
130#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
131#define BSP_I2C_DS1375_RAW_NAME       "ds1375-raw"
132#define BSP_I2C_RTC_RAW_NAME          BSP_I2C_DS1375_RAW_NAME
133
134#define BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
135#define BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
136#define BSP_I2C_USR1_EEPROM_DEV_NAME     (BSP_I2C_BUS0_NAME"."BSP_I2C_USR1_EEPROM_NAME)
137#define BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
138#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
139#define BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
140#define BSP_I2C_DS1375_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1375_RAW_NAME)
141
142/* Definitions useful for bootloader (netboot); where to find
143 * boot/'environment' parameters.
144 */
145#define BSP_EEPROM_BOOTPARMS_NAME        BSP_I2C_USR1_EEPROM_DEV_NAME
146#define BSP_EEPROM_BOOTPARMS_SIZE        1024
147#define BSP_EEPROM_BOOTPARMS_OFFSET      0
148#define BSP_BOOTPARMS_WRITE_ENABLE()     do { BSP_eeprom_write_enable(); } while (0)
149#define BSP_BOOTPARMS_WRITE_DISABLE()    do { BSP_eeprom_write_protect();} while (0)
150
151
152#ifdef __cplusplus
153extern "C" {
154#endif
155/* Initialize the I2C driver and register all devices
156 * RETURNS 0 on success, -1 on error.
157 *
158 * Access to the VPD and user EEPROMS as well
159 * as the ds1621 temperature sensor is possible
160 * by means of file nodes
161 *
162 *   /dev/i2c0.vpd-eeprom   (read-only)
163 *   /dev/i2c0.usr-eeprom   (read-write)
164 *   /dev/i2c0.usr1-eeprom  (read-write)
165 *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
166 *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
167 *   /dev/i2c0.ds1375-raw   (read-write; transfer bytes to/from the ds1375)
168 *
169 */
170int
171BSP_i2c_initialize();
172
173/* System Control Register */
174#define BSP_MVME3100_SYS_CR                             ((volatile uint8_t *)0xe2000001)
175#define BSP_MVME3100_SYS_CR_RESET_MSK           (7<<5)
176#define BSP_MVME3100_SYS_CR_RESET                       (5<<5)
177#define BSP_MVME3100_SYS_CR_EEPROM_WP           (1<<1)
178#define BSP_MVME3100_SYS_CR_TSTAT_MSK           (1<<0)
179
180/* LED support */
181#define BSP_MVME3100_SYS_IND_REG                ((volatile uint8_t *)0xe2000002)
182#define BSP_LED_BRD_FAIL                                        (1<<0)
183#define BSP_LED_USR1                                            (1<<1)
184#define BSP_LED_USR2                                            (1<<2)
185#define BSP_LED_USR3                                            (1<<3)
186
187/* Flash CSR   */
188#define BSP_MVME3100_FLASH_CSR                  ((volatile uint8_t *)0xe2000003)
189#define BSP_MVME3100_FLASH_CSR_FLASH_RDY        (1<<0)
190#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL      (1<<1)
191#define BSP_MVME3100_FLASH_CSR_F_WP_HW          (1<<2)
192#define BSP_MVME3100_FLASH_CSR_F_WP_SW          (1<<3)
193#define BSP_MVME3100_FLASH_CSR_MAP_SEL          (1<<4)
194
195/* Phy interrupt detect */
196#define BSP_MVME3100_IRQ_DETECT_REG             ((volatile uint8_t *)0xe2000007)
197
198/* Atomically set bits in a sys-register; The bits set in 'mask'
199 * are set in the register others; are left unmodified.
200 *
201 * RETURNS: old state.
202 *
203 * NOTE   : since BSP_setSysReg( reg, 0 ) does not make
204 *          any changes this call may be used
205 *          to read the current status w/o modifying it.
206 */
207uint8_t
208BSP_setSysReg(volatile uint8_t *r, uint8_t mask);
209
210/* Atomically clear bits in a sys-register; The bits set in 'mask'
211 * are cleared in the register; others are left unmodified.
212 *
213 * RETURNS: old state.
214 *
215 * NOTE   : since BSP_clrSysReg( reg, 0 ) does not make
216 *          any changes this call may be used
217 *          to read the current status w/o modifying it.
218 */
219
220uint8_t
221BSP_clrSysReg(volatile uint8_t *r, uint8_t mask);
222
223/* Convenience wrappers around BSP_setSysReg()/BSP_clrSysReg() */
224
225/* Set write-protection for all EEPROM devices
226 * RETURNS: old status
227 */
228uint8_t
229BSP_eeprom_write_protect();
230
231/* Disengage write-protection for all EEPROM devices
232 * RETURNS: old status
233 */
234uint8_t
235BSP_eeprom_write_enable();
236
237/* Set LEDs that have their bit set in the mask
238 *
239 * RETURNS: old status.
240 *
241 * NOTE   : since BSP_setLEDs( 0 ) does not make
242 *          any changes this call may be used
243 *          to read the current status w/o modifying it.
244 */
245uint8_t
246BSP_setLEDs(uint8_t mask);
247
248/* Clear LEDs that have their bit set in the mask
249 *
250 * RETURNS: old status
251 *
252 * NOTE:  : see above (BSP_setLEDs)
253 */
254uint8_t
255BSP_clrLEDs(uint8_t mask);
256
257#if 0
258#define outport_byte(port,value) outb(value,port)
259#define outport_word(port,value) outw(value,port)
260#define outport_long(port,value) outl(value,port)
261
262#define inport_byte(port,value) (value = inb(port))
263#define inport_word(port,value) (value = inw(port))
264#define inport_long(port,value) (value = inl(port))
265#endif
266
267/*
268 * Total memory using RESIDUAL DATA
269 */
270extern unsigned int BSP_mem_size;
271/*
272 * PCI Bus Frequency
273 */
274extern unsigned int BSP_bus_frequency;
275/*
276 * processor clock frequency
277 */
278extern unsigned int BSP_processor_frequency;
279/*
280 * Time base divisior (how many tick for 1 second).
281 */
282extern unsigned int BSP_time_base_divisor;
283/*
284 * The commandline as passed from the bootloader.
285 */
286extern char *BSP_commandline_string;
287
288#define BSP_Convert_decrementer( _value ) \
289  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
290
291extern rtems_configuration_table  BSP_Configuration;
292extern void BSP_panic(char *s);
293/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
294extern int BSP_disconnect_clock_handler (void);
295extern int BSP_connect_clock_handler (void);
296
297/* clear hostbridge errors
298 *
299 * NOTE: The routine returns always (-1) if 'enableMCP==1'
300 *       [semantics needed by libbspExt] if the MCP input is not wired.
301 *       It returns and clears the error bits of the PCI status register.
302 *       MCP support is disabled because:
303 *         a) the 2100 has no raven chip
304 *         b) the raven (2300) would raise machine check interrupts
305 *            on PCI config space access to empty slots.
306 */
307extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
308extern void BSP_motload_pci_fixup();
309
310struct rtems_bsdnet_ifconfig;
311
312int
313rtems_tsec_attach(struct rtems_bsdnet_ifconfig *ifcfg, int attaching);
314
315#define RTEMS_BSP_NETWORK_DRIVER_NAME   "tse1"
316#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach
317
318#ifdef __cplusplus
319}
320#endif
321
322#endif
Note: See TracBrowser for help on using the repository browser.