source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ fb19f111

4.104.114.84.95
Last change on this file since fb19f111 was fb19f111, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 17, 2002 at 1:30:41 PM

2002-04-16 Ralf Corsepius <corsepiu@…>

  • startup/bspstart.c: Include <libcpu/cpuIdent.h>, <rtems/bspIo.h>.
  • Property mode set to 100644
File size: 8.4 KB
Line 
1/*  bsp_start()
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
9 *
10 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
11 *  Surrey Satellite Technology Limited, 2001
12 *  A 40MHz system clock is assumed.
13 *  The PON. RST.CONF. Dip switches (DS1) are
14 *  1 - Off
15 *  2 - On
16 *  3 - Off
17 *  4 - On
18 *  5 - Off
19 *  6 - Off
20 *  7 - Off
21 *  8 - Off
22 *  Dip switches on DS2 and DS3 are all set to ON
23 *  The LEDs on the board are used to signal panic and fatal_error
24 *  conditions.
25 *  The mmu is unused at this time.
26 *
27 *
28 *  COPYRIGHT (c) 1989-1999.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.OARcorp.com/rtems/license.html.
34 *
35 *  $Id$
36 */
37
38#include <bsp.h>
39
40/*
41#include <mmu.h>
42*/
43
44#include <mpc8260.h>
45#include <rtems/libio.h>
46#include <rtems/libcsupport.h>
47#include <rtems/score/thread.h>
48#include <rtems/bspIo.h>
49#include <libcpu/cpuIdent.h>
50
51#include <string.h>
52
53#ifdef STACK_CHECKER_ON
54#include <stackchk.h>
55#endif
56
57
58
59/*
60 *  The original table from the application (in ROM) and our copy of it with
61 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
62 *  our configuration tables are uninitialized so that they get allocated in
63 *  the .bss section (RAM).
64 */
65extern rtems_configuration_table Configuration;
66extern unsigned long intrStackPtr;
67rtems_configuration_table  BSP_Configuration;
68
69rtems_cpu_table Cpu_table;
70
71char *rtems_progname;
72
73
74/*
75 *  Use the shared implementations of the following routines.
76 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
77 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
78 */
79void bsp_postdriver_hook(void);
80void bsp_libc_init( void *, unsigned32, int );
81
82
83void BSP_panic(char *s)
84{
85  _BSP_GPLED1_on();
86  printk("%s PANIC %s\n",_RTEMS_version, s);
87  __asm__ __volatile ("sc");
88}
89
90void _BSP_Fatal_error(unsigned int v)
91{
92  _BSP_GPLED0_on();
93  _BSP_GPLED1_on();
94  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
95  __asm__ __volatile ("sc");
96}
97
98void _BSP_GPLED0_on()
99{
100  BCSR *csr;
101  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
102  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
103}
104
105void _BSP_GPLED0_off()
106{
107  BCSR *csr;
108  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
109  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
110}
111
112void _BSP_GPLED1_on()
113{
114  BCSR *csr;
115  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
116  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
117}
118
119void _BSP_GPLED1_off()
120{
121  BCSR *csr;
122  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
123  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
124}
125
126void _BSP_Uart1_enable()
127{
128  BCSR *csr;
129  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
130  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
131}
132
133void _BSP_Uart1_disable()
134{
135  BCSR *csr;
136  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
137  csr->bcsr1 |=  UART1_E;               /* Disable Uart1 */
138}
139
140void _BSP_Uart2_enable()
141{
142  BCSR *csr;
143  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
144  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
145}
146
147void _BSP_Uart2_disable()
148{
149  BCSR *csr;
150  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
151  csr->bcsr1 |=  UART2_E;               /* Disable Uart2 */
152
153}
154
155
156
157
158
159
160extern void m8260_console_reserve_resources(rtems_configuration_table *);
161
162
163/*
164 *  Function:   bsp_pretasking_hook
165 *  Created:    95/03/10
166 *
167 *  Description:
168 *      BSP pretasking hook.  Called just before drivers are initialized.
169 *      Used to setup libc and install any BSP extensions.
170 *
171 *  NOTES:
172 *      Must not use libc (to do io) from here, since drivers are
173 *      not yet initialized.
174 *
175 */
176 
177void
178bsp_pretasking_hook(void)
179{
180  /*
181   *  These are assigned addresses in the linkcmds file for the BSP. This
182   *  approach is better than having these defined as manifest constants and
183   *  compiled into the kernel, but it is still not ideal when dealing with
184   *  multiprocessor configuration in which each board as a different memory
185   *  map. A better place for defining these symbols might be the makefiles.
186   *  Consideration should also be given to developing an approach in which
187   *  the kernel and the application can be linked and burned into ROM
188   *  independently of each other.
189   */
190    extern unsigned char _HeapStart;
191    extern unsigned char _HeapEnd;
192
193    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
194
195
196 
197#ifdef STACK_CHECKER_ON
198  /*
199   *  Initialize the stack bounds checker
200   *  We can either turn it on here or from the app.
201   */
202 
203  Stack_check_Initialize();
204#endif
205 
206#ifdef RTEMS_DEBUG
207  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
208#endif
209}
210
211
212void bsp_start(void)
213{
214  extern void *_WorkspaceBase;
215  extern int _end;
216  rtems_unsigned32  heap_start;
217  rtems_unsigned32  ws_start;
218  ppc_cpu_id_t myCpu;
219  ppc_cpu_revision_t myCpuRevision;
220  register unsigned char* intrStack;
221  register unsigned int intrNestingLevel = 0;
222
223
224  /* Set MPC8260ADS board LEDS and Uart enable lines */
225  _BSP_GPLED0_off();
226  _BSP_GPLED1_off();
227  _BSP_Uart1_enable();
228  _BSP_Uart2_enable();
229
230
231  /*
232   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
233   * store the result in global variables so that it can be used latter...
234   */
235  myCpu         = get_ppc_cpu_type();
236  myCpuRevision = get_ppc_cpu_revision();
237
238
239
240  cpu_init();
241
242/*
243  mmu_init();
244*/
245  /*
246   * Initialize some SPRG registers related to irq handling
247   */
248
249  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
250  asm volatile ("mtspr  273, %0" : "=r" (intrStack) : "0" (intrStack));
251  asm volatile ("mtspr  272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
252
253/*
254  printk( "About to call initialize_exceptions\n" );
255*/
256   /*
257    * Install our own set of exception vectors
258    */
259
260   initialize_exceptions();
261
262/*
263  mmu_init();
264*/
265 
266  /*
267   * Enable instruction and data caches. Do not force writethrough mode.
268   */
269#if INSTRUCTION_CACHE_ENABLE
270  rtems_cache_enable_instruction();
271#endif
272#if DATA_CACHE_ENABLE
273  rtems_cache_enable_data();
274#endif
275
276  /*
277   *  Allocate the memory for the RTEMS Work Space.  This can come from
278   *  a variety of places: hard coded address, malloc'ed from outside
279   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
280   *  typically done by stock BSPs) by subtracting the required amount
281   *  of work space from the last physical address on the CPU board.
282   */
283
284  /*
285   *  Need to "allocate" the memory for the RTEMS Workspace and
286   *  tell the RTEMS configuration where it is.  This memory is
287   *  not malloc'ed.  It is just "pulled from the air".
288   */
289
290  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
291
292
293/*
294  BSP_Configuration.microseconds_per_tick  = 1000;
295*/
296
297  /*
298   *  initialize the CPU table for this BSP
299   */
300
301  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
302  Cpu_table.postdriver_hook = bsp_postdriver_hook;
303  if( Cpu_table.interrupt_stack_size < 4*1024 )
304    Cpu_table.interrupt_stack_size   = 4 * 1024;
305
306  Cpu_table.clicks_per_usec        = 10;  /* for 40MHz extclk */
307  Cpu_table.serial_per_sec         = 40000000;
308  Cpu_table.serial_external_clock  = 0;
309  Cpu_table.serial_xon_xoff        = 0;
310  Cpu_table.serial_cts_rts         = 0;
311  Cpu_table.serial_rate            = 9600;
312  Cpu_table.timer_average_overhead = 3;
313  Cpu_table.timer_least_valid      = 3;
314  Cpu_table.clock_speed            = 40000000;
315
316
317
318
319#ifdef REV_0_2
320  /* set up some board specific registers */
321  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
322  m8260.siumcr |= 0x08000000;
323#endif
324
325  /* use BRG1 to generate 32kHz timebase */
326/*
327  m8260.brgc1 = M8260_BRG_EN + (unsigned32)(((unsigned16)((40016384)/(32768)) - 1) << 1) + 0;
328*/
329
330
331  /*
332   * Initalize RTEMS IRQ system
333   */
334  BSP_rtems_irq_mng_init(0);
335
336
337  /*
338   * Call this in case we use TERMIOS for console I/O
339   */
340
341  m8xx_uart_reserve_resources(&BSP_Configuration);
342
343/*
344  rtems_termios_initialize();
345*/
346#ifdef SHOW_MORE_INIT_SETTINGS
347  printk("Exit from bspstart\n");
348#endif
349
350}
351
352/*
353 *
354 *  _Thread_Idle_body
355 *
356 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
357 *  The MSR[POW] bit is set to put the CPU into the low power mode
358 *  defined in HID0.  HID0 is set during starup in start.S.
359 *
360 */
361Thread _Thread_Idle_body(
362  unsigned32 ignored )
363{
364
365  for( ; ; )
366  {
367    asm volatile(
368      "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
369    );
370  }
371}
372
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