source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ f3a51d62

5
Last change on this file since f3a51d62 was f3a51d62, checked in by Sebastian Huber <sebastian.huber@…>, on 03/21/18 at 07:11:33

bsps/powerpc: Remove bsp_timer_internal_clock

The only consumer of this variable was the ppc403 clock driver used by
the

  • haleakala,
  • virtex, and
  • virtex4

BSPs which set bsp_timer_internal_clock unconditionally to true.

Update #3285.

  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
7 *
8 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
9 *  Surrey Satellite Technology Limited, 2001
10 *  A 40MHz system clock is assumed.
11 *  The PON. RST.CONF. Dip switches (DS1) are
12 *  1 - Off
13 *  2 - On
14 *  3 - Off
15 *  4 - On
16 *  5 - Off
17 *  6 - Off
18 *  7 - Off
19 *  8 - Off
20 *  Dip switches on DS2 and DS3 are all set to ON
21 *  The LEDs on the board are used to signal panic and fatal_error
22 *  conditions.
23 *  The mmu is unused at this time.
24 *
25 *  COPYRIGHT (c) 1989-2007.
26 *  On-Line Applications Research Corporation (OAR).
27 *
28 *  The license and distribution terms for this file may be
29 *  found in the file LICENSE in this distribution or at
30 *  http://www.rtems.org/license/LICENSE.
31 */
32
33#include <bsp.h>
34#include <bsp/bootcard.h>
35
36/*
37#include <mmu.h>
38*/
39
40#include <mpc8260.h>
41#include <rtems/score/thread.h>
42#include <rtems/powerpc/powerpc.h>
43
44#include <rtems/bspIo.h>
45#include <rtems/counter.h>
46#include <bsp/irq.h>
47#include <libcpu/cpuIdent.h>
48#include <libcpu/spr.h>
49
50#include <string.h>
51
52#define UART1_E 0x02000002              /* bit 6 of BCSR1 */
53#define UART2_E 0x01000001              /* bit 7 of BCSR1 */
54
55#define GP0_LED 0x02000002    /*  bit 6 of BCSR0 */
56#define GP1_LED 0x01000001    /*  bit 7 of BCSR0 */
57
58SPR_RW(SPRG1)
59
60/*
61 *  Driver configuration parameters
62 */
63uint32_t   bsp_clock_speed;
64uint32_t   bsp_time_base_frequency;
65uint32_t   bsp_clicks_per_usec;
66uint32_t   bsp_serial_per_sec;         /* Serial clocks per second */
67bool       bsp_serial_external_clock;
68bool       bsp_serial_xon_xoff;
69bool       bsp_serial_cts_rts;
70uint32_t   bsp_serial_rate;
71uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
72uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
73
74extern char IntrStack_start [];
75extern char intrStack [];
76
77static void _BSP_GPLED0_on(void)
78{
79  BCSR *csr;
80  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
81  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
82}
83
84static void _BSP_GPLED0_off(void)
85{
86  BCSR *csr;
87  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
88  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
89}
90
91static void _BSP_GPLED1_on(void)
92{
93  BCSR *csr;
94  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
95  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
96}
97
98static void _BSP_GPLED1_off(void)
99{
100  BCSR *csr;
101  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
102  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
103}
104
105static void _BSP_Uart1_enable(void)
106{
107  BCSR *csr;
108  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
109  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
110}
111
112static void _BSP_Uart2_enable(void)
113{
114  BCSR *csr;
115  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
116  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
117}
118
119void bsp_start(void)
120{
121  /* Set MPC8260ADS board LEDS and Uart enable lines */
122  _BSP_GPLED0_off();
123  _BSP_GPLED1_off();
124  _BSP_Uart1_enable();
125  _BSP_Uart2_enable();
126
127  /*
128   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
129   * function stores the result in global variables so that it can be used
130   * later...
131   */
132  get_ppc_cpu_type();
133  get_ppc_cpu_revision();
134
135  cpu_init();
136
137/*
138  mmu_init();
139*/
140
141  /* Initialize exception handler */
142  /* FIXME: Interrupt stack begin and size */
143  ppc_exc_initialize(
144    (uintptr_t) IntrStack_start,
145    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
146  );
147
148  /* Initalize interrupt support */
149  bsp_interrupt_initialize();
150
151/*
152  mmu_init();
153*/
154
155  /*
156   * Enable instruction and data caches. Do not force writethrough mode.
157   */
158#if BSP_INSTRUCTION_CACHE_ENABLED
159  rtems_cache_enable_instruction();
160#endif
161#if BSP_DATA_CACHE_ENABLED
162  rtems_cache_enable_data();
163#endif
164
165  /*
166   *  initialize the device driver parameters
167   */
168  bsp_time_base_frequency    = 10000000;
169  bsp_clicks_per_usec        = 10;  /* for 40MHz extclk */
170  bsp_serial_per_sec         = 40000000;
171  bsp_serial_external_clock  = 0;
172  bsp_serial_xon_xoff        = 0;
173  bsp_serial_cts_rts         = 0;
174  bsp_serial_rate            = 9600;
175  bsp_timer_average_overhead = 3;
176  bsp_timer_least_valid    = 3;
177  bsp_clock_speed          = 40000000;
178  rtems_counter_initialize_converter(bsp_clock_speed);
179
180#ifdef REV_0_2
181  /* set up some board specific registers */
182  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
183  m8260.siumcr |= 0x08000000;
184#endif
185
186  /* use BRG1 to generate 32kHz timebase */
187/*
188  m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
189*/
190
191#ifdef SHOW_MORE_INIT_SETTINGS
192  printk("Exit from bspstart\n");
193#endif
194
195}
Note: See TracBrowser for help on using the repository browser.