source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ 89fcd5ca

4.104.114.84.95
Last change on this file since 89fcd5ca was 89fcd5ca, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 1, 2002 at 10:55:52 PM

2002-11-01 Joel Sherrill <joel@…>

  • irq/irq.c, irq/irq_asm.S, startup/bspstart.c: Fixed typos and removed warnings.
  • Property mode set to 100644
File size: 8.5 KB
Line 
1/*  bsp_start()
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
9 *
10 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
11 *  Surrey Satellite Technology Limited, 2001
12 *  A 40MHz system clock is assumed.
13 *  The PON. RST.CONF. Dip switches (DS1) are
14 *  1 - Off
15 *  2 - On
16 *  3 - Off
17 *  4 - On
18 *  5 - Off
19 *  6 - Off
20 *  7 - Off
21 *  8 - Off
22 *  Dip switches on DS2 and DS3 are all set to ON
23 *  The LEDs on the board are used to signal panic and fatal_error
24 *  conditions.
25 *  The mmu is unused at this time.
26 *
27 *
28 *  COPYRIGHT (c) 1989-1999.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.OARcorp.com/rtems/license.html.
34 *
35 *  $Id$
36 */
37
38#include <bsp.h>
39
40/*
41#include <mmu.h>
42*/
43
44#include <mpc8260.h>
45#include <rtems/libio.h>
46#include <rtems/libcsupport.h>
47#include <rtems/score/thread.h>
48#include <rtems/bspIo.h>
49#include <libcpu/cpuIdent.h>
50
51#include <string.h>
52
53#ifdef STACK_CHECKER_ON
54#include <stackchk.h>
55#endif
56
57
58
59/*
60 *  The original table from the application (in ROM) and our copy of it with
61 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
62 *  our configuration tables are uninitialized so that they get allocated in
63 *  the .bss section (RAM).
64 */
65extern rtems_configuration_table Configuration;
66extern unsigned long intrStackPtr;
67rtems_configuration_table  BSP_Configuration;
68
69rtems_cpu_table Cpu_table;
70
71char *rtems_progname;
72
73
74/*
75 *  Use the shared implementations of the following routines.
76 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
77 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
78 */
79void bsp_postdriver_hook(void);
80void bsp_libc_init( void *, unsigned32, int );
81
82void  _BSP_GPLED1_on(void);
83void  _BSP_GPLED0_on(void);
84void  cpu_init(void);
85void  initialize_exceptions(void);
86
87void BSP_panic(char *s)
88{
89  _BSP_GPLED1_on();
90  printk("%s PANIC %s\n",_RTEMS_version, s);
91  __asm__ __volatile ("sc");
92}
93
94void _BSP_Fatal_error(unsigned int v)
95{
96  _BSP_GPLED0_on();
97  _BSP_GPLED1_on();
98  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
99  __asm__ __volatile ("sc");
100}
101
102void _BSP_GPLED0_on()
103{
104  BCSR *csr;
105  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
106  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
107}
108
109void _BSP_GPLED0_off()
110{
111  BCSR *csr;
112  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
113  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
114}
115
116void _BSP_GPLED1_on()
117{
118  BCSR *csr;
119  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
120  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
121}
122
123void _BSP_GPLED1_off()
124{
125  BCSR *csr;
126  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
127  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
128}
129
130void _BSP_Uart1_enable()
131{
132  BCSR *csr;
133  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
134  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
135}
136
137void _BSP_Uart1_disable()
138{
139  BCSR *csr;
140  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
141  csr->bcsr1 |=  UART1_E;               /* Disable Uart1 */
142}
143
144void _BSP_Uart2_enable()
145{
146  BCSR *csr;
147  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
148  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
149}
150
151void _BSP_Uart2_disable()
152{
153  BCSR *csr;
154  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
155  csr->bcsr1 |=  UART2_E;               /* Disable Uart2 */
156
157}
158
159
160
161
162
163
164extern void m8260_console_reserve_resources(rtems_configuration_table *);
165
166
167/*
168 *  Function:   bsp_pretasking_hook
169 *  Created:    95/03/10
170 *
171 *  Description:
172 *      BSP pretasking hook.  Called just before drivers are initialized.
173 *      Used to setup libc and install any BSP extensions.
174 *
175 *  NOTES:
176 *      Must not use libc (to do io) from here, since drivers are
177 *      not yet initialized.
178 *
179 */
180 
181void
182bsp_pretasking_hook(void)
183{
184  /*
185   *  These are assigned addresses in the linkcmds file for the BSP. This
186   *  approach is better than having these defined as manifest constants and
187   *  compiled into the kernel, but it is still not ideal when dealing with
188   *  multiprocessor configuration in which each board as a different memory
189   *  map. A better place for defining these symbols might be the makefiles.
190   *  Consideration should also be given to developing an approach in which
191   *  the kernel and the application can be linked and burned into ROM
192   *  independently of each other.
193   */
194    extern unsigned char _HeapStart;
195    extern unsigned char _HeapEnd;
196
197    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
198
199
200 
201#ifdef STACK_CHECKER_ON
202  /*
203   *  Initialize the stack bounds checker
204   *  We can either turn it on here or from the app.
205   */
206 
207  Stack_check_Initialize();
208#endif
209 
210#ifdef RTEMS_DEBUG
211  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
212#endif
213}
214
215
216void bsp_start(void)
217{
218  extern void *_WorkspaceBase;
219  ppc_cpu_id_t myCpu;
220  ppc_cpu_revision_t myCpuRevision;
221  register unsigned char* intrStack;
222  register unsigned int intrNestingLevel = 0;
223
224
225  /* Set MPC8260ADS board LEDS and Uart enable lines */
226  _BSP_GPLED0_off();
227  _BSP_GPLED1_off();
228  _BSP_Uart1_enable();
229  _BSP_Uart2_enable();
230
231
232  /*
233   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
234   * store the result in global variables so that it can be used latter...
235   */
236  myCpu         = get_ppc_cpu_type();
237  myCpuRevision = get_ppc_cpu_revision();
238
239
240
241  cpu_init();
242
243/*
244  mmu_init();
245*/
246  /*
247   * Initialize some SPRG registers related to irq handling
248   */
249
250  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
251  asm volatile ("mtspr  273, %0" : "=r" (intrStack) : "0" (intrStack));
252  asm volatile ("mtspr  272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel));
253
254/*
255  printk( "About to call initialize_exceptions\n" );
256*/
257   /*
258    * Install our own set of exception vectors
259    */
260
261   initialize_exceptions();
262
263/*
264  mmu_init();
265*/
266 
267  /*
268   * Enable instruction and data caches. Do not force writethrough mode.
269   */
270#if INSTRUCTION_CACHE_ENABLE
271  rtems_cache_enable_instruction();
272#endif
273#if DATA_CACHE_ENABLE
274  rtems_cache_enable_data();
275#endif
276
277  /*
278   *  Allocate the memory for the RTEMS Work Space.  This can come from
279   *  a variety of places: hard coded address, malloc'ed from outside
280   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
281   *  typically done by stock BSPs) by subtracting the required amount
282   *  of work space from the last physical address on the CPU board.
283   */
284
285  /*
286   *  Need to "allocate" the memory for the RTEMS Workspace and
287   *  tell the RTEMS configuration where it is.  This memory is
288   *  not malloc'ed.  It is just "pulled from the air".
289   */
290
291  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
292
293
294/*
295  BSP_Configuration.microseconds_per_tick  = 1000;
296*/
297
298  /*
299   *  initialize the CPU table for this BSP
300   */
301
302  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
303  Cpu_table.postdriver_hook = bsp_postdriver_hook;
304  if( Cpu_table.interrupt_stack_size < 4*1024 )
305    Cpu_table.interrupt_stack_size   = 4 * 1024;
306
307  Cpu_table.clicks_per_usec        = 10;  /* for 40MHz extclk */
308  Cpu_table.serial_per_sec         = 40000000;
309  Cpu_table.serial_external_clock  = 0;
310  Cpu_table.serial_xon_xoff        = 0;
311  Cpu_table.serial_cts_rts         = 0;
312  Cpu_table.serial_rate            = 9600;
313  Cpu_table.timer_average_overhead = 3;
314  Cpu_table.timer_least_valid      = 3;
315  Cpu_table.clock_speed            = 40000000;
316
317
318
319
320#ifdef REV_0_2
321  /* set up some board specific registers */
322  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
323  m8260.siumcr |= 0x08000000;
324#endif
325
326  /* use BRG1 to generate 32kHz timebase */
327/*
328  m8260.brgc1 = M8260_BRG_EN + (unsigned32)(((unsigned16)((40016384)/(32768)) - 1) << 1) + 0;
329*/
330
331
332  /*
333   * Initalize RTEMS IRQ system
334   */
335  BSP_rtems_irq_mng_init(0);
336
337
338  /*
339   * Call this in case we use TERMIOS for console I/O
340   */
341
342  m8xx_uart_reserve_resources(&BSP_Configuration);
343
344/*
345  rtems_termios_initialize();
346*/
347#ifdef SHOW_MORE_INIT_SETTINGS
348  printk("Exit from bspstart\n");
349#endif
350
351}
352
353/*
354 *
355 *  _Thread_Idle_body
356 *
357 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
358 *  The MSR[POW] bit is set to put the CPU into the low power mode
359 *  defined in HID0.  HID0 is set during starup in start.S.
360 *
361 */
362Thread _Thread_Idle_body(
363  unsigned32 ignored )
364{
365
366  for( ; ; )
367  {
368    asm volatile(
369      "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
370    );
371  }
372
373  return 0; /* to remove warning */
374}
375
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