source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ 2d0bc83

Last change on this file since 2d0bc83 was bb22a3f3, checked in by Sebastian Huber <sebastian.huber@…>, on Mar 21, 2018 at 5:27:24 AM

bsp/powerpc: Move libcpu timer to bsps

Use only one timer driver variant based on the standard PowerPC time
base.

This patch is a part of the BSP source reorganization.

Update #3285.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
6 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
7 *
8 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
9 *  Surrey Satellite Technology Limited, 2001
10 *  A 40MHz system clock is assumed.
11 *  The PON. RST.CONF. Dip switches (DS1) are
12 *  1 - Off
13 *  2 - On
14 *  3 - Off
15 *  4 - On
16 *  5 - Off
17 *  6 - Off
18 *  7 - Off
19 *  8 - Off
20 *  Dip switches on DS2 and DS3 are all set to ON
21 *  The LEDs on the board are used to signal panic and fatal_error
22 *  conditions.
23 *  The mmu is unused at this time.
24 *
25 *  COPYRIGHT (c) 1989-2007.
26 *  On-Line Applications Research Corporation (OAR).
27 *
28 *  The license and distribution terms for this file may be
29 *  found in the file LICENSE in this distribution or at
30 *  http://www.rtems.org/license/LICENSE.
31 */
32
33#include <bsp.h>
34#include <bsp/bootcard.h>
35
36/*
37#include <mmu.h>
38*/
39
40#include <mpc8260.h>
41#include <rtems/score/thread.h>
42#include <rtems/powerpc/powerpc.h>
43
44#include <rtems/bspIo.h>
45#include <rtems/counter.h>
46#include <bsp/irq.h>
47#include <libcpu/cpuIdent.h>
48#include <libcpu/spr.h>
49
50#include <string.h>
51
52#define UART1_E 0x02000002              /* bit 6 of BCSR1 */
53#define UART2_E 0x01000001              /* bit 7 of BCSR1 */
54
55#define GP0_LED 0x02000002    /*  bit 6 of BCSR0 */
56#define GP1_LED 0x01000001    /*  bit 7 of BCSR0 */
57
58SPR_RW(SPRG1)
59
60/*
61 *  Driver configuration parameters
62 */
63uint32_t   bsp_clock_speed;
64uint32_t   bsp_time_base_frequency;
65uint32_t   bsp_clicks_per_usec;
66uint32_t   bsp_serial_per_sec;         /* Serial clocks per second */
67bool       bsp_serial_external_clock;
68bool       bsp_serial_xon_xoff;
69bool       bsp_serial_cts_rts;
70uint32_t   bsp_serial_rate;
71
72extern char IntrStack_start [];
73extern char intrStack [];
74
75static void _BSP_GPLED0_on(void)
76{
77  BCSR *csr;
78  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
79  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
80}
81
82static void _BSP_GPLED0_off(void)
83{
84  BCSR *csr;
85  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
86  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
87}
88
89static void _BSP_GPLED1_on(void)
90{
91  BCSR *csr;
92  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
93  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
94}
95
96static void _BSP_GPLED1_off(void)
97{
98  BCSR *csr;
99  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
100  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
101}
102
103static void _BSP_Uart1_enable(void)
104{
105  BCSR *csr;
106  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
107  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
108}
109
110static void _BSP_Uart2_enable(void)
111{
112  BCSR *csr;
113  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
114  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
115}
116
117void bsp_start(void)
118{
119  /* Set MPC8260ADS board LEDS and Uart enable lines */
120  _BSP_GPLED0_off();
121  _BSP_GPLED1_off();
122  _BSP_Uart1_enable();
123  _BSP_Uart2_enable();
124
125  /*
126   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
127   * function stores the result in global variables so that it can be used
128   * later...
129   */
130  get_ppc_cpu_type();
131  get_ppc_cpu_revision();
132
133  cpu_init();
134
135/*
136  mmu_init();
137*/
138
139  /* Initialize exception handler */
140  /* FIXME: Interrupt stack begin and size */
141  ppc_exc_initialize(
142    (uintptr_t) IntrStack_start,
143    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
144  );
145
146  /* Initalize interrupt support */
147  bsp_interrupt_initialize();
148
149/*
150  mmu_init();
151*/
152
153  /*
154   * Enable instruction and data caches. Do not force writethrough mode.
155   */
156#if BSP_INSTRUCTION_CACHE_ENABLED
157  rtems_cache_enable_instruction();
158#endif
159#if BSP_DATA_CACHE_ENABLED
160  rtems_cache_enable_data();
161#endif
162
163  /*
164   *  initialize the device driver parameters
165   */
166  bsp_time_base_frequency    = 10000000;
167  bsp_clicks_per_usec        = 10;  /* for 40MHz extclk */
168  bsp_serial_per_sec         = 40000000;
169  bsp_serial_external_clock  = 0;
170  bsp_serial_xon_xoff        = 0;
171  bsp_serial_cts_rts         = 0;
172  bsp_serial_rate            = 9600;
173  bsp_clock_speed          = 40000000;
174  rtems_counter_initialize_converter(bsp_clock_speed);
175
176#ifdef REV_0_2
177  /* set up some board specific registers */
178  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
179  m8260.siumcr |= 0x08000000;
180#endif
181
182  /* use BRG1 to generate 32kHz timebase */
183/*
184  m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
185*/
186
187#ifdef SHOW_MORE_INIT_SETTINGS
188  printk("Exit from bspstart\n");
189#endif
190
191}
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