source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ 2a832d8

4.104.114.84.95
Last change on this file since 2a832d8 was 2a832d8, checked in by Ralf Corsepius <ralf.corsepius@…>, on Mar 31, 2004 at 3:47:26 AM

2004-03-31 Ralf Corsepius <ralf_corsepius@…>

  • console/console.c, include/bsp.h, irq/irq.c, network/network.c, startup/bspstart.c: Convert to using c99 fixed size types.
  • Property mode set to 100644
File size: 8.5 KB
Line 
1/*  bsp_start()
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
9 *
10 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
11 *  Surrey Satellite Technology Limited, 2001
12 *  A 40MHz system clock is assumed.
13 *  The PON. RST.CONF. Dip switches (DS1) are
14 *  1 - Off
15 *  2 - On
16 *  3 - Off
17 *  4 - On
18 *  5 - Off
19 *  6 - Off
20 *  7 - Off
21 *  8 - Off
22 *  Dip switches on DS2 and DS3 are all set to ON
23 *  The LEDs on the board are used to signal panic and fatal_error
24 *  conditions.
25 *  The mmu is unused at this time.
26 *
27 *
28 *  COPYRIGHT (c) 1989-1999.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  $Id$
36 */
37
38#include <bsp.h>
39
40/*
41#include <mmu.h>
42*/
43
44#include <mpc8260.h>
45#include <rtems/libio.h>
46#include <rtems/libcsupport.h>
47#include <rtems/score/thread.h>
48#include <rtems/bspIo.h>
49#include <libcpu/cpuIdent.h>
50#include <libcpu/spr.h>
51
52#include <string.h>
53
54#ifdef STACK_CHECKER_ON
55#include <stackchk.h>
56#endif
57
58
59SPR_RW(SPRG0)
60SPR_RW(SPRG1)
61
62/*
63 *  The original table from the application (in ROM) and our copy of it with
64 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
65 *  our configuration tables are uninitialized so that they get allocated in
66 *  the .bss section (RAM).
67 */
68extern rtems_configuration_table Configuration;
69extern unsigned long intrStackPtr;
70rtems_configuration_table  BSP_Configuration;
71
72rtems_cpu_table Cpu_table;
73
74char *rtems_progname;
75
76
77/*
78 *  Use the shared implementations of the following routines.
79 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
80 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
81 */
82void bsp_postdriver_hook(void);
83void bsp_libc_init( void *, uint32_t, int );
84
85void  _BSP_GPLED1_on(void);
86void  _BSP_GPLED0_on(void);
87void  cpu_init(void);
88void  initialize_exceptions(void);
89
90void BSP_panic(char *s)
91{
92  _BSP_GPLED1_on();
93  printk("%s PANIC %s\n",_RTEMS_version, s);
94  __asm__ __volatile ("sc");
95}
96
97void _BSP_Fatal_error(unsigned int v)
98{
99  _BSP_GPLED0_on();
100  _BSP_GPLED1_on();
101  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
102  __asm__ __volatile ("sc");
103}
104
105void _BSP_GPLED0_on()
106{
107  BCSR *csr;
108  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
109  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
110}
111
112void _BSP_GPLED0_off()
113{
114  BCSR *csr;
115  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
116  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
117}
118
119void _BSP_GPLED1_on()
120{
121  BCSR *csr;
122  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
123  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
124}
125
126void _BSP_GPLED1_off()
127{
128  BCSR *csr;
129  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
130  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
131}
132
133void _BSP_Uart1_enable()
134{
135  BCSR *csr;
136  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
137  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
138}
139
140void _BSP_Uart1_disable()
141{
142  BCSR *csr;
143  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
144  csr->bcsr1 |=  UART1_E;               /* Disable Uart1 */
145}
146
147void _BSP_Uart2_enable()
148{
149  BCSR *csr;
150  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
151  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
152}
153
154void _BSP_Uart2_disable()
155{
156  BCSR *csr;
157  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
158  csr->bcsr1 |=  UART2_E;               /* Disable Uart2 */
159
160}
161
162
163
164
165
166
167extern void m8260_console_reserve_resources(rtems_configuration_table *);
168
169
170/*
171 *  Function:   bsp_pretasking_hook
172 *  Created:    95/03/10
173 *
174 *  Description:
175 *      BSP pretasking hook.  Called just before drivers are initialized.
176 *      Used to setup libc and install any BSP extensions.
177 *
178 *  NOTES:
179 *      Must not use libc (to do io) from here, since drivers are
180 *      not yet initialized.
181 *
182 */
183 
184void
185bsp_pretasking_hook(void)
186{
187  /*
188   *  These are assigned addresses in the linkcmds file for the BSP. This
189   *  approach is better than having these defined as manifest constants and
190   *  compiled into the kernel, but it is still not ideal when dealing with
191   *  multiprocessor configuration in which each board as a different memory
192   *  map. A better place for defining these symbols might be the makefiles.
193   *  Consideration should also be given to developing an approach in which
194   *  the kernel and the application can be linked and burned into ROM
195   *  independently of each other.
196   */
197    extern unsigned char _HeapStart;
198    extern unsigned char _HeapEnd;
199
200    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
201
202
203 
204#ifdef STACK_CHECKER_ON
205  /*
206   *  Initialize the stack bounds checker
207   *  We can either turn it on here or from the app.
208   */
209 
210  Stack_check_Initialize();
211#endif
212 
213#ifdef RTEMS_DEBUG
214  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
215#endif
216}
217
218
219void bsp_start(void)
220{
221  extern void *_WorkspaceBase;
222  ppc_cpu_id_t myCpu;
223  ppc_cpu_revision_t myCpuRevision;
224  register unsigned char* intrStack;
225
226
227  /* Set MPC8260ADS board LEDS and Uart enable lines */
228  _BSP_GPLED0_off();
229  _BSP_GPLED1_off();
230  _BSP_Uart1_enable();
231  _BSP_Uart2_enable();
232
233
234  /*
235   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
236   * store the result in global variables so that it can be used latter...
237   */
238  myCpu         = get_ppc_cpu_type();
239  myCpuRevision = get_ppc_cpu_revision();
240
241
242
243  cpu_init();
244
245/*
246  mmu_init();
247*/
248  /*
249   * Initialize some SPRG registers related to irq handling
250   */
251
252  intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE);
253  _write_SPRG1((unsigned int)intrStack);
254  /* signal that we have fixed PR288 - eventually, this should go away */
255  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
256
257/*
258  printk( "About to call initialize_exceptions\n" );
259*/
260   /*
261    * Install our own set of exception vectors
262    */
263
264   initialize_exceptions();
265
266/*
267  mmu_init();
268*/
269 
270  /*
271   * Enable instruction and data caches. Do not force writethrough mode.
272   */
273#if INSTRUCTION_CACHE_ENABLE
274  rtems_cache_enable_instruction();
275#endif
276#if DATA_CACHE_ENABLE
277  rtems_cache_enable_data();
278#endif
279
280  /*
281   *  Allocate the memory for the RTEMS Work Space.  This can come from
282   *  a variety of places: hard coded address, malloc'ed from outside
283   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
284   *  typically done by stock BSPs) by subtracting the required amount
285   *  of work space from the last physical address on the CPU board.
286   */
287
288  /*
289   *  Need to "allocate" the memory for the RTEMS Workspace and
290   *  tell the RTEMS configuration where it is.  This memory is
291   *  not malloc'ed.  It is just "pulled from the air".
292   */
293
294  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
295
296
297/*
298  BSP_Configuration.microseconds_per_tick  = 1000;
299*/
300
301  /*
302   *  initialize the CPU table for this BSP
303   */
304
305  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
306  Cpu_table.postdriver_hook = bsp_postdriver_hook;
307  if( Cpu_table.interrupt_stack_size < 4*1024 )
308    Cpu_table.interrupt_stack_size   = 4 * 1024;
309
310  Cpu_table.clicks_per_usec        = 10;  /* for 40MHz extclk */
311  Cpu_table.serial_per_sec         = 40000000;
312  Cpu_table.serial_external_clock  = 0;
313  Cpu_table.serial_xon_xoff        = 0;
314  Cpu_table.serial_cts_rts         = 0;
315  Cpu_table.serial_rate            = 9600;
316  Cpu_table.timer_average_overhead = 3;
317  Cpu_table.timer_least_valid      = 3;
318  Cpu_table.clock_speed            = 40000000;
319
320
321
322
323#ifdef REV_0_2
324  /* set up some board specific registers */
325  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
326  m8260.siumcr |= 0x08000000;
327#endif
328
329  /* use BRG1 to generate 32kHz timebase */
330/*
331  m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
332*/
333
334
335  /*
336   * Initalize RTEMS IRQ system
337   */
338  BSP_rtems_irq_mng_init(0);
339
340
341  /*
342   * Call this in case we use TERMIOS for console I/O
343   */
344
345  m8xx_uart_reserve_resources(&BSP_Configuration);
346
347/*
348  rtems_termios_initialize();
349*/
350#ifdef SHOW_MORE_INIT_SETTINGS
351  printk("Exit from bspstart\n");
352#endif
353
354}
355
356/*
357 *
358 *  _Thread_Idle_body
359 *
360 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
361 *  The MSR[POW] bit is set to put the CPU into the low power mode
362 *  defined in HID0.  HID0 is set during starup in start.S.
363 *
364 */
365Thread _Thread_Idle_body(
366  uint32_t   ignored )
367{
368
369  for( ; ; )
370  {
371    asm volatile(
372      "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
373    );
374  }
375
376  return 0; /* to remove warning */
377}
378
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