source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ 1899fe4

4.104.114.84.9
Last change on this file since 1899fe4 was 1899fe4, checked in by Ralf Corsepius <ralf.corsepius@…>, on Feb 17, 2005 at 4:29:15 AM

2005-02-17 Ralf Corsepius <ralf.corsepius@…>

  • startup/bspstart.c: include <rtems/powerpc/powerpc.h>. Use PPC_MINIMUM_STACK_FRAME_SIZE instead of CPU_MINIMUM_STACK_FRAME_SIZE.
  • Property mode set to 100644
File size: 8.5 KB
Line 
1/*  bsp_start()
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
9 *
10 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
11 *  Surrey Satellite Technology Limited, 2001
12 *  A 40MHz system clock is assumed.
13 *  The PON. RST.CONF. Dip switches (DS1) are
14 *  1 - Off
15 *  2 - On
16 *  3 - Off
17 *  4 - On
18 *  5 - Off
19 *  6 - Off
20 *  7 - Off
21 *  8 - Off
22 *  Dip switches on DS2 and DS3 are all set to ON
23 *  The LEDs on the board are used to signal panic and fatal_error
24 *  conditions.
25 *  The mmu is unused at this time.
26 *
27 *
28 *  COPYRIGHT (c) 1989-1999.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  $Id$
36 */
37
38#include <bsp.h>
39
40/*
41#include <mmu.h>
42*/
43
44#include <mpc8260.h>
45#include <rtems/libio.h>
46#include <rtems/libcsupport.h>
47#include <rtems/score/thread.h>
48#include <rtems/powerpc/powerpc.h>
49
50#include <rtems/bspIo.h>
51#include <libcpu/cpuIdent.h>
52#include <libcpu/spr.h>
53
54#include <string.h>
55
56#ifdef STACK_CHECKER_ON
57#include <stackchk.h>
58#endif
59
60SPR_RW(SPRG0)
61SPR_RW(SPRG1)
62
63/*
64 *  The original table from the application (in ROM) and our copy of it with
65 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
66 *  our configuration tables are uninitialized so that they get allocated in
67 *  the .bss section (RAM).
68 */
69extern rtems_configuration_table Configuration;
70extern unsigned long intrStackPtr;
71rtems_configuration_table  BSP_Configuration;
72
73rtems_cpu_table Cpu_table;
74
75char *rtems_progname;
76
77/*
78 *  Use the shared implementations of the following routines.
79 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
80 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
81 */
82void bsp_postdriver_hook(void);
83void bsp_libc_init( void *, uint32_t, int );
84
85void  _BSP_GPLED1_on(void);
86void  _BSP_GPLED0_on(void);
87void  cpu_init(void);
88void  initialize_exceptions(void);
89
90void BSP_panic(char *s)
91{
92  _BSP_GPLED1_on();
93  printk("%s PANIC %s\n",_RTEMS_version, s);
94  __asm__ __volatile ("sc");
95}
96
97void _BSP_Fatal_error(unsigned int v)
98{
99  _BSP_GPLED0_on();
100  _BSP_GPLED1_on();
101  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
102  __asm__ __volatile ("sc");
103}
104
105void _BSP_GPLED0_on()
106{
107  BCSR *csr;
108  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
109  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
110}
111
112void _BSP_GPLED0_off()
113{
114  BCSR *csr;
115  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
116  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
117}
118
119void _BSP_GPLED1_on()
120{
121  BCSR *csr;
122  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
123  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
124}
125
126void _BSP_GPLED1_off()
127{
128  BCSR *csr;
129  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
130  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
131}
132
133void _BSP_Uart1_enable()
134{
135  BCSR *csr;
136  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
137  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
138}
139
140void _BSP_Uart1_disable()
141{
142  BCSR *csr;
143  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
144  csr->bcsr1 |=  UART1_E;               /* Disable Uart1 */
145}
146
147void _BSP_Uart2_enable()
148{
149  BCSR *csr;
150  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
151  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
152}
153
154void _BSP_Uart2_disable()
155{
156  BCSR *csr;
157  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
158  csr->bcsr1 |=  UART2_E;               /* Disable Uart2 */
159
160}
161
162extern void m8260_console_reserve_resources(rtems_configuration_table *);
163
164/*
165 *  Function:   bsp_pretasking_hook
166 *  Created:    95/03/10
167 *
168 *  Description:
169 *      BSP pretasking hook.  Called just before drivers are initialized.
170 *      Used to setup libc and install any BSP extensions.
171 *
172 *  NOTES:
173 *      Must not use libc (to do io) from here, since drivers are
174 *      not yet initialized.
175 *
176 */
177
178void
179bsp_pretasking_hook(void)
180{
181  /*
182   *  These are assigned addresses in the linkcmds file for the BSP. This
183   *  approach is better than having these defined as manifest constants and
184   *  compiled into the kernel, but it is still not ideal when dealing with
185   *  multiprocessor configuration in which each board as a different memory
186   *  map. A better place for defining these symbols might be the makefiles.
187   *  Consideration should also be given to developing an approach in which
188   *  the kernel and the application can be linked and burned into ROM
189   *  independently of each other.
190   */
191    extern unsigned char _HeapStart;
192    extern unsigned char _HeapEnd;
193
194    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
195
196#ifdef STACK_CHECKER_ON
197  /*
198   *  Initialize the stack bounds checker
199   *  We can either turn it on here or from the app.
200   */
201
202  Stack_check_Initialize();
203#endif
204
205#ifdef RTEMS_DEBUG
206  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
207#endif
208}
209
210void bsp_start(void)
211{
212  extern void *_WorkspaceBase;
213  ppc_cpu_id_t myCpu;
214  ppc_cpu_revision_t myCpuRevision;
215  register unsigned char* intrStack;
216
217  /* Set MPC8260ADS board LEDS and Uart enable lines */
218  _BSP_GPLED0_off();
219  _BSP_GPLED1_off();
220  _BSP_Uart1_enable();
221  _BSP_Uart2_enable();
222
223  /*
224   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
225   * store the result in global variables so that it can be used latter...
226   */
227  myCpu         = get_ppc_cpu_type();
228  myCpuRevision = get_ppc_cpu_revision();
229
230  cpu_init();
231
232/*
233  mmu_init();
234*/
235  /*
236   * Initialize some SPRG registers related to irq handling
237   */
238
239  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
240  _write_SPRG1((unsigned int)intrStack);
241  /* signal that we have fixed PR288 - eventually, this should go away */
242  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
243
244/*
245  printk( "About to call initialize_exceptions\n" );
246*/
247   /*
248    * Install our own set of exception vectors
249    */
250
251   initialize_exceptions();
252
253/*
254  mmu_init();
255*/
256
257  /*
258   * Enable instruction and data caches. Do not force writethrough mode.
259   */
260#if INSTRUCTION_CACHE_ENABLE
261  rtems_cache_enable_instruction();
262#endif
263#if DATA_CACHE_ENABLE
264  rtems_cache_enable_data();
265#endif
266
267  /*
268   *  Allocate the memory for the RTEMS Work Space.  This can come from
269   *  a variety of places: hard coded address, malloc'ed from outside
270   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
271   *  typically done by stock BSPs) by subtracting the required amount
272   *  of work space from the last physical address on the CPU board.
273   */
274
275  /*
276   *  Need to "allocate" the memory for the RTEMS Workspace and
277   *  tell the RTEMS configuration where it is.  This memory is
278   *  not malloc'ed.  It is just "pulled from the air".
279   */
280
281  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
282
283/*
284  BSP_Configuration.microseconds_per_tick  = 1000;
285*/
286
287  /*
288   *  initialize the CPU table for this BSP
289   */
290
291  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
292  Cpu_table.postdriver_hook = bsp_postdriver_hook;
293  if( Cpu_table.interrupt_stack_size < 4*1024 )
294    Cpu_table.interrupt_stack_size   = 4 * 1024;
295
296  Cpu_table.clicks_per_usec        = 10;  /* for 40MHz extclk */
297  Cpu_table.serial_per_sec         = 40000000;
298  Cpu_table.serial_external_clock  = 0;
299  Cpu_table.serial_xon_xoff        = 0;
300  Cpu_table.serial_cts_rts         = 0;
301  Cpu_table.serial_rate            = 9600;
302  Cpu_table.timer_average_overhead = 3;
303  Cpu_table.timer_least_valid      = 3;
304  Cpu_table.clock_speed            = 40000000;
305
306#ifdef REV_0_2
307  /* set up some board specific registers */
308  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
309  m8260.siumcr |= 0x08000000;
310#endif
311
312  /* use BRG1 to generate 32kHz timebase */
313/*
314  m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
315*/
316
317  /*
318   * Initalize RTEMS IRQ system
319   */
320  BSP_rtems_irq_mng_init(0);
321
322  /*
323   * Call this in case we use TERMIOS for console I/O
324   */
325
326  m8xx_uart_reserve_resources(&BSP_Configuration);
327
328/*
329  rtems_termios_initialize();
330*/
331#ifdef SHOW_MORE_INIT_SETTINGS
332  printk("Exit from bspstart\n");
333#endif
334
335}
336
337/*
338 *
339 *  _Thread_Idle_body
340 *
341 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
342 *  The MSR[POW] bit is set to put the CPU into the low power mode
343 *  defined in HID0.  HID0 is set during starup in start.S.
344 *
345 */
346Thread _Thread_Idle_body(
347  uint32_t   ignored )
348{
349
350  for( ; ; )
351  {
352    asm volatile(
353      "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
354    );
355  }
356
357  return 0; /* to remove warning */
358}
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