source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @ 07e9642c

4.104.114.9
Last change on this file since 07e9642c was 07e9642c, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 28, 2007 at 9:44:46 PM

2007-11-28 Joel Sherrill <joel.sherrill@…>

  • startup/bspstart.c: Eliminate PowerPC specific elements from the CPU Table. They have been replaced with variables named bsp_XXX as needed.
  • Property mode set to 100644
File size: 9.0 KB
Line 
1/*  bsp_start()
2 *
3 *  This routine starts the application.  It includes application,
4 *  board, and monitor specific initialization and configuration.
5 *  The generic CPU dependent initialization has been performed
6 *  before this routine is invoked.
7 *
8 *  The MPC860 specific stuff was written by Jay Monkman (jmonkman@frasca.com)
9 *
10 *  Modified for the MPC8260ADS board by Andy Dachs <a.dachs@sstl.co.uk>
11 *  Surrey Satellite Technology Limited, 2001
12 *  A 40MHz system clock is assumed.
13 *  The PON. RST.CONF. Dip switches (DS1) are
14 *  1 - Off
15 *  2 - On
16 *  3 - Off
17 *  4 - On
18 *  5 - Off
19 *  6 - Off
20 *  7 - Off
21 *  8 - Off
22 *  Dip switches on DS2 and DS3 are all set to ON
23 *  The LEDs on the board are used to signal panic and fatal_error
24 *  conditions.
25 *  The mmu is unused at this time.
26 *
27 *
28 *  COPYRIGHT (c) 1989-2007.
29 *  On-Line Applications Research Corporation (OAR).
30 *
31 *  The license and distribution terms for this file may be
32 *  found in the file LICENSE in this distribution or at
33 *  http://www.rtems.com/license/LICENSE.
34 *
35 *  $Id$
36 */
37
38#include <bsp.h>
39
40/*
41#include <mmu.h>
42*/
43
44#include <mpc8260.h>
45#include <rtems/libio.h>
46#include <rtems/libcsupport.h>
47#include <rtems/score/thread.h>
48#include <rtems/powerpc/powerpc.h>
49
50#include <rtems/bspIo.h>
51#include <libcpu/cpuIdent.h>
52#include <libcpu/spr.h>
53
54#include <string.h>
55
56#ifdef STACK_CHECKER_ON
57#include <stackchk.h>
58#endif
59
60SPR_RW(SPRG0)
61SPR_RW(SPRG1)
62
63/*
64 *  The original table from the application (in ROM) and our copy of it with
65 *  some changes. Configuration is defined in <confdefs.h>. Make sure that
66 *  our configuration tables are uninitialized so that they get allocated in
67 *  the .bss section (RAM).
68 */
69extern rtems_configuration_table Configuration;
70extern unsigned long intrStackPtr;
71rtems_configuration_table  BSP_Configuration;
72
73rtems_cpu_table Cpu_table;
74
75char *rtems_progname;
76
77/*
78 *  Driver configuration parameters
79 */
80uint32_t   bsp_clock_speed;
81uint32_t   bsp_clicks_per_usec;
82uint32_t   bsp_serial_per_sec;         /* Serial clocks per second */
83boolean    bsp_serial_external_clock;
84boolean    bsp_serial_xon_xoff;
85boolean    bsp_serial_cts_rts;
86uint32_t   bsp_serial_rate;
87uint32_t   bsp_timer_average_overhead; /* Average overhead of timer in ticks */
88uint32_t   bsp_timer_least_valid;      /* Least valid number from timer      */
89boolean    bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
90
91/*
92 *  Use the shared implementations of the following routines.
93 *  Look in rtems/c/src/lib/libbsp/shared/bsppost.c and
94 *  rtems/c/src/lib/libbsp/shared/bsplibc.c.
95 */
96void bsp_postdriver_hook(void);
97void bsp_libc_init( void *, uint32_t, int );
98
99void  _BSP_GPLED1_on(void);
100void  _BSP_GPLED0_on(void);
101void  cpu_init(void);
102void  initialize_exceptions(void);
103
104void BSP_panic(char *s)
105{
106  _BSP_GPLED1_on();
107  printk("%s PANIC %s\n",_RTEMS_version, s);
108  __asm__ __volatile ("sc");
109}
110
111void _BSP_Fatal_error(unsigned int v)
112{
113  _BSP_GPLED0_on();
114  _BSP_GPLED1_on();
115  printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
116  __asm__ __volatile ("sc");
117}
118
119void _BSP_GPLED0_on()
120{
121  BCSR *csr;
122  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
123  csr->bcsr0 &=  ~GP0_LED;              /* Turn on GP0 LED */
124}
125
126void _BSP_GPLED0_off()
127{
128  BCSR *csr;
129  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
130  csr->bcsr0 |=  GP0_LED;               /* Turn off GP0 LED */
131}
132
133void _BSP_GPLED1_on()
134{
135  BCSR *csr;
136  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
137  csr->bcsr0 &=  ~GP1_LED;              /* Turn on GP1 LED */
138}
139
140void _BSP_GPLED1_off()
141{
142  BCSR *csr;
143  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
144  csr->bcsr0 |=  GP1_LED;               /* Turn off GP1 LED */
145}
146
147void _BSP_Uart1_enable()
148{
149  BCSR *csr;
150  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
151  csr->bcsr1 &= ~UART1_E;               /* Enable Uart1 */
152}
153
154void _BSP_Uart1_disable()
155{
156  BCSR *csr;
157  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
158  csr->bcsr1 |=  UART1_E;               /* Disable Uart1 */
159}
160
161void _BSP_Uart2_enable()
162{
163  BCSR *csr;
164  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
165  csr->bcsr1 &= ~UART2_E;               /* Enable Uart2 */
166}
167
168void _BSP_Uart2_disable()
169{
170  BCSR *csr;
171  csr = (BCSR *)(m8260.memc[1].br & 0xFFFF8000);
172  csr->bcsr1 |=  UART2_E;               /* Disable Uart2 */
173
174}
175
176extern void m8260_console_reserve_resources(rtems_configuration_table *);
177
178/*
179 *  Function:   bsp_pretasking_hook
180 *  Created:    95/03/10
181 *
182 *  Description:
183 *      BSP pretasking hook.  Called just before drivers are initialized.
184 *      Used to setup libc and install any BSP extensions.
185 *
186 *  NOTES:
187 *      Must not use libc (to do io) from here, since drivers are
188 *      not yet initialized.
189 *
190 */
191
192void
193bsp_pretasking_hook(void)
194{
195  /*
196   *  These are assigned addresses in the linkcmds file for the BSP. This
197   *  approach is better than having these defined as manifest constants and
198   *  compiled into the kernel, but it is still not ideal when dealing with
199   *  multiprocessor configuration in which each board as a different memory
200   *  map. A better place for defining these symbols might be the makefiles.
201   *  Consideration should also be given to developing an approach in which
202   *  the kernel and the application can be linked and burned into ROM
203   *  independently of each other.
204   */
205    extern unsigned char _HeapStart;
206    extern unsigned char _HeapEnd;
207
208    bsp_libc_init( &_HeapStart, &_HeapEnd - &_HeapStart, 0 );
209
210#ifdef STACK_CHECKER_ON
211  /*
212   *  Initialize the stack bounds checker
213   *  We can either turn it on here or from the app.
214   */
215
216  Stack_check_Initialize();
217#endif
218
219#ifdef RTEMS_DEBUG
220  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
221#endif
222}
223
224void bsp_start(void)
225{
226  extern void *_WorkspaceBase;
227  ppc_cpu_id_t myCpu;
228  ppc_cpu_revision_t myCpuRevision;
229  register unsigned char* intrStack;
230
231  /* Set MPC8260ADS board LEDS and Uart enable lines */
232  _BSP_GPLED0_off();
233  _BSP_GPLED1_off();
234  _BSP_Uart1_enable();
235  _BSP_Uart2_enable();
236
237  /*
238   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
239   * store the result in global variables so that it can be used latter...
240   */
241  myCpu         = get_ppc_cpu_type();
242  myCpuRevision = get_ppc_cpu_revision();
243
244  cpu_init();
245
246/*
247  mmu_init();
248*/
249  /*
250   * Initialize some SPRG registers related to irq handling
251   */
252
253  intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE);
254  _write_SPRG1((unsigned int)intrStack);
255  /* signal that we have fixed PR288 - eventually, this should go away */
256  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
257
258/*
259  printk( "About to call initialize_exceptions\n" );
260*/
261   /*
262    * Install our own set of exception vectors
263    */
264
265   initialize_exceptions();
266
267/*
268  mmu_init();
269*/
270
271  /*
272   * Enable instruction and data caches. Do not force writethrough mode.
273   */
274#if INSTRUCTION_CACHE_ENABLE
275  rtems_cache_enable_instruction();
276#endif
277#if DATA_CACHE_ENABLE
278  rtems_cache_enable_data();
279#endif
280
281  /*
282   *  Allocate the memory for the RTEMS Work Space.  This can come from
283   *  a variety of places: hard coded address, malloc'ed from outside
284   *  RTEMS world (e.g. simulator or primitive memory manager), or (as
285   *  typically done by stock BSPs) by subtracting the required amount
286   *  of work space from the last physical address on the CPU board.
287   */
288
289  /*
290   *  Need to "allocate" the memory for the RTEMS Workspace and
291   *  tell the RTEMS configuration where it is.  This memory is
292   *  not malloc'ed.  It is just "pulled from the air".
293   */
294
295  BSP_Configuration.work_space_start = (void *)&_WorkspaceBase;
296
297/*
298  BSP_Configuration.microseconds_per_tick  = 1000;
299*/
300
301  /*
302   *  initialize the CPU table for this BSP
303   */
304
305  Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
306  Cpu_table.postdriver_hook = bsp_postdriver_hook;
307  if( Cpu_table.interrupt_stack_size < 4*1024 )
308    Cpu_table.interrupt_stack_size   = 4 * 1024;
309
310  bsp_clicks_per_usec      = 10;  /* for 40MHz extclk */
311  bsp_serial_per_sec       = 40000000;
312  bsp_serial_external_clock  = 0;
313  bsp_serial_xon_xoff      = 0;
314  bsp_serial_cts_rts       = 0;
315  bsp_serial_rate          = 9600;
316  bsp_timer_average_overhead = 3;
317  bsp_timer_least_valid            = 3;
318  bsp_clock_speed          = 40000000;
319
320#ifdef REV_0_2
321  /* set up some board specific registers */
322  m8260.siumcr &= 0xF3FFFFFF;           /* set TBEN ** BUG FIX ** */
323  m8260.siumcr |= 0x08000000;
324#endif
325
326  /* use BRG1 to generate 32kHz timebase */
327/*
328  m8260.brgc1 = M8260_BRG_EN + (uint32_t)(((uint16_t)((40016384)/(32768)) - 1) << 1) + 0;
329*/
330
331  /*
332   * Initalize RTEMS IRQ system
333   */
334  BSP_rtems_irq_mng_init(0);
335
336  /*
337   * Call this in case we use TERMIOS for console I/O
338   */
339
340  m8xx_uart_reserve_resources(&BSP_Configuration);
341
342/*
343  rtems_termios_initialize();
344*/
345#ifdef SHOW_MORE_INIT_SETTINGS
346  printk("Exit from bspstart\n");
347#endif
348
349}
350
351/*
352 *
353 *  _Thread_Idle_body
354 *
355 *  Replaces the one in c/src/exec/score/src/threadidlebody.c
356 *  The MSR[POW] bit is set to put the CPU into the low power mode
357 *  defined in HID0.  HID0 is set during starup in start.S.
358 *
359 */
360Thread _Thread_Idle_body(
361  uint32_t   ignored )
362{
363
364  for( ; ; )
365  {
366    asm volatile(
367      "mfmsr 3; oris 3,3,4; sync; mtmsr 3; isync; ori 3,3,0; ori 3,3,0"
368    );
369  }
370
371  return 0; /* to remove warning */
372}
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