source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c @ 5edbffe

4.104.114.84.95
Last change on this file since 5edbffe was 5edbffe, checked in by Joel Sherrill <joel.sherrill@…>, on Oct 22, 2001 at 2:46:02 PM

01-10-22 Andy Dachs <a.dachs@…>

  • mpc8260ads added as new BSP. tm27 reported not to run at this time.
  • ChangeLog?, Makefile.am, README, aclocal.m4, bsp_specs, clock/.cvsignore, clock/Makefile.am, clock/p_clock.c, configure.in, console/Makefile.am, console/console.c, include/Makefile.am, include/bsp.h, include/coverhd.h, irq/.cvsignore, irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c, network/Makefile.am, network/README, network/if_hdlcsubr.c, network/if_hdlcsubr.h, network/network.c, start/Makefile.am, start/start.S, startup/Makefile.am, startup/bspstart.c, startup/cpuinit.c, startup/linkcmds, startup/setvec.c, times, vectors/.cvsignore, vectors/Makefile.am, vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c, wrapup/Makefile.am: New files.
  • Property mode set to 100644
File size: 23.9 KB
Line 
1/*
2 * RTEMS/TCPIP driver for MPC8260 SCC
3 *
4 * Modified for MPC8260 by Andy Dachs <a.dachs@sstl.co.uk>
5 * Surrey Satellite Technology Limited
6 *
7 *   On the ADS board the ethernet interface is connected to FCC2
8 *   but in my application I want TCP over HDLC (see README)
9 *   so will use SCC3 as the network interface. I have other plans
10 *   for the FCCs so am unlikely to add true ethernet support to
11 *   this BSP.  Contributions welcome!
12 *
13 * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com)
14 *
15 *  This supports ethernet on either SCC1 or the FEC of the MPC860T.
16 *  Right now, we only do 10 Mbps, even with the FEC. The function
17 *  rtems_m860_enet_driver_attach determines which one to use. Currently,
18 *  only one may be used at a time.
19 *
20 * W. Eric Norum
21 * Saskatchewan Accelerator Laboratory
22 * University of Saskatchewan
23 * Saskatoon, Saskatchewan, CANADA
24 * eric@skatter.usask.ca
25 *
26 *  $Id$
27 */
28#include <bsp.h>
29#include <bsp/irq.h>
30#include <mpc8260.h>
31#include <mpc8260/cpm.h>
32#include <stdio.h>
33#include <rtems/error.h>
34#include <rtems/rtems_bsdnet.h>
35
36#include <sys/param.h>
37#include <sys/mbuf.h>
38#include <sys/socket.h>
39#include <sys/sockio.h>
40
41#include <net/if.h>
42
43#include <netinet/in.h>
44#include <netinet/if_ether.h>
45
46#include "if_hdlcsubr.h"
47
48/*
49 * Number of interfaces supported by this driver
50 */
51#define NIFACES 1
52
53/*
54 * Default number of buffer descriptors set aside for this driver.
55 * The number of transmit buffer descriptors has to be quite large
56 * since a single frame often uses four or more buffer descriptors.
57 */
58#define RX_BUF_COUNT     32
59#define TX_BUF_COUNT     8
60#define TX_BD_PER_BUF    4
61
62#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
63
64
65extern void m8xx_dump_brgs( void );
66
67/*
68 * RTEMS event used by interrupt handler to signal daemons.
69 * This must *not* be the same event used by the TCP/IP task synchronization.
70 */
71#define INTERRUPT_EVENT RTEMS_EVENT_1
72
73/*
74 * RTEMS event used to start transmit daemon.
75 * This must not be the same as INTERRUPT_EVENT.
76 */
77#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
78
79
80/*
81 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
82 * Round off to nearest multiple of RBUF_ALIGN.
83 */
84#define MAX_MTU_SIZE    1518
85/*#define MAX_MTU_SIZE  2050*/
86#define RBUF_ALIGN      4
87#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
88
89#if (MCLBYTES < RBUF_SIZE)
90# error "Driver must have MCLBYTES > RBUF_SIZE"
91#endif
92
93/*
94 * Per-device data
95 */
96struct m8260_hdlc_struct {
97        struct ifnet            ac_if;
98        struct mbuf             **rxMbuf;
99        struct mbuf             **txMbuf;
100        int                     acceptBroadcast;
101        int                     rxBdCount;
102        int                     txBdCount;
103        int                     txBdHead;
104        int                     txBdTail;
105        int                     txBdActiveCount;
106        m8260BufferDescriptor_t  *rxBdBase;
107        m8260BufferDescriptor_t  *txBdBase;
108        rtems_id                rxDaemonTid;
109        rtems_id                txDaemonTid;
110
111        /*
112         * Statistics
113         */
114        unsigned long   rxNotFirst;
115        unsigned long   rxNotLast;
116        unsigned long   rxInterrupts;
117        unsigned long   rxGiant;
118        unsigned long   rxNonOctet;
119        unsigned long   rxAbort;
120        unsigned long   rxBadCRC;
121        unsigned long   rxOverrun;
122        unsigned long   rxLostCarrier;
123        unsigned long   txInterrupts;
124        unsigned long   txUnderrun;
125        unsigned long   txLostCarrier;
126        unsigned long   txRawWait;
127};
128static struct m8260_hdlc_struct hdlc_driver[NIFACES];
129
130
131static void  m8xx_scc3_hdlc_on(const rtems_irq_connect_data* ptr)
132{
133}
134
135static void  m8xx_scc3_hdlc_off(const rtems_irq_connect_data* ptr)
136{
137  /*
138   * Please put relevant code there
139   */
140}
141
142static int  m8xx_scc3_hdlc_isOn(const rtems_irq_connect_data* ptr)
143{
144  return BSP_irq_enabled_at_cpm (ptr->name);
145}
146
147/*
148 * SCC interrupt handler
149 * TBD: Can we work out which SCC generated the interrupt from the
150 *      value of v? If so we can use the same handler for multiple
151 *      SCCs.
152 */
153static void
154m8xx_scc3_interrupt_handler ()
155{
156  /*
157   * Frame received?
158   */
159  if ((m8260.scc3.sccm & M8260_SCCE_RXF) &&
160      (m8260.scc3.scce & M8260_SCCE_RXF) ) {
161    m8260.scc3.scce = M8260_SCCE_RXF;
162/*    m8260.scc3.sccm &= ~M8260_SCCE_RXF; */
163    hdlc_driver[0].rxInterrupts++;
164    rtems_event_send (hdlc_driver[0].rxDaemonTid, INTERRUPT_EVENT);
165/*
166    printk( "Rx " );
167*/
168  }
169
170  /*
171   * Buffer transmitted or transmitter error?
172   */
173  if ((m8260.scc3.sccm & (M8260_SCCE_TX | M8260_SCCE_TXE) ) &&
174      (m8260.scc3.scce & (M8260_SCCE_TX | M8260_SCCE_TXE) )) {
175    m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
176/*    m8260.scc3.sccm &= ~(M8260_SCCE_TX | M8260_SCCE_TXE); */
177    hdlc_driver[0].txInterrupts++;
178    rtems_event_send (hdlc_driver[0].txDaemonTid, INTERRUPT_EVENT);
179/*
180    printk( "Tx " );
181*/
182  }
183
184#if 0
185  m8260.sipnr_l = M8260_SIMASK_SCC3; /* Clear SCC3 interrupt-in-service bit */
186#endif
187}
188
189
190static rtems_irq_connect_data hdlcSCC3IrqData = {
191  BSP_CPM_IRQ_SCC3,
192  (rtems_irq_hdl) m8xx_scc3_interrupt_handler,
193  (rtems_irq_enable) m8xx_scc3_hdlc_on,
194  (rtems_irq_disable) m8xx_scc3_hdlc_off,
195  (rtems_irq_is_enabled)m8xx_scc3_hdlc_isOn
196};
197
198
199/*
200 * Initialize the SCC hardware
201 * Configure I/O ports for SCC3
202 * Internal Tx clock, External Rx clock
203 */
204static void
205m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc)
206{
207  int i;
208  int brg;
209
210/*
211  unsigned char *hwaddr;
212*/
213  rtems_status_code status;
214/*
215  rtems_isr_entry old_handler;
216*/
217
218  /* RxD PB14 */
219  m8260.pparb |=  0x00020000;
220  m8260.psorb &= ~0x00020000;
221  m8260.pdirb &= ~0x00020000;
222
223  /* RxC (CLK5) PC27 */
224  m8260.pparc |=  0x00000010;
225  m8260.psorc &= ~0x00000010;
226  m8260.pdirc &= ~0x00000010;
227
228  /* TxD PD24 and TxC PD10 (BRG4) */
229  m8260.ppard |=  0x00200080;
230  m8260.psord |=  0x00200000;
231  m8260.psord &= ~0x00000080;
232  m8260.pdird |=  0x00200080;
233
234
235  /* External Rx Clock from CLK5 */
236  if( m8xx_get_clk( M8xx_CLK_5 ) == -1 )
237    printk( "Error allocating CLK5 for network device.\n" );
238  else
239    m8260.cmxscr |= 0x00002000;
240
241  /* Internal Tx Clock from BRG4 */
242  if( (brg = m8xx_get_brg(M8xx_BRG_4, 8000000 )) == -1 )
243    printk( "Error allocating BRG for network device\n" );
244  else
245    m8260.cmxscr |= ((unsigned)brg << 8);
246
247
248
249  /*
250   * Allocate mbuf pointers
251   */
252  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, 
253                       M_MBUF, M_NOWAIT);
254  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, 
255                       M_MBUF, M_NOWAIT);
256  if (!sc->rxMbuf || !sc->txMbuf)
257    rtems_panic ("No memory for mbuf pointers");
258 
259  /*
260   * Set receiver and transmitter buffer descriptor bases
261   */
262  sc->rxBdBase = m8xx_bd_allocate (sc->rxBdCount);
263  sc->txBdBase = m8xx_bd_allocate (sc->txBdCount);
264
265  m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260;
266  m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260;
267 
268  /*
269   * Send "Init parameters" command
270   */
271
272  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
273
274  /*
275   * Set receive and transmit function codes
276   */
277  m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS;
278  m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS;
279 
280  /*
281   * Set maximum receive buffer length
282   */
283  m8260.scc3p.mrblr = RBUF_SIZE;
284
285
286  m8260.scc3p.un.hdlc.c_mask = 0xF0B8;
287  m8260.scc3p.un.hdlc.c_pres = 0xFFFF;
288  m8260.scc3p.un.hdlc.disfc  = 0;
289  m8260.scc3p.un.hdlc.crcec  = 0;
290  m8260.scc3p.un.hdlc.abtsc  = 0;
291  m8260.scc3p.un.hdlc.nmarc  = 0;
292  m8260.scc3p.un.hdlc.retrc  = 0;
293  m8260.scc3p.un.hdlc.rfthr  = 1;
294  m8260.scc3p.un.hdlc.mflr   = RBUF_SIZE;
295
296  m8260.scc3p.un.hdlc.hmask  = 0x0000;  /* promiscuous */
297
298  m8260.scc3p.un.hdlc.haddr1 = 0xFFFF;  /* Broadcast address */
299  m8260.scc3p.un.hdlc.haddr2 = 0xFFFF;  /* Station address */
300  m8260.scc3p.un.hdlc.haddr3 = 0xFFFF;  /* Dummy */
301  m8260.scc3p.un.hdlc.haddr4 = 0xFFFF;  /* Dummy */
302
303
304  /*
305   * Send "Init parameters" command
306   */
307/*
308  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
309*/
310
311  /*
312   * Set up receive buffer descriptors
313   */
314  for (i = 0 ; i < sc->rxBdCount ; i++) {
315    (sc->rxBdBase + i)->status = 0;
316  }
317
318  /*
319   * Set up transmit buffer descriptors
320   */
321  for (i = 0 ; i < sc->txBdCount ; i++) {
322    (sc->txBdBase + i)->status = 0;
323    sc->txMbuf[i] = NULL;
324  }
325  sc->txBdHead = sc->txBdTail = 0;
326  sc->txBdActiveCount = 0;
327
328
329  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
330
331  /*
332   * Clear any outstanding events
333   */
334  m8260.scc3.scce = 0xFFFF;
335
336  /*
337   * Set up interrupts
338   */
339  status = BSP_install_rtems_irq_handler (&hdlcSCC3IrqData);
340/*
341  printk( "status = %d, Success = %d\n", status, RTEMS_SUCCESSFUL );
342*/
343  if (status != 1 /*RTEMS_SUCCESSFUL*/ ) {
344    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
345                 rtems_status_text (status));
346  }
347  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
348
349#if 0
350  /*
351   * Set up interrupts
352   */
353  status = rtems_interrupt_catch (m8260_scc3_interrupt_handler,
354                                  PPC_IRQ_CPM_SCC3,
355                                  &old_handler);
356  if (status != RTEMS_SUCCESSFUL) {
357    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
358                 rtems_status_text (status));
359  }
360
361  m8260.sipnr_l = M8260_SIMASK_SCC3; /* clear pending event */
362  m8260.simr_l |= M8260_SIMASK_SCC3; /* Enable SCC interrupt */
363
364#endif
365
366
367
368  m8260.scc3.gsmr_h  = 0;
369  m8260.scc3.gsmr_l  = 0x10000000;
370  m8260.scc3.dsr     = 0x7E7E;  /* flag character */
371  m8260.scc3.psmr    = 0x2000;  /* 2 flags between Tx'd frames */
372
373/*  printk("scc3 init\n" ); */
374
375  m8260.scc3.gsmr_l |=  0x00000030;  /* Set ENR and ENT to enable Rx and Tx */
376
377}
378
379
380
381/*
382 * Soak up buffer descriptors that have been sent
383 * Note that a buffer descriptor can't be retired as soon as it becomes
384 * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
385 *  made up of multiple buffers, the user should not reuse the first buffer
386 * descriptor until the last buffer descriptor of the frame has had its
387 * ready bit cleared by the CPM".
388 */
389static void
390m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc)
391{
392  rtems_unsigned16 status;
393  int i;
394  int nRetired;
395  struct mbuf *m, *n;
396 
397  i = sc->txBdTail;
398  nRetired = 0;
399  while ((sc->txBdActiveCount != 0)
400         &&  (((status = (sc->txBdBase + i)->status) & M8260_BD_READY) == 0)) {
401    /*
402     * See if anything went wrong
403     */
404    if (status & (M8260_BD_UNDERRUN |
405                  M8260_BD_CTS_LOST)) {
406      /*
407       * Check for errors which stop the transmitter.
408       */
409      if( status & M8260_BD_UNDERRUN ) {
410          hdlc_driver[0].txUnderrun++;
411       
412        /*
413         * Restart the transmitter
414         */
415        /* FIXME: this should get executed only if using the SCC */
416        m8xx_cp_execute_cmd (M8260_CR_OP_RESTART_TX | M8260_CR_SCC3);
417      }
418      if (status & M8260_BD_CTS_LOST)
419        hdlc_driver[0].txLostCarrier++;
420    }
421    nRetired++;
422    if (status & M8260_BD_LAST) {
423      /*
424       * A full frame has been transmitted.
425       * Free all the associated buffer descriptors.
426       */
427      sc->txBdActiveCount -= nRetired;
428      while (nRetired) {
429        nRetired--;
430        m = sc->txMbuf[sc->txBdTail];
431        MFREE (m, n);
432        if (++sc->txBdTail == sc->txBdCount)
433          sc->txBdTail = 0;
434      }
435    }
436    if (++i == sc->txBdCount)
437      i = 0;
438  }
439}
440
441/*
442 * reader task
443 */
444static void
445scc_rxDaemon (void *arg)
446{
447  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
448  struct ifnet *ifp = &sc->ac_if;
449  struct mbuf *m;
450  rtems_unsigned16 status;
451  m8260BufferDescriptor_t *rxBd;
452  int rxBdIndex;
453 
454  /*
455   * Allocate space for incoming packets and start reception
456   */
457  for (rxBdIndex = 0 ; ;) {
458    rxBd = sc->rxBdBase + rxBdIndex;
459    MGETHDR (m, M_WAIT, MT_DATA);
460    MCLGET (m, M_WAIT);
461    m->m_pkthdr.rcvif = ifp;
462    sc->rxMbuf[rxBdIndex] = m;
463    rxBd->buffer = mtod (m, void *);
464    rxBd->status = M8260_BD_EMPTY | M8260_BD_INTERRUPT;
465    if (++rxBdIndex == sc->rxBdCount) {
466      rxBd->status |= M8260_BD_WRAP;
467      break;
468    }
469  }
470
471/*
472  m8260.scc3.sccm |= M8260_SCCE_RXF;
473*/
474
475  /*
476   * Input packet handling loop
477   */
478  rxBdIndex = 0;
479  for (;;) {
480    rxBd = sc->rxBdBase + rxBdIndex;
481   
482    /*
483     * Wait for packet if there's not one ready
484     */
485    if ((status = rxBd->status) & M8260_BD_EMPTY) {
486      /*
487       * Clear old events
488       */
489
490      m8260.scc3.scce = M8260_SCCE_RXF;
491
492      /*
493       * Wait for packet
494       * Note that the buffer descriptor is checked
495       * *before* the event wait -- this catches the
496       * possibility that a packet arrived between the
497       * `if' above, and the clearing of the event register.
498       */
499      while ((status = rxBd->status) & M8260_BD_EMPTY) {
500        rtems_event_set events;
501
502        /*
503         * Unmask RXF (Full frame received) event
504         */
505        m8260.scc3.sccm |= M8260_SCCE_RXF;
506
507/*        printk( "Rxdwait "); */
508       
509        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
510                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
511                                    RTEMS_NO_TIMEOUT,
512                                    &events);
513
514/*        printk( "Rxd " ); */
515      }
516    }
517   
518    /*
519     * Check that packet is valid
520     */
521    if ((status & (M8260_BD_LAST |
522                   M8260_BD_FIRST_IN_FRAME |
523                   M8260_BD_LONG |
524                   M8260_BD_NONALIGNED |
525                   M8260_BD_ABORT |
526                   M8260_BD_CRC_ERROR |
527                   M8260_BD_OVERRUN /*|
528                   M8260_BD_CARRIER_LOST*/)) ==
529                   (M8260_BD_LAST |
530                   M8260_BD_FIRST_IN_FRAME ) ) {
531
532/*      printk( "RxV " ); */
533
534/*
535 * Invalidate the buffer for this descriptor
536 */
537
538      rtems_cache_invalidate_multiple_data_lines(rxBd->buffer, rxBd->length);
539
540      m = sc->rxMbuf[rxBdIndex];
541
542      /* strip off HDLC CRC */
543      m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(rtems_unsigned16);
544
545      hdlc_input( ifp, m );
546
547      /*
548       * Allocate a new mbuf
549       */
550      MGETHDR (m, M_WAIT, MT_DATA);
551      MCLGET (m, M_WAIT);
552      m->m_pkthdr.rcvif = ifp;
553      sc->rxMbuf[rxBdIndex] = m;
554      rxBd->buffer = mtod (m, void *);
555    }
556    else {
557      printk( "RxErr[%04X,%d]", status, rxBd->length );
558      /*
559       * Something went wrong with the reception
560       */
561      if (!(status & M8260_BD_LAST))
562        sc->rxNotLast++;
563      if (!(status & M8260_BD_FIRST_IN_FRAME))
564        sc->rxNotFirst++;
565
566      if (status & M8260_BD_LONG)
567        sc->rxGiant++;
568      if (status & M8260_BD_NONALIGNED)
569        sc->rxNonOctet++;
570      if (status & M8260_BD_ABORT)
571        sc->rxAbort++;
572      if (status & M8260_BD_CRC_ERROR)
573        sc->rxBadCRC++;
574      if (status & M8260_BD_OVERRUN)
575        sc->rxOverrun++;
576      if (status & M8260_BD_CARRIER_LOST)
577        sc->rxLostCarrier++;
578    }
579   
580    /*
581     * Reenable the buffer descriptor
582     */
583    rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) |
584                    M8260_BD_EMPTY;
585   
586    /*
587     * Move to next buffer descriptor
588     */
589    if (++rxBdIndex == sc->rxBdCount)
590      rxBdIndex = 0;
591  }
592}
593
594
595static void
596scc_sendpacket (struct ifnet *ifp, struct mbuf *m)
597{
598  struct m8260_hdlc_struct *sc = ifp->if_softc;
599  volatile m8260BufferDescriptor_t *firstTxBd, *txBd;
600  struct mbuf *l = NULL;
601  rtems_unsigned16 status;
602  int nAdded;
603 
604  /*
605   * Free up buffer descriptors
606   */
607  m8260Enet_retire_tx_bd (sc);
608 
609  /*
610   * Set up the transmit buffer descriptors.
611   * No need to pad out short packets since the
612   * hardware takes care of that automatically.
613   * No need to copy the packet to a contiguous buffer
614   * since the hardware is capable of scatter/gather DMA.
615   */
616  nAdded = 0;
617  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
618
619/*
620  m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
621*/
622
623  for (;;) {
624    /*
625     * Wait for buffer descriptor to become available.
626     */
627    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
628      /*
629       * Clear old events
630       */
631      m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
632     
633      /*
634       * Wait for buffer descriptor to become available.
635       * Note that the buffer descriptors are checked
636       * *before* * entering the wait loop -- this catches
637       * the possibility that a buffer descriptor became
638       * available between the `if' above, and the clearing
639       * of the event register.
640       * This is to catch the case where the transmitter
641       * stops in the middle of a frame -- and only the
642       * last buffer descriptor in a frame can generate
643       * an interrupt.
644       */
645      m8260Enet_retire_tx_bd (sc);
646      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
647        rtems_event_set events;
648       
649        /*
650         * Unmask TX (buffer transmitted) event
651         */
652        m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
653
654        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
655                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
656                                    RTEMS_NO_TIMEOUT,
657                                    &events);
658        m8260Enet_retire_tx_bd (sc);
659      }
660    }
661   
662    /*
663     * Don't set the READY flag till the
664     * whole packet has been readied.
665     */
666    status = nAdded ? M8260_BD_READY : 0;
667   
668    /*
669     *  FIXME: Why not deal with empty mbufs at at higher level?
670     * The IP fragmentation routine in ip_output
671     * can produce packet fragments with zero length.
672     * I think that ip_output should be changed to get
673     * rid of these zero-length mbufs, but for now,
674     * I'll deal with them here.
675     */
676    if (m->m_len) {
677      /*
678       * Fill in the buffer descriptor
679       */
680
681      txBd->buffer = mtod (m, void *);
682      txBd->length = m->m_len;
683
684
685      /*
686       * Flush the buffer for this descriptor
687       */
688
689      rtems_cache_flush_multiple_data_lines(txBd->buffer, txBd->length);
690
691
692/* throw off the header for Ethernet Emulation mode */
693/*
694      txBd->buffer = mtod (m, void *);
695      txBd->buffer += sizeof( struct ether_header ) + 2;
696      txBd->length = m->m_len - sizeof( struct ether_header ) - 2;
697*/
698      sc->txMbuf[sc->txBdHead] = m;
699      nAdded++;
700      if (++sc->txBdHead == sc->txBdCount) {
701        status |= M8260_BD_WRAP;
702        sc->txBdHead = 0;
703      }
704      l = m;
705      m = m->m_next;
706    }
707    else {
708      /*
709       * Just toss empty mbufs
710       */
711      struct mbuf *n;
712      MFREE (m, n);
713      m = n;
714      if (l != NULL)
715        l->m_next = m;
716    }
717   
718    /*
719     * Set the transmit buffer status.
720     * Break out of the loop if this mbuf is the last in the frame.
721     */
722    if (m == NULL) {
723      if (nAdded) {
724        status |= M8260_BD_LAST | M8260_BD_TX_CRC | M8260_BD_INTERRUPT;
725        txBd->status = status;
726        firstTxBd->status |= M8260_BD_READY;
727        sc->txBdActiveCount += nAdded;
728      }
729      break;
730    }
731    txBd->status = status;
732    txBd = sc->txBdBase + sc->txBdHead;
733  }
734}
735
736
737/*
738 * Driver transmit daemon
739 */
740void
741scc_txDaemon (void *arg)
742{
743  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
744  struct ifnet *ifp = &sc->ac_if;
745  struct mbuf *m;
746  rtems_event_set events;
747 
748  for (;;) {
749    /*
750     * Wait for packet
751     */
752    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
753   
754    /*
755     * Send packets till queue is empty
756     */
757    for (;;) {
758      /*
759       * Get the next mbuf chain to transmit.
760       */
761      IF_DEQUEUE(&ifp->if_snd, m);
762      if (!m)
763        break;
764
765
766      scc_sendpacket (ifp, m);
767
768
769    }
770    ifp->if_flags &= ~IFF_OACTIVE;
771  }
772}
773
774
775/*
776 * Send packet (caller provides header).
777 */
778static void
779m8260_hdlc_start (struct ifnet *ifp)
780{
781  struct m8260_hdlc_struct *sc = ifp->if_softc;
782 
783  rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
784  ifp->if_flags |= IFF_OACTIVE;
785}
786
787/*
788 * Initialize and start the device
789 */
790static void
791scc_init (void *arg)
792{
793  struct m8260_hdlc_struct *sc = arg;
794  struct ifnet *ifp = &sc->ac_if;
795 
796  if (sc->txDaemonTid == 0) {
797   
798    /*
799     * Set up SCC hardware
800     */
801    m8260_scc_initialize_hardware (sc);
802   
803    /*
804     * Start driver tasks
805     */
806    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
807    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
808   
809  }
810 
811#if 0
812  /*
813   * Set flags appropriately
814   */
815  if (ifp->if_flags & IFF_PROMISC)
816    m8260.scc3.psmr |= 0x200;
817  else
818    m8260.scc3.psmr &= ~0x200;
819#endif
820
821  /*
822   * Tell the world that we're running.
823   */
824  ifp->if_flags |= IFF_RUNNING;
825 
826  /*
827   * Enable receiver and transmitter
828   */
829  m8260.scc3.gsmr_l |= 0x30;
830}
831
832
833
834/*
835 * Stop the device
836 */
837static void
838scc_stop (struct m8260_hdlc_struct *sc)
839{
840  struct ifnet *ifp = &sc->ac_if;
841 
842  ifp->if_flags &= ~IFF_RUNNING;
843 
844  /*
845   * Shut down receiver and transmitter
846   */
847  m8260.scc3.gsmr_l &= ~0x30;
848}
849
850
851/*
852 * Show interface statistics
853 */
854static void
855hdlc_stats (struct m8260_hdlc_struct *sc)
856{
857  printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
858  printf ("              Giant:%-8lu", sc->rxGiant);
859  printf ("          Non-octet:%-8lu\n", sc->rxNonOctet);
860  printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
861  printf ("            Overrun:%-8lu", sc->rxOverrun);
862  printf ("         No Carrier:%-8lu\n", sc->rxLostCarrier);
863  printf ("          Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc);
864 
865  printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
866  printf ("         No Carrier:%-8lu", sc->txLostCarrier);
867  printf ("           Underrun:%-8lu\n", sc->txUnderrun);
868  printf ("    Raw output wait:%-8lu\n", sc->txRawWait);
869}
870
871/*
872 * Driver ioctl handler
873 */
874static int
875scc_ioctl (struct ifnet *ifp, int command, caddr_t data)
876{
877  struct m8260_hdlc_struct *sc = ifp->if_softc;
878  int error = 0;
879 
880  switch (command) {
881  case SIOCGIFADDR:
882  case SIOCSIFADDR:
883    hdlc_ioctl (ifp, command, data);
884    break;
885   
886  case SIOCSIFFLAGS:
887    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
888    case IFF_RUNNING:
889      scc_stop (sc);
890      break;
891     
892    case IFF_UP:
893      scc_init (sc);
894      break;
895     
896    case IFF_UP | IFF_RUNNING:
897      scc_stop (sc);
898      scc_init (sc);
899      break;
900     
901    default:
902      break;
903    }
904    break;
905   
906  case SIO_RTEMS_SHOW_STATS:
907    hdlc_stats (sc);
908    break;
909   
910    /*
911     * FIXME: All sorts of multicast commands need to be added here!
912     */
913  default:
914    error = EINVAL;
915    break;
916  }
917  return error;
918}
919
920
921
922/*
923 * Attach an SCC driver to the system
924 */
925int
926rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config)
927{
928  struct m8260_hdlc_struct *sc;
929  struct ifnet *ifp;
930  int mtu;
931  int i;
932 
933  /*
934   * Find a free driver
935   */
936  for (i = 0 ; i < NIFACES ; i++) {
937    sc = &hdlc_driver[i];
938    ifp = &sc->ac_if;
939    if (ifp->if_softc == NULL)
940      break;
941  }
942  if (i >= NIFACES) {
943    printf ("Too many SCC drivers.\n");
944    return 0;
945  }
946
947#if 0
948  /*
949   * Process options
950   */
951
952  if (config->hardware_address) {
953    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
954  }
955  else {
956    sc->arpcom.ac_enaddr[0] = 0x44;
957    sc->arpcom.ac_enaddr[1] = 0x22;
958    sc->arpcom.ac_enaddr[2] = 0x33;
959    sc->arpcom.ac_enaddr[3] = 0x33;
960    sc->arpcom.ac_enaddr[4] = 0x22;
961    sc->arpcom.ac_enaddr[5] = 0x44;
962  }
963#endif
964
965  if (config->mtu)
966    mtu = config->mtu;
967  else
968    mtu = ETHERMTU;
969  if (config->rbuf_count)
970    sc->rxBdCount = config->rbuf_count;
971  else
972    sc->rxBdCount = RX_BUF_COUNT;
973  if (config->xbuf_count)
974    sc->txBdCount = config->xbuf_count;
975  else
976    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
977  sc->acceptBroadcast = !config->ignore_broadcast;
978 
979  /*
980   * Set up network interface values
981   */
982  ifp->if_softc = sc;
983  ifp->if_unit = i + 1;
984  ifp->if_name = "eth";
985  ifp->if_mtu = mtu;
986  ifp->if_init = scc_init;
987  ifp->if_ioctl = scc_ioctl;
988  ifp->if_start = m8260_hdlc_start;
989  ifp->if_output = hdlc_output;
990  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP;
991  if (ifp->if_snd.ifq_maxlen == 0)
992    ifp->if_snd.ifq_maxlen = ifqmaxlen;
993 
994  /*
995   * Attach the interface
996   */
997  if_attach (ifp);
998  hdlc_ifattach (ifp);
999  return 1;
1000};
1001
1002
1003int
1004rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
1005{
1006  return rtems_scc3_driver_attach( config );
1007
1008/*
1009  if ((m8260.fec.mii_data & 0xffff) == 0x2000) {
1010    return rtems_fec_driver_attach(config);
1011  }
1012  else {
1013    return rtems_scc1_driver_attach(config);
1014  }
1015*/
1016}
Note: See TracBrowser for help on using the repository browser.