source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c @ 2d0bc83

Last change on this file since 2d0bc83 was d8d6a08, checked in by Sebastian Huber <sebastian.huber@…>, on Jan 27, 2018 at 10:12:44 AM

bsps: Move network define to source files

Define INSIDE_RTEMS_BSD_TCPIP_STACK in the network interface driver
source files to avoid some build system magic.

  • Property mode set to 100644
File size: 23.4 KB
Line 
1/*
2 * RTEMS/TCPIP driver for MPC8260 SCC
3 *
4 * Modified for MPC8260 by Andy Dachs <a.dachs@sstl.co.uk>
5 * Surrey Satellite Technology Limited
6 *
7 *   On the ADS board the ethernet interface is connected to FCC2
8 *   but in my application I want TCP over HDLC (see README)
9 *   so will use SCC3 as the network interface. I have other plans
10 *   for the FCCs so am unlikely to add true ethernet support to
11 *   this BSP.  Contributions welcome!
12 *
13 * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com)
14 *
15 *  This supports ethernet on either SCC1 or the FEC of the MPC860T.
16 *  Right now, we only do 10 Mbps, even with the FEC. The function
17 *  rtems_m860_enet_driver_attach determines which one to use. Currently,
18 *  only one may be used at a time.
19 *
20 * W. Eric Norum
21 * Saskatchewan Accelerator Laboratory
22 * University of Saskatchewan
23 * Saskatoon, Saskatchewan, CANADA
24 * eric@skatter.usask.ca
25 */
26
27#define __INSIDE_RTEMS_BSD_TCPIP_STACK__
28
29#include <bsp.h>
30#include <bsp/irq.h>
31#include <mpc8260.h>
32#include <mpc8260/cpm.h>
33#include <stdio.h>
34#include <rtems/error.h>
35#include <rtems/rtems_bsdnet.h>
36#include <rtems/bspIo.h>
37
38#include <sys/param.h>
39#include <sys/mbuf.h>
40#include <sys/socket.h>
41#include <sys/sockio.h>
42#include <errno.h>
43
44#include <net/if.h>
45
46#include <netinet/in.h>
47#include <netinet/if_ether.h>
48
49#include "if_hdlcsubr.h"
50
51/*
52 * Number of interfaces supported by this driver
53 */
54#define NIFACES 1
55
56/*
57 * Default number of buffer descriptors set aside for this driver.
58 * The number of transmit buffer descriptors has to be quite large
59 * since a single frame often uses four or more buffer descriptors.
60 */
61#define RX_BUF_COUNT     32
62#define TX_BUF_COUNT     8
63#define TX_BD_PER_BUF    4
64
65#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
66
67extern void m8xx_dump_brgs( void );
68
69/*
70 * RTEMS event used by interrupt handler to signal daemons.
71 * This must *not* be the same event used by the TCP/IP task synchronization.
72 */
73#define INTERRUPT_EVENT RTEMS_EVENT_1
74
75/*
76 * RTEMS event used to start transmit daemon.
77 * This must not be the same as INTERRUPT_EVENT.
78 */
79#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
80
81/*
82 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
83 * Round off to nearest multiple of RBUF_ALIGN.
84 */
85#define MAX_MTU_SIZE    1518
86/*#define MAX_MTU_SIZE  2050*/
87#define RBUF_ALIGN      4
88#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
89
90#if (MCLBYTES < RBUF_SIZE)
91# error "Driver must have MCLBYTES > RBUF_SIZE"
92#endif
93
94/*
95 * Per-device data
96 */
97struct m8260_hdlc_struct {
98        struct ifnet            ac_if;
99        struct mbuf             **rxMbuf;
100        struct mbuf             **txMbuf;
101        int                     acceptBroadcast;
102        int                     rxBdCount;
103        int                     txBdCount;
104        int                     txBdHead;
105        int                     txBdTail;
106        int                     txBdActiveCount;
107        m8260BufferDescriptor_t  *rxBdBase;
108        m8260BufferDescriptor_t  *txBdBase;
109        rtems_id                rxDaemonTid;
110        rtems_id                txDaemonTid;
111
112        /*
113         * Statistics
114         */
115        unsigned long   rxNotFirst;
116        unsigned long   rxNotLast;
117        unsigned long   rxInterrupts;
118        unsigned long   rxGiant;
119        unsigned long   rxNonOctet;
120        unsigned long   rxAbort;
121        unsigned long   rxBadCRC;
122        unsigned long   rxOverrun;
123        unsigned long   rxLostCarrier;
124        unsigned long   txInterrupts;
125        unsigned long   txUnderrun;
126        unsigned long   txLostCarrier;
127        unsigned long   txRawWait;
128};
129static struct m8260_hdlc_struct hdlc_driver[NIFACES];
130
131static void  m8xx_scc3_hdlc_on(const rtems_irq_connect_data* ptr)
132{
133}
134
135static void  m8xx_scc3_hdlc_off(const rtems_irq_connect_data* ptr)
136{
137  /*
138   * Please put relevant code there
139   */
140}
141
142static int  m8xx_scc3_hdlc_isOn(const rtems_irq_connect_data* ptr)
143{
144  return BSP_irq_enabled_at_cpm (ptr->name);
145}
146
147/*
148 * SCC interrupt handler
149 * TBD: Can we work out which SCC generated the interrupt from the
150 *      value of v? If so we can use the same handler for multiple
151 *      SCCs.
152 */
153static void
154m8xx_scc3_interrupt_handler (rtems_irq_hdl_param unused)
155{
156  /*
157   * Frame received?
158   */
159  if ((m8260.scc3.sccm & M8260_SCCE_RXF) &&
160      (m8260.scc3.scce & M8260_SCCE_RXF) ) {
161    m8260.scc3.scce = M8260_SCCE_RXF;
162/*    m8260.scc3.sccm &= ~M8260_SCCE_RXF; */
163    hdlc_driver[0].rxInterrupts++;
164    rtems_bsdnet_event_send (hdlc_driver[0].rxDaemonTid, INTERRUPT_EVENT);
165/*
166    printk( "Rx " );
167*/
168  }
169
170  /*
171   * Buffer transmitted or transmitter error?
172   */
173  if ((m8260.scc3.sccm & (M8260_SCCE_TX | M8260_SCCE_TXE) ) &&
174      (m8260.scc3.scce & (M8260_SCCE_TX | M8260_SCCE_TXE) )) {
175    m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
176/*    m8260.scc3.sccm &= ~(M8260_SCCE_TX | M8260_SCCE_TXE); */
177    hdlc_driver[0].txInterrupts++;
178    rtems_bsdnet_event_send (hdlc_driver[0].txDaemonTid, INTERRUPT_EVENT);
179/*
180    printk( "Tx " );
181*/
182  }
183
184#if 0
185  m8260.sipnr_l = M8260_SIMASK_SCC3; /* Clear SCC3 interrupt-in-service bit */
186#endif
187}
188
189static rtems_irq_connect_data hdlcSCC3IrqData = {
190  BSP_CPM_IRQ_SCC3,
191  (rtems_irq_hdl) m8xx_scc3_interrupt_handler,
192  NULL,
193  (rtems_irq_enable) m8xx_scc3_hdlc_on,
194  (rtems_irq_disable) m8xx_scc3_hdlc_off,
195  (rtems_irq_is_enabled)m8xx_scc3_hdlc_isOn
196};
197
198/*
199 * Initialize the SCC hardware
200 * Configure I/O ports for SCC3
201 * Internal Tx clock, External Rx clock
202 */
203static void
204m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc)
205{
206  int i;
207  int brg;
208
209  rtems_status_code status;
210
211  /* RxD PB14 */
212  m8260.pparb |=  0x00020000;
213  m8260.psorb &= ~0x00020000;
214  m8260.pdirb &= ~0x00020000;
215
216  /* RxC (CLK5) PC27 */
217  m8260.pparc |=  0x00000010;
218  m8260.psorc &= ~0x00000010;
219  m8260.pdirc &= ~0x00000010;
220
221  /* TxD PD24 and TxC PD10 (BRG4) */
222  m8260.ppard |=  0x00200080;
223  m8260.psord |=  0x00200000;
224  m8260.psord &= ~0x00000080;
225  m8260.pdird |=  0x00200080;
226
227  /* External Rx Clock from CLK5 */
228  if( m8xx_get_clk( M8xx_CLK_5 ) == -1 )
229    printk( "Error allocating CLK5 for network device.\n" );
230  else
231    m8260.cmxscr |= 0x00002000;
232
233  /* Internal Tx Clock from BRG4 */
234  if( (brg = m8xx_get_brg(M8xx_BRG_4, 8000000 )) == -1 )
235    printk( "Error allocating BRG for network device\n" );
236  else
237    m8260.cmxscr |= ((unsigned)brg << 8);
238
239  /*
240   * Allocate mbuf pointers
241   */
242  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf,
243                       M_MBUF, M_NOWAIT);
244  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf,
245                       M_MBUF, M_NOWAIT);
246  if (!sc->rxMbuf || !sc->txMbuf)
247    rtems_panic ("No memory for mbuf pointers");
248
249  /*
250   * Set receiver and transmitter buffer descriptor bases
251   */
252  sc->rxBdBase = m8xx_bd_allocate (sc->rxBdCount);
253  sc->txBdBase = m8xx_bd_allocate (sc->txBdCount);
254
255  m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260;
256  m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260;
257
258  /*
259   * Send "Init parameters" command
260   */
261
262  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
263
264  /*
265   * Set receive and transmit function codes
266   */
267  m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS;
268  m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS;
269
270  /*
271   * Set maximum receive buffer length
272   */
273  m8260.scc3p.mrblr = RBUF_SIZE;
274
275  m8260.scc3p.un.hdlc.c_mask = 0xF0B8;
276  m8260.scc3p.un.hdlc.c_pres = 0xFFFF;
277  m8260.scc3p.un.hdlc.disfc  = 0;
278  m8260.scc3p.un.hdlc.crcec  = 0;
279  m8260.scc3p.un.hdlc.abtsc  = 0;
280  m8260.scc3p.un.hdlc.nmarc  = 0;
281  m8260.scc3p.un.hdlc.retrc  = 0;
282  m8260.scc3p.un.hdlc.rfthr  = 1;
283  m8260.scc3p.un.hdlc.mflr   = RBUF_SIZE;
284
285  m8260.scc3p.un.hdlc.hmask  = 0x0000;  /* promiscuous */
286
287  m8260.scc3p.un.hdlc.haddr1 = 0xFFFF;  /* Broadcast address */
288  m8260.scc3p.un.hdlc.haddr2 = 0xFFFF;  /* Station address */
289  m8260.scc3p.un.hdlc.haddr3 = 0xFFFF;  /* Dummy */
290  m8260.scc3p.un.hdlc.haddr4 = 0xFFFF;  /* Dummy */
291
292  /*
293   * Send "Init parameters" command
294   */
295/*
296  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
297*/
298
299  /*
300   * Set up receive buffer descriptors
301   */
302  for (i = 0 ; i < sc->rxBdCount ; i++) {
303    (sc->rxBdBase + i)->status = 0;
304  }
305
306  /*
307   * Set up transmit buffer descriptors
308   */
309  for (i = 0 ; i < sc->txBdCount ; i++) {
310    (sc->txBdBase + i)->status = 0;
311    sc->txMbuf[i] = NULL;
312  }
313  sc->txBdHead = sc->txBdTail = 0;
314  sc->txBdActiveCount = 0;
315
316  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
317
318  /*
319   * Clear any outstanding events
320   */
321  m8260.scc3.scce = 0xFFFF;
322
323  /*
324   * Set up interrupts
325   */
326  status = BSP_install_rtems_irq_handler (&hdlcSCC3IrqData);
327/*
328  printk( "status = %d, Success = %d\n", status, RTEMS_SUCCESSFUL );
329*/
330  if (status != 1 /*RTEMS_SUCCESSFUL*/ ) {
331    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
332                 rtems_status_text (status));
333  }
334  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
335
336  m8260.scc3.gsmr_h  = 0;
337  m8260.scc3.gsmr_l  = 0x10000000;
338  m8260.scc3.dsr     = 0x7E7E;  /* flag character */
339  m8260.scc3.psmr    = 0x2000;  /* 2 flags between Tx'd frames */
340
341/*  printk("scc3 init\n" ); */
342
343  m8260.scc3.gsmr_l |=  0x00000030;  /* Set ENR and ENT to enable Rx and Tx */
344
345}
346
347/*
348 * Soak up buffer descriptors that have been sent
349 * Note that a buffer descriptor can't be retired as soon as it becomes
350 * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
351 *  made up of multiple buffers, the user should not reuse the first buffer
352 * descriptor until the last buffer descriptor of the frame has had its
353 * ready bit cleared by the CPM".
354 */
355static void
356m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc)
357{
358  uint16_t         status;
359  int i;
360  int nRetired;
361  struct mbuf *m, *n;
362
363  i = sc->txBdTail;
364  nRetired = 0;
365  while ((sc->txBdActiveCount != 0)
366         &&  (((status = (sc->txBdBase + i)->status) & M8260_BD_READY) == 0)) {
367    /*
368     * See if anything went wrong
369     */
370    if (status & (M8260_BD_UNDERRUN |
371                  M8260_BD_CTS_LOST)) {
372      /*
373       * Check for errors which stop the transmitter.
374       */
375      if( status & M8260_BD_UNDERRUN ) {
376          hdlc_driver[0].txUnderrun++;
377
378        /*
379         * Restart the transmitter
380         */
381        /* FIXME: this should get executed only if using the SCC */
382        m8xx_cp_execute_cmd (M8260_CR_OP_RESTART_TX | M8260_CR_SCC3);
383      }
384      if (status & M8260_BD_CTS_LOST)
385        hdlc_driver[0].txLostCarrier++;
386    }
387    nRetired++;
388    if (status & M8260_BD_LAST) {
389      /*
390       * A full frame has been transmitted.
391       * Free all the associated buffer descriptors.
392       */
393      sc->txBdActiveCount -= nRetired;
394      while (nRetired) {
395        nRetired--;
396        m = sc->txMbuf[sc->txBdTail];
397        MFREE (m, n);
398        if (++sc->txBdTail == sc->txBdCount)
399          sc->txBdTail = 0;
400      }
401    }
402    if (++i == sc->txBdCount)
403      i = 0;
404  }
405}
406
407/*
408 * reader task
409 */
410static void
411scc_rxDaemon (void *arg)
412{
413  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
414  struct ifnet *ifp = &sc->ac_if;
415  struct mbuf *m;
416  uint16_t         status;
417  m8260BufferDescriptor_t *rxBd;
418  int rxBdIndex;
419
420  /*
421   * Allocate space for incoming packets and start reception
422   */
423  for (rxBdIndex = 0 ; ;) {
424    rxBd = sc->rxBdBase + rxBdIndex;
425    MGETHDR (m, M_WAIT, MT_DATA);
426    MCLGET (m, M_WAIT);
427    m->m_pkthdr.rcvif = ifp;
428    sc->rxMbuf[rxBdIndex] = m;
429    rxBd->buffer = mtod (m, void *);
430    rxBd->status = M8260_BD_EMPTY | M8260_BD_INTERRUPT;
431    if (++rxBdIndex == sc->rxBdCount) {
432      rxBd->status |= M8260_BD_WRAP;
433      break;
434    }
435  }
436
437/*
438  m8260.scc3.sccm |= M8260_SCCE_RXF;
439*/
440
441  /*
442   * Input packet handling loop
443   */
444  rxBdIndex = 0;
445  for (;;) {
446    rxBd = sc->rxBdBase + rxBdIndex;
447
448    /*
449     * Wait for packet if there's not one ready
450     */
451    if ((status = rxBd->status) & M8260_BD_EMPTY) {
452      /*
453       * Clear old events
454       */
455
456      m8260.scc3.scce = M8260_SCCE_RXF;
457
458      /*
459       * Wait for packet
460       * Note that the buffer descriptor is checked
461       * *before* the event wait -- this catches the
462       * possibility that a packet arrived between the
463       * `if' above, and the clearing of the event register.
464       */
465      while ((status = rxBd->status) & M8260_BD_EMPTY) {
466        rtems_event_set events;
467
468        /*
469         * Unmask RXF (Full frame received) event
470         */
471        m8260.scc3.sccm |= M8260_SCCE_RXF;
472
473/*        printk( "Rxdwait "); */
474
475        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
476                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
477                                    RTEMS_NO_TIMEOUT,
478                                    &events);
479
480/*        printk( "Rxd " ); */
481      }
482    }
483
484    /*
485     * Check that packet is valid
486     */
487    if ((status & (M8260_BD_LAST |
488                   M8260_BD_FIRST_IN_FRAME |
489                   M8260_BD_LONG |
490                   M8260_BD_NONALIGNED |
491                   M8260_BD_ABORT |
492                   M8260_BD_CRC_ERROR |
493                   M8260_BD_OVERRUN /*|
494                   M8260_BD_CARRIER_LOST*/)) ==
495                   (M8260_BD_LAST |
496                   M8260_BD_FIRST_IN_FRAME ) ) {
497
498/*      printk( "RxV " ); */
499
500/*
501 * Invalidate the buffer for this descriptor
502 */
503
504      rtems_cache_invalidate_multiple_data_lines((void *)rxBd->buffer, rxBd->length);
505
506      m = sc->rxMbuf[rxBdIndex];
507
508      /* strip off HDLC CRC */
509      m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint16_t);
510
511      hdlc_input( ifp, m );
512
513      /*
514       * Allocate a new mbuf
515       */
516      MGETHDR (m, M_WAIT, MT_DATA);
517      MCLGET (m, M_WAIT);
518      m->m_pkthdr.rcvif = ifp;
519      sc->rxMbuf[rxBdIndex] = m;
520      rxBd->buffer = mtod (m, void *);
521    }
522    else {
523      printk( "RxErr[%04X,%d]", status, rxBd->length );
524      /*
525       * Something went wrong with the reception
526       */
527      if (!(status & M8260_BD_LAST))
528        sc->rxNotLast++;
529      if (!(status & M8260_BD_FIRST_IN_FRAME))
530        sc->rxNotFirst++;
531
532      if (status & M8260_BD_LONG)
533        sc->rxGiant++;
534      if (status & M8260_BD_NONALIGNED)
535        sc->rxNonOctet++;
536      if (status & M8260_BD_ABORT)
537        sc->rxAbort++;
538      if (status & M8260_BD_CRC_ERROR)
539        sc->rxBadCRC++;
540      if (status & M8260_BD_OVERRUN)
541        sc->rxOverrun++;
542      if (status & M8260_BD_CARRIER_LOST)
543        sc->rxLostCarrier++;
544    }
545
546    /*
547     * Reenable the buffer descriptor
548     */
549    rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) |
550                    M8260_BD_EMPTY;
551
552    /*
553     * Move to next buffer descriptor
554     */
555    if (++rxBdIndex == sc->rxBdCount)
556      rxBdIndex = 0;
557  }
558}
559
560static void
561scc_sendpacket (struct ifnet *ifp, struct mbuf *m)
562{
563  struct m8260_hdlc_struct *sc = ifp->if_softc;
564  volatile m8260BufferDescriptor_t *firstTxBd, *txBd;
565  struct mbuf *l = NULL;
566  uint16_t         status;
567  int nAdded;
568
569  /*
570   * Free up buffer descriptors
571   */
572  m8260Enet_retire_tx_bd (sc);
573
574  /*
575   * Set up the transmit buffer descriptors.
576   * No need to pad out short packets since the
577   * hardware takes care of that automatically.
578   * No need to copy the packet to a contiguous buffer
579   * since the hardware is capable of scatter/gather DMA.
580   */
581  nAdded = 0;
582  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
583
584/*
585  m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
586*/
587
588  for (;;) {
589    /*
590     * Wait for buffer descriptor to become available.
591     */
592    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
593      /*
594       * Clear old events
595       */
596      m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
597
598      /*
599       * Wait for buffer descriptor to become available.
600       * Note that the buffer descriptors are checked
601       * *before* * entering the wait loop -- this catches
602       * the possibility that a buffer descriptor became
603       * available between the `if' above, and the clearing
604       * of the event register.
605       * This is to catch the case where the transmitter
606       * stops in the middle of a frame -- and only the
607       * last buffer descriptor in a frame can generate
608       * an interrupt.
609       */
610      m8260Enet_retire_tx_bd (sc);
611      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
612        rtems_event_set events;
613
614        /*
615         * Unmask TX (buffer transmitted) event
616         */
617        m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
618
619        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
620                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
621                                    RTEMS_NO_TIMEOUT,
622                                    &events);
623        m8260Enet_retire_tx_bd (sc);
624      }
625    }
626
627    /*
628     * Don't set the READY flag till the
629     * whole packet has been readied.
630     */
631    status = nAdded ? M8260_BD_READY : 0;
632
633    /*
634     *  FIXME: Why not deal with empty mbufs at at higher level?
635     * The IP fragmentation routine in ip_output
636     * can produce packet fragments with zero length.
637     * I think that ip_output should be changed to get
638     * rid of these zero-length mbufs, but for now,
639     * I'll deal with them here.
640     */
641    if (m->m_len) {
642      /*
643       * Fill in the buffer descriptor
644       */
645
646      txBd->buffer = mtod (m, void *);
647      txBd->length = m->m_len;
648
649      /*
650       * Flush the buffer for this descriptor
651       */
652
653      rtems_cache_flush_multiple_data_lines((void *)txBd->buffer, txBd->length);
654
655/* throw off the header for Ethernet Emulation mode */
656/*
657      txBd->buffer = mtod (m, void *);
658      txBd->buffer += sizeof( struct ether_header ) + 2;
659      txBd->length = m->m_len - sizeof( struct ether_header ) - 2;
660*/
661      sc->txMbuf[sc->txBdHead] = m;
662      nAdded++;
663      if (++sc->txBdHead == sc->txBdCount) {
664        status |= M8260_BD_WRAP;
665        sc->txBdHead = 0;
666      }
667      l = m;
668      m = m->m_next;
669    }
670    else {
671      /*
672       * Just toss empty mbufs
673       */
674      struct mbuf *n;
675      MFREE (m, n);
676      m = n;
677      if (l != NULL)
678        l->m_next = m;
679    }
680
681    /*
682     * Set the transmit buffer status.
683     * Break out of the loop if this mbuf is the last in the frame.
684     */
685    if (m == NULL) {
686      if (nAdded) {
687        status |= M8260_BD_LAST | M8260_BD_TX_CRC | M8260_BD_INTERRUPT;
688        txBd->status = status;
689        firstTxBd->status |= M8260_BD_READY;
690        sc->txBdActiveCount += nAdded;
691      }
692      break;
693    }
694    txBd->status = status;
695    txBd = sc->txBdBase + sc->txBdHead;
696  }
697}
698
699/*
700 * Driver transmit daemon
701 */
702void
703scc_txDaemon (void *arg)
704{
705  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
706  struct ifnet *ifp = &sc->ac_if;
707  struct mbuf *m;
708  rtems_event_set events;
709
710  for (;;) {
711    /*
712     * Wait for packet
713     */
714    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
715
716    /*
717     * Send packets till queue is empty
718     */
719    for (;;) {
720      /*
721       * Get the next mbuf chain to transmit.
722       */
723      IF_DEQUEUE(&ifp->if_snd, m);
724      if (!m)
725        break;
726
727      scc_sendpacket (ifp, m);
728
729    }
730    ifp->if_flags &= ~IFF_OACTIVE;
731  }
732}
733
734/*
735 * Send packet (caller provides header).
736 */
737static void
738m8260_hdlc_start (struct ifnet *ifp)
739{
740  struct m8260_hdlc_struct *sc = ifp->if_softc;
741
742  rtems_bsdnet_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
743  ifp->if_flags |= IFF_OACTIVE;
744}
745
746/*
747 * Initialize and start the device
748 */
749static void
750scc_init (void *arg)
751{
752  struct m8260_hdlc_struct *sc = arg;
753  struct ifnet *ifp = &sc->ac_if;
754
755  if (sc->txDaemonTid == 0) {
756
757    /*
758     * Set up SCC hardware
759     */
760    m8260_scc_initialize_hardware (sc);
761
762    /*
763     * Start driver tasks
764     */
765    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
766    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
767
768  }
769
770#if 0
771  /*
772   * Set flags appropriately
773   */
774  if (ifp->if_flags & IFF_PROMISC)
775    m8260.scc3.psmr |= 0x200;
776  else
777    m8260.scc3.psmr &= ~0x200;
778#endif
779
780  /*
781   * Tell the world that we're running.
782   */
783  ifp->if_flags |= IFF_RUNNING;
784
785  /*
786   * Enable receiver and transmitter
787   */
788  m8260.scc3.gsmr_l |= 0x30;
789}
790
791/*
792 * Stop the device
793 */
794static void
795scc_stop (struct m8260_hdlc_struct *sc)
796{
797  struct ifnet *ifp = &sc->ac_if;
798
799  ifp->if_flags &= ~IFF_RUNNING;
800
801  /*
802   * Shut down receiver and transmitter
803   */
804  m8260.scc3.gsmr_l &= ~0x30;
805}
806
807/*
808 * Show interface statistics
809 */
810static void
811hdlc_stats (struct m8260_hdlc_struct *sc)
812{
813  printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
814  printf ("              Giant:%-8lu", sc->rxGiant);
815  printf ("          Non-octet:%-8lu\n", sc->rxNonOctet);
816  printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
817  printf ("            Overrun:%-8lu", sc->rxOverrun);
818  printf ("         No Carrier:%-8lu\n", sc->rxLostCarrier);
819  printf ("          Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc);
820
821  printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
822  printf ("         No Carrier:%-8lu", sc->txLostCarrier);
823  printf ("           Underrun:%-8lu\n", sc->txUnderrun);
824  printf ("    Raw output wait:%-8lu\n", sc->txRawWait);
825}
826
827/*
828 * Driver ioctl handler
829 */
830static int
831scc_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
832{
833  struct m8260_hdlc_struct *sc = ifp->if_softc;
834  int error = 0;
835
836  switch (command) {
837  case SIOCGIFADDR:
838  case SIOCSIFADDR:
839    hdlc_ioctl (ifp, command, data);
840    break;
841
842  case SIOCSIFFLAGS:
843    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
844    case IFF_RUNNING:
845      scc_stop (sc);
846      break;
847
848    case IFF_UP:
849      scc_init (sc);
850      break;
851
852    case IFF_UP | IFF_RUNNING:
853      scc_stop (sc);
854      scc_init (sc);
855      break;
856
857    default:
858      break;
859    }
860    break;
861
862  case SIO_RTEMS_SHOW_STATS:
863    hdlc_stats (sc);
864    break;
865
866    /*
867     * FIXME: All sorts of multicast commands need to be added here!
868     */
869  default:
870    error = EINVAL;
871    break;
872  }
873  return error;
874}
875
876/*
877 * Attach an SCC driver to the system
878 */
879int
880rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config)
881{
882  struct m8260_hdlc_struct *sc;
883  struct ifnet *ifp;
884  int mtu;
885  int i;
886
887  /*
888   * Find a free driver
889   */
890  for (i = 0 ; i < NIFACES ; i++) {
891    sc = &hdlc_driver[i];
892    ifp = &sc->ac_if;
893    if (ifp->if_softc == NULL)
894      break;
895  }
896  if (i >= NIFACES) {
897    printf ("Too many SCC drivers.\n");
898    return 0;
899  }
900
901#if 0
902  /*
903   * Process options
904   */
905
906  if (config->hardware_address) {
907    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
908  }
909  else {
910    sc->arpcom.ac_enaddr[0] = 0x44;
911    sc->arpcom.ac_enaddr[1] = 0x22;
912    sc->arpcom.ac_enaddr[2] = 0x33;
913    sc->arpcom.ac_enaddr[3] = 0x33;
914    sc->arpcom.ac_enaddr[4] = 0x22;
915    sc->arpcom.ac_enaddr[5] = 0x44;
916  }
917#endif
918
919  if (config->mtu)
920    mtu = config->mtu;
921  else
922    mtu = ETHERMTU;
923  if (config->rbuf_count)
924    sc->rxBdCount = config->rbuf_count;
925  else
926    sc->rxBdCount = RX_BUF_COUNT;
927  if (config->xbuf_count)
928    sc->txBdCount = config->xbuf_count;
929  else
930    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
931  sc->acceptBroadcast = !config->ignore_broadcast;
932
933  /*
934   * Set up network interface values
935   */
936  ifp->if_softc = sc;
937  ifp->if_unit = i + 1;
938  ifp->if_name = "eth";
939  ifp->if_mtu = mtu;
940  ifp->if_init = scc_init;
941  ifp->if_ioctl = scc_ioctl;
942  ifp->if_start = m8260_hdlc_start;
943  ifp->if_output = hdlc_output;
944  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP;
945  if (ifp->if_snd.ifq_maxlen == 0)
946    ifp->if_snd.ifq_maxlen = ifqmaxlen;
947
948  /*
949   * Attach the interface
950   */
951  if_attach (ifp);
952  hdlc_ifattach (ifp);
953  return 1;
954};
955
956int
957rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
958{
959  return rtems_scc3_driver_attach( config );
960
961/*
962  if ((m8260.fec.mii_data & 0xffff) == 0x2000) {
963    return rtems_fec_driver_attach(config);
964  }
965  else {
966    return rtems_scc1_driver_attach(config);
967  }
968*/
969}
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