source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c @ 26e90fb1

4.115
Last change on this file since 26e90fb1 was 26e90fb1, checked in by Sebastian Huber <sebastian.huber@…>, on 10/30/12 at 16:42:17

libnetworking: Use system events

Add reserved system events RTEMS_EVENT_SYSTEM_NETWORK_SBWAIT and
RTEMS_EVENT_SYSTEM_NETWORK_SOSLEEP.

Add and use rtems_bsdnet_event_send().

  • Property mode set to 100644
File size: 23.4 KB
Line 
1/*
2 * RTEMS/TCPIP driver for MPC8260 SCC
3 *
4 * Modified for MPC8260 by Andy Dachs <a.dachs@sstl.co.uk>
5 * Surrey Satellite Technology Limited
6 *
7 *   On the ADS board the ethernet interface is connected to FCC2
8 *   but in my application I want TCP over HDLC (see README)
9 *   so will use SCC3 as the network interface. I have other plans
10 *   for the FCCs so am unlikely to add true ethernet support to
11 *   this BSP.  Contributions welcome!
12 *
13 * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com)
14 *
15 *  This supports ethernet on either SCC1 or the FEC of the MPC860T.
16 *  Right now, we only do 10 Mbps, even with the FEC. The function
17 *  rtems_m860_enet_driver_attach determines which one to use. Currently,
18 *  only one may be used at a time.
19 *
20 * W. Eric Norum
21 * Saskatchewan Accelerator Laboratory
22 * University of Saskatchewan
23 * Saskatoon, Saskatchewan, CANADA
24 * eric@skatter.usask.ca
25 */
26#include <bsp.h>
27#include <bsp/irq.h>
28#include <mpc8260.h>
29#include <mpc8260/cpm.h>
30#include <stdio.h>
31#include <rtems/error.h>
32#include <rtems/rtems_bsdnet.h>
33#include <rtems/bspIo.h>
34
35#include <sys/param.h>
36#include <sys/mbuf.h>
37#include <sys/socket.h>
38#include <sys/sockio.h>
39#include <errno.h>
40
41#include <net/if.h>
42
43#include <netinet/in.h>
44#include <netinet/if_ether.h>
45
46#include "if_hdlcsubr.h"
47
48/*
49 * Number of interfaces supported by this driver
50 */
51#define NIFACES 1
52
53/*
54 * Default number of buffer descriptors set aside for this driver.
55 * The number of transmit buffer descriptors has to be quite large
56 * since a single frame often uses four or more buffer descriptors.
57 */
58#define RX_BUF_COUNT     32
59#define TX_BUF_COUNT     8
60#define TX_BD_PER_BUF    4
61
62#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
63
64extern void m8xx_dump_brgs( void );
65
66/*
67 * RTEMS event used by interrupt handler to signal daemons.
68 * This must *not* be the same event used by the TCP/IP task synchronization.
69 */
70#define INTERRUPT_EVENT RTEMS_EVENT_1
71
72/*
73 * RTEMS event used to start transmit daemon.
74 * This must not be the same as INTERRUPT_EVENT.
75 */
76#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
77
78/*
79 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
80 * Round off to nearest multiple of RBUF_ALIGN.
81 */
82#define MAX_MTU_SIZE    1518
83/*#define MAX_MTU_SIZE  2050*/
84#define RBUF_ALIGN      4
85#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
86
87#if (MCLBYTES < RBUF_SIZE)
88# error "Driver must have MCLBYTES > RBUF_SIZE"
89#endif
90
91/*
92 * Per-device data
93 */
94struct m8260_hdlc_struct {
95        struct ifnet            ac_if;
96        struct mbuf             **rxMbuf;
97        struct mbuf             **txMbuf;
98        int                     acceptBroadcast;
99        int                     rxBdCount;
100        int                     txBdCount;
101        int                     txBdHead;
102        int                     txBdTail;
103        int                     txBdActiveCount;
104        m8260BufferDescriptor_t  *rxBdBase;
105        m8260BufferDescriptor_t  *txBdBase;
106        rtems_id                rxDaemonTid;
107        rtems_id                txDaemonTid;
108
109        /*
110         * Statistics
111         */
112        unsigned long   rxNotFirst;
113        unsigned long   rxNotLast;
114        unsigned long   rxInterrupts;
115        unsigned long   rxGiant;
116        unsigned long   rxNonOctet;
117        unsigned long   rxAbort;
118        unsigned long   rxBadCRC;
119        unsigned long   rxOverrun;
120        unsigned long   rxLostCarrier;
121        unsigned long   txInterrupts;
122        unsigned long   txUnderrun;
123        unsigned long   txLostCarrier;
124        unsigned long   txRawWait;
125};
126static struct m8260_hdlc_struct hdlc_driver[NIFACES];
127
128static void  m8xx_scc3_hdlc_on(const rtems_irq_connect_data* ptr)
129{
130}
131
132static void  m8xx_scc3_hdlc_off(const rtems_irq_connect_data* ptr)
133{
134  /*
135   * Please put relevant code there
136   */
137}
138
139static int  m8xx_scc3_hdlc_isOn(const rtems_irq_connect_data* ptr)
140{
141  return BSP_irq_enabled_at_cpm (ptr->name);
142}
143
144/*
145 * SCC interrupt handler
146 * TBD: Can we work out which SCC generated the interrupt from the
147 *      value of v? If so we can use the same handler for multiple
148 *      SCCs.
149 */
150static void
151m8xx_scc3_interrupt_handler (rtems_irq_hdl_param unused)
152{
153  /*
154   * Frame received?
155   */
156  if ((m8260.scc3.sccm & M8260_SCCE_RXF) &&
157      (m8260.scc3.scce & M8260_SCCE_RXF) ) {
158    m8260.scc3.scce = M8260_SCCE_RXF;
159/*    m8260.scc3.sccm &= ~M8260_SCCE_RXF; */
160    hdlc_driver[0].rxInterrupts++;
161    rtems_bsdnet_event_send (hdlc_driver[0].rxDaemonTid, INTERRUPT_EVENT);
162/*
163    printk( "Rx " );
164*/
165  }
166
167  /*
168   * Buffer transmitted or transmitter error?
169   */
170  if ((m8260.scc3.sccm & (M8260_SCCE_TX | M8260_SCCE_TXE) ) &&
171      (m8260.scc3.scce & (M8260_SCCE_TX | M8260_SCCE_TXE) )) {
172    m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
173/*    m8260.scc3.sccm &= ~(M8260_SCCE_TX | M8260_SCCE_TXE); */
174    hdlc_driver[0].txInterrupts++;
175    rtems_bsdnet_event_send (hdlc_driver[0].txDaemonTid, INTERRUPT_EVENT);
176/*
177    printk( "Tx " );
178*/
179  }
180
181#if 0
182  m8260.sipnr_l = M8260_SIMASK_SCC3; /* Clear SCC3 interrupt-in-service bit */
183#endif
184}
185
186static rtems_irq_connect_data hdlcSCC3IrqData = {
187  BSP_CPM_IRQ_SCC3,
188  (rtems_irq_hdl) m8xx_scc3_interrupt_handler,
189  NULL,
190  (rtems_irq_enable) m8xx_scc3_hdlc_on,
191  (rtems_irq_disable) m8xx_scc3_hdlc_off,
192  (rtems_irq_is_enabled)m8xx_scc3_hdlc_isOn
193};
194
195/*
196 * Initialize the SCC hardware
197 * Configure I/O ports for SCC3
198 * Internal Tx clock, External Rx clock
199 */
200static void
201m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc)
202{
203  int i;
204  int brg;
205
206  rtems_status_code status;
207
208  /* RxD PB14 */
209  m8260.pparb |=  0x00020000;
210  m8260.psorb &= ~0x00020000;
211  m8260.pdirb &= ~0x00020000;
212
213  /* RxC (CLK5) PC27 */
214  m8260.pparc |=  0x00000010;
215  m8260.psorc &= ~0x00000010;
216  m8260.pdirc &= ~0x00000010;
217
218  /* TxD PD24 and TxC PD10 (BRG4) */
219  m8260.ppard |=  0x00200080;
220  m8260.psord |=  0x00200000;
221  m8260.psord &= ~0x00000080;
222  m8260.pdird |=  0x00200080;
223
224  /* External Rx Clock from CLK5 */
225  if( m8xx_get_clk( M8xx_CLK_5 ) == -1 )
226    printk( "Error allocating CLK5 for network device.\n" );
227  else
228    m8260.cmxscr |= 0x00002000;
229
230  /* Internal Tx Clock from BRG4 */
231  if( (brg = m8xx_get_brg(M8xx_BRG_4, 8000000 )) == -1 )
232    printk( "Error allocating BRG for network device\n" );
233  else
234    m8260.cmxscr |= ((unsigned)brg << 8);
235
236  /*
237   * Allocate mbuf pointers
238   */
239  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf,
240                       M_MBUF, M_NOWAIT);
241  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf,
242                       M_MBUF, M_NOWAIT);
243  if (!sc->rxMbuf || !sc->txMbuf)
244    rtems_panic ("No memory for mbuf pointers");
245
246  /*
247   * Set receiver and transmitter buffer descriptor bases
248   */
249  sc->rxBdBase = m8xx_bd_allocate (sc->rxBdCount);
250  sc->txBdBase = m8xx_bd_allocate (sc->txBdCount);
251
252  m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260;
253  m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260;
254
255  /*
256   * Send "Init parameters" command
257   */
258
259  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
260
261  /*
262   * Set receive and transmit function codes
263   */
264  m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS;
265  m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS;
266
267  /*
268   * Set maximum receive buffer length
269   */
270  m8260.scc3p.mrblr = RBUF_SIZE;
271
272  m8260.scc3p.un.hdlc.c_mask = 0xF0B8;
273  m8260.scc3p.un.hdlc.c_pres = 0xFFFF;
274  m8260.scc3p.un.hdlc.disfc  = 0;
275  m8260.scc3p.un.hdlc.crcec  = 0;
276  m8260.scc3p.un.hdlc.abtsc  = 0;
277  m8260.scc3p.un.hdlc.nmarc  = 0;
278  m8260.scc3p.un.hdlc.retrc  = 0;
279  m8260.scc3p.un.hdlc.rfthr  = 1;
280  m8260.scc3p.un.hdlc.mflr   = RBUF_SIZE;
281
282  m8260.scc3p.un.hdlc.hmask  = 0x0000;  /* promiscuous */
283
284  m8260.scc3p.un.hdlc.haddr1 = 0xFFFF;  /* Broadcast address */
285  m8260.scc3p.un.hdlc.haddr2 = 0xFFFF;  /* Station address */
286  m8260.scc3p.un.hdlc.haddr3 = 0xFFFF;  /* Dummy */
287  m8260.scc3p.un.hdlc.haddr4 = 0xFFFF;  /* Dummy */
288
289  /*
290   * Send "Init parameters" command
291   */
292/*
293  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
294*/
295
296  /*
297   * Set up receive buffer descriptors
298   */
299  for (i = 0 ; i < sc->rxBdCount ; i++) {
300    (sc->rxBdBase + i)->status = 0;
301  }
302
303  /*
304   * Set up transmit buffer descriptors
305   */
306  for (i = 0 ; i < sc->txBdCount ; i++) {
307    (sc->txBdBase + i)->status = 0;
308    sc->txMbuf[i] = NULL;
309  }
310  sc->txBdHead = sc->txBdTail = 0;
311  sc->txBdActiveCount = 0;
312
313  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
314
315  /*
316   * Clear any outstanding events
317   */
318  m8260.scc3.scce = 0xFFFF;
319
320  /*
321   * Set up interrupts
322   */
323  status = BSP_install_rtems_irq_handler (&hdlcSCC3IrqData);
324/*
325  printk( "status = %d, Success = %d\n", status, RTEMS_SUCCESSFUL );
326*/
327  if (status != 1 /*RTEMS_SUCCESSFUL*/ ) {
328    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
329                 rtems_status_text (status));
330  }
331  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
332
333  m8260.scc3.gsmr_h  = 0;
334  m8260.scc3.gsmr_l  = 0x10000000;
335  m8260.scc3.dsr     = 0x7E7E;  /* flag character */
336  m8260.scc3.psmr    = 0x2000;  /* 2 flags between Tx'd frames */
337
338/*  printk("scc3 init\n" ); */
339
340  m8260.scc3.gsmr_l |=  0x00000030;  /* Set ENR and ENT to enable Rx and Tx */
341
342}
343
344/*
345 * Soak up buffer descriptors that have been sent
346 * Note that a buffer descriptor can't be retired as soon as it becomes
347 * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
348 *  made up of multiple buffers, the user should not reuse the first buffer
349 * descriptor until the last buffer descriptor of the frame has had its
350 * ready bit cleared by the CPM".
351 */
352static void
353m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc)
354{
355  uint16_t         status;
356  int i;
357  int nRetired;
358  struct mbuf *m, *n;
359
360  i = sc->txBdTail;
361  nRetired = 0;
362  while ((sc->txBdActiveCount != 0)
363         &&  (((status = (sc->txBdBase + i)->status) & M8260_BD_READY) == 0)) {
364    /*
365     * See if anything went wrong
366     */
367    if (status & (M8260_BD_UNDERRUN |
368                  M8260_BD_CTS_LOST)) {
369      /*
370       * Check for errors which stop the transmitter.
371       */
372      if( status & M8260_BD_UNDERRUN ) {
373          hdlc_driver[0].txUnderrun++;
374
375        /*
376         * Restart the transmitter
377         */
378        /* FIXME: this should get executed only if using the SCC */
379        m8xx_cp_execute_cmd (M8260_CR_OP_RESTART_TX | M8260_CR_SCC3);
380      }
381      if (status & M8260_BD_CTS_LOST)
382        hdlc_driver[0].txLostCarrier++;
383    }
384    nRetired++;
385    if (status & M8260_BD_LAST) {
386      /*
387       * A full frame has been transmitted.
388       * Free all the associated buffer descriptors.
389       */
390      sc->txBdActiveCount -= nRetired;
391      while (nRetired) {
392        nRetired--;
393        m = sc->txMbuf[sc->txBdTail];
394        MFREE (m, n);
395        if (++sc->txBdTail == sc->txBdCount)
396          sc->txBdTail = 0;
397      }
398    }
399    if (++i == sc->txBdCount)
400      i = 0;
401  }
402}
403
404/*
405 * reader task
406 */
407static void
408scc_rxDaemon (void *arg)
409{
410  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
411  struct ifnet *ifp = &sc->ac_if;
412  struct mbuf *m;
413  uint16_t         status;
414  m8260BufferDescriptor_t *rxBd;
415  int rxBdIndex;
416
417  /*
418   * Allocate space for incoming packets and start reception
419   */
420  for (rxBdIndex = 0 ; ;) {
421    rxBd = sc->rxBdBase + rxBdIndex;
422    MGETHDR (m, M_WAIT, MT_DATA);
423    MCLGET (m, M_WAIT);
424    m->m_pkthdr.rcvif = ifp;
425    sc->rxMbuf[rxBdIndex] = m;
426    rxBd->buffer = mtod (m, void *);
427    rxBd->status = M8260_BD_EMPTY | M8260_BD_INTERRUPT;
428    if (++rxBdIndex == sc->rxBdCount) {
429      rxBd->status |= M8260_BD_WRAP;
430      break;
431    }
432  }
433
434/*
435  m8260.scc3.sccm |= M8260_SCCE_RXF;
436*/
437
438  /*
439   * Input packet handling loop
440   */
441  rxBdIndex = 0;
442  for (;;) {
443    rxBd = sc->rxBdBase + rxBdIndex;
444
445    /*
446     * Wait for packet if there's not one ready
447     */
448    if ((status = rxBd->status) & M8260_BD_EMPTY) {
449      /*
450       * Clear old events
451       */
452
453      m8260.scc3.scce = M8260_SCCE_RXF;
454
455      /*
456       * Wait for packet
457       * Note that the buffer descriptor is checked
458       * *before* the event wait -- this catches the
459       * possibility that a packet arrived between the
460       * `if' above, and the clearing of the event register.
461       */
462      while ((status = rxBd->status) & M8260_BD_EMPTY) {
463        rtems_event_set events;
464
465        /*
466         * Unmask RXF (Full frame received) event
467         */
468        m8260.scc3.sccm |= M8260_SCCE_RXF;
469
470/*        printk( "Rxdwait "); */
471
472        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
473                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
474                                    RTEMS_NO_TIMEOUT,
475                                    &events);
476
477/*        printk( "Rxd " ); */
478      }
479    }
480
481    /*
482     * Check that packet is valid
483     */
484    if ((status & (M8260_BD_LAST |
485                   M8260_BD_FIRST_IN_FRAME |
486                   M8260_BD_LONG |
487                   M8260_BD_NONALIGNED |
488                   M8260_BD_ABORT |
489                   M8260_BD_CRC_ERROR |
490                   M8260_BD_OVERRUN /*|
491                   M8260_BD_CARRIER_LOST*/)) ==
492                   (M8260_BD_LAST |
493                   M8260_BD_FIRST_IN_FRAME ) ) {
494
495/*      printk( "RxV " ); */
496
497/*
498 * Invalidate the buffer for this descriptor
499 */
500
501      rtems_cache_invalidate_multiple_data_lines((void *)rxBd->buffer, rxBd->length);
502
503      m = sc->rxMbuf[rxBdIndex];
504
505      /* strip off HDLC CRC */
506      m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint16_t);
507
508      hdlc_input( ifp, m );
509
510      /*
511       * Allocate a new mbuf
512       */
513      MGETHDR (m, M_WAIT, MT_DATA);
514      MCLGET (m, M_WAIT);
515      m->m_pkthdr.rcvif = ifp;
516      sc->rxMbuf[rxBdIndex] = m;
517      rxBd->buffer = mtod (m, void *);
518    }
519    else {
520      printk( "RxErr[%04X,%d]", status, rxBd->length );
521      /*
522       * Something went wrong with the reception
523       */
524      if (!(status & M8260_BD_LAST))
525        sc->rxNotLast++;
526      if (!(status & M8260_BD_FIRST_IN_FRAME))
527        sc->rxNotFirst++;
528
529      if (status & M8260_BD_LONG)
530        sc->rxGiant++;
531      if (status & M8260_BD_NONALIGNED)
532        sc->rxNonOctet++;
533      if (status & M8260_BD_ABORT)
534        sc->rxAbort++;
535      if (status & M8260_BD_CRC_ERROR)
536        sc->rxBadCRC++;
537      if (status & M8260_BD_OVERRUN)
538        sc->rxOverrun++;
539      if (status & M8260_BD_CARRIER_LOST)
540        sc->rxLostCarrier++;
541    }
542
543    /*
544     * Reenable the buffer descriptor
545     */
546    rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) |
547                    M8260_BD_EMPTY;
548
549    /*
550     * Move to next buffer descriptor
551     */
552    if (++rxBdIndex == sc->rxBdCount)
553      rxBdIndex = 0;
554  }
555}
556
557static void
558scc_sendpacket (struct ifnet *ifp, struct mbuf *m)
559{
560  struct m8260_hdlc_struct *sc = ifp->if_softc;
561  volatile m8260BufferDescriptor_t *firstTxBd, *txBd;
562  struct mbuf *l = NULL;
563  uint16_t         status;
564  int nAdded;
565
566  /*
567   * Free up buffer descriptors
568   */
569  m8260Enet_retire_tx_bd (sc);
570
571  /*
572   * Set up the transmit buffer descriptors.
573   * No need to pad out short packets since the
574   * hardware takes care of that automatically.
575   * No need to copy the packet to a contiguous buffer
576   * since the hardware is capable of scatter/gather DMA.
577   */
578  nAdded = 0;
579  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
580
581/*
582  m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
583*/
584
585  for (;;) {
586    /*
587     * Wait for buffer descriptor to become available.
588     */
589    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
590      /*
591       * Clear old events
592       */
593      m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
594
595      /*
596       * Wait for buffer descriptor to become available.
597       * Note that the buffer descriptors are checked
598       * *before* * entering the wait loop -- this catches
599       * the possibility that a buffer descriptor became
600       * available between the `if' above, and the clearing
601       * of the event register.
602       * This is to catch the case where the transmitter
603       * stops in the middle of a frame -- and only the
604       * last buffer descriptor in a frame can generate
605       * an interrupt.
606       */
607      m8260Enet_retire_tx_bd (sc);
608      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
609        rtems_event_set events;
610
611        /*
612         * Unmask TX (buffer transmitted) event
613         */
614        m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
615
616        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
617                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
618                                    RTEMS_NO_TIMEOUT,
619                                    &events);
620        m8260Enet_retire_tx_bd (sc);
621      }
622    }
623
624    /*
625     * Don't set the READY flag till the
626     * whole packet has been readied.
627     */
628    status = nAdded ? M8260_BD_READY : 0;
629
630    /*
631     *  FIXME: Why not deal with empty mbufs at at higher level?
632     * The IP fragmentation routine in ip_output
633     * can produce packet fragments with zero length.
634     * I think that ip_output should be changed to get
635     * rid of these zero-length mbufs, but for now,
636     * I'll deal with them here.
637     */
638    if (m->m_len) {
639      /*
640       * Fill in the buffer descriptor
641       */
642
643      txBd->buffer = mtod (m, void *);
644      txBd->length = m->m_len;
645
646      /*
647       * Flush the buffer for this descriptor
648       */
649
650      rtems_cache_flush_multiple_data_lines((void *)txBd->buffer, txBd->length);
651
652/* throw off the header for Ethernet Emulation mode */
653/*
654      txBd->buffer = mtod (m, void *);
655      txBd->buffer += sizeof( struct ether_header ) + 2;
656      txBd->length = m->m_len - sizeof( struct ether_header ) - 2;
657*/
658      sc->txMbuf[sc->txBdHead] = m;
659      nAdded++;
660      if (++sc->txBdHead == sc->txBdCount) {
661        status |= M8260_BD_WRAP;
662        sc->txBdHead = 0;
663      }
664      l = m;
665      m = m->m_next;
666    }
667    else {
668      /*
669       * Just toss empty mbufs
670       */
671      struct mbuf *n;
672      MFREE (m, n);
673      m = n;
674      if (l != NULL)
675        l->m_next = m;
676    }
677
678    /*
679     * Set the transmit buffer status.
680     * Break out of the loop if this mbuf is the last in the frame.
681     */
682    if (m == NULL) {
683      if (nAdded) {
684        status |= M8260_BD_LAST | M8260_BD_TX_CRC | M8260_BD_INTERRUPT;
685        txBd->status = status;
686        firstTxBd->status |= M8260_BD_READY;
687        sc->txBdActiveCount += nAdded;
688      }
689      break;
690    }
691    txBd->status = status;
692    txBd = sc->txBdBase + sc->txBdHead;
693  }
694}
695
696/*
697 * Driver transmit daemon
698 */
699void
700scc_txDaemon (void *arg)
701{
702  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
703  struct ifnet *ifp = &sc->ac_if;
704  struct mbuf *m;
705  rtems_event_set events;
706
707  for (;;) {
708    /*
709     * Wait for packet
710     */
711    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
712
713    /*
714     * Send packets till queue is empty
715     */
716    for (;;) {
717      /*
718       * Get the next mbuf chain to transmit.
719       */
720      IF_DEQUEUE(&ifp->if_snd, m);
721      if (!m)
722        break;
723
724      scc_sendpacket (ifp, m);
725
726    }
727    ifp->if_flags &= ~IFF_OACTIVE;
728  }
729}
730
731/*
732 * Send packet (caller provides header).
733 */
734static void
735m8260_hdlc_start (struct ifnet *ifp)
736{
737  struct m8260_hdlc_struct *sc = ifp->if_softc;
738
739  rtems_bsdnet_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
740  ifp->if_flags |= IFF_OACTIVE;
741}
742
743/*
744 * Initialize and start the device
745 */
746static void
747scc_init (void *arg)
748{
749  struct m8260_hdlc_struct *sc = arg;
750  struct ifnet *ifp = &sc->ac_if;
751
752  if (sc->txDaemonTid == 0) {
753
754    /*
755     * Set up SCC hardware
756     */
757    m8260_scc_initialize_hardware (sc);
758
759    /*
760     * Start driver tasks
761     */
762    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
763    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
764
765  }
766
767#if 0
768  /*
769   * Set flags appropriately
770   */
771  if (ifp->if_flags & IFF_PROMISC)
772    m8260.scc3.psmr |= 0x200;
773  else
774    m8260.scc3.psmr &= ~0x200;
775#endif
776
777  /*
778   * Tell the world that we're running.
779   */
780  ifp->if_flags |= IFF_RUNNING;
781
782  /*
783   * Enable receiver and transmitter
784   */
785  m8260.scc3.gsmr_l |= 0x30;
786}
787
788/*
789 * Stop the device
790 */
791static void
792scc_stop (struct m8260_hdlc_struct *sc)
793{
794  struct ifnet *ifp = &sc->ac_if;
795
796  ifp->if_flags &= ~IFF_RUNNING;
797
798  /*
799   * Shut down receiver and transmitter
800   */
801  m8260.scc3.gsmr_l &= ~0x30;
802}
803
804/*
805 * Show interface statistics
806 */
807static void
808hdlc_stats (struct m8260_hdlc_struct *sc)
809{
810  printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
811  printf ("              Giant:%-8lu", sc->rxGiant);
812  printf ("          Non-octet:%-8lu\n", sc->rxNonOctet);
813  printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
814  printf ("            Overrun:%-8lu", sc->rxOverrun);
815  printf ("         No Carrier:%-8lu\n", sc->rxLostCarrier);
816  printf ("          Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc);
817
818  printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
819  printf ("         No Carrier:%-8lu", sc->txLostCarrier);
820  printf ("           Underrun:%-8lu\n", sc->txUnderrun);
821  printf ("    Raw output wait:%-8lu\n", sc->txRawWait);
822}
823
824/*
825 * Driver ioctl handler
826 */
827static int
828scc_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
829{
830  struct m8260_hdlc_struct *sc = ifp->if_softc;
831  int error = 0;
832
833  switch (command) {
834  case SIOCGIFADDR:
835  case SIOCSIFADDR:
836    hdlc_ioctl (ifp, command, data);
837    break;
838
839  case SIOCSIFFLAGS:
840    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
841    case IFF_RUNNING:
842      scc_stop (sc);
843      break;
844
845    case IFF_UP:
846      scc_init (sc);
847      break;
848
849    case IFF_UP | IFF_RUNNING:
850      scc_stop (sc);
851      scc_init (sc);
852      break;
853
854    default:
855      break;
856    }
857    break;
858
859  case SIO_RTEMS_SHOW_STATS:
860    hdlc_stats (sc);
861    break;
862
863    /*
864     * FIXME: All sorts of multicast commands need to be added here!
865     */
866  default:
867    error = EINVAL;
868    break;
869  }
870  return error;
871}
872
873/*
874 * Attach an SCC driver to the system
875 */
876int
877rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config)
878{
879  struct m8260_hdlc_struct *sc;
880  struct ifnet *ifp;
881  int mtu;
882  int i;
883
884  /*
885   * Find a free driver
886   */
887  for (i = 0 ; i < NIFACES ; i++) {
888    sc = &hdlc_driver[i];
889    ifp = &sc->ac_if;
890    if (ifp->if_softc == NULL)
891      break;
892  }
893  if (i >= NIFACES) {
894    printf ("Too many SCC drivers.\n");
895    return 0;
896  }
897
898#if 0
899  /*
900   * Process options
901   */
902
903  if (config->hardware_address) {
904    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
905  }
906  else {
907    sc->arpcom.ac_enaddr[0] = 0x44;
908    sc->arpcom.ac_enaddr[1] = 0x22;
909    sc->arpcom.ac_enaddr[2] = 0x33;
910    sc->arpcom.ac_enaddr[3] = 0x33;
911    sc->arpcom.ac_enaddr[4] = 0x22;
912    sc->arpcom.ac_enaddr[5] = 0x44;
913  }
914#endif
915
916  if (config->mtu)
917    mtu = config->mtu;
918  else
919    mtu = ETHERMTU;
920  if (config->rbuf_count)
921    sc->rxBdCount = config->rbuf_count;
922  else
923    sc->rxBdCount = RX_BUF_COUNT;
924  if (config->xbuf_count)
925    sc->txBdCount = config->xbuf_count;
926  else
927    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
928  sc->acceptBroadcast = !config->ignore_broadcast;
929
930  /*
931   * Set up network interface values
932   */
933  ifp->if_softc = sc;
934  ifp->if_unit = i + 1;
935  ifp->if_name = "eth";
936  ifp->if_mtu = mtu;
937  ifp->if_init = scc_init;
938  ifp->if_ioctl = scc_ioctl;
939  ifp->if_start = m8260_hdlc_start;
940  ifp->if_output = hdlc_output;
941  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP;
942  if (ifp->if_snd.ifq_maxlen == 0)
943    ifp->if_snd.ifq_maxlen = ifqmaxlen;
944
945  /*
946   * Attach the interface
947   */
948  if_attach (ifp);
949  hdlc_ifattach (ifp);
950  return 1;
951};
952
953int
954rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
955{
956  return rtems_scc3_driver_attach( config );
957
958/*
959  if ((m8260.fec.mii_data & 0xffff) == 0x2000) {
960    return rtems_fec_driver_attach(config);
961  }
962  else {
963    return rtems_scc1_driver_attach(config);
964  }
965*/
966}
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