source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c @ 1628414

4.104.114.84.95
Last change on this file since 1628414 was 1628414, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 18, 2002 at 8:55:01 PM

2002-04-18 Ralf Corsepius <corsepiu@…>

  • irq/irq.c: Reflect changes to <rtems/score/cpu.h>.
  • irq/irq_asm.S: Ditto.
  • network/network.c: Include <rtems/bspIo.h>.
  • start/start.S: Include <asm.h> instead of "asm.h".
  • vectors/vectors.S: Reflect changes to <rtems/score/cpu.h>.
  • Property mode set to 100644
File size: 24.0 KB
Line 
1/*
2 * RTEMS/TCPIP driver for MPC8260 SCC
3 *
4 * Modified for MPC8260 by Andy Dachs <a.dachs@sstl.co.uk>
5 * Surrey Satellite Technology Limited
6 *
7 *   On the ADS board the ethernet interface is connected to FCC2
8 *   but in my application I want TCP over HDLC (see README)
9 *   so will use SCC3 as the network interface. I have other plans
10 *   for the FCCs so am unlikely to add true ethernet support to
11 *   this BSP.  Contributions welcome!
12 *
13 * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com)
14 *
15 *  This supports ethernet on either SCC1 or the FEC of the MPC860T.
16 *  Right now, we only do 10 Mbps, even with the FEC. The function
17 *  rtems_m860_enet_driver_attach determines which one to use. Currently,
18 *  only one may be used at a time.
19 *
20 * W. Eric Norum
21 * Saskatchewan Accelerator Laboratory
22 * University of Saskatchewan
23 * Saskatoon, Saskatchewan, CANADA
24 * eric@skatter.usask.ca
25 *
26 *  $Id$
27 */
28#include <bsp.h>
29#include <bsp/irq.h>
30#include <mpc8260.h>
31#include <mpc8260/cpm.h>
32#include <stdio.h>
33#include <rtems/error.h>
34#include <rtems/rtems_bsdnet.h>
35#include <rtems/bspIo.h>
36
37#include <sys/param.h>
38#include <sys/mbuf.h>
39#include <sys/socket.h>
40#include <sys/sockio.h>
41
42#include <net/if.h>
43
44#include <netinet/in.h>
45#include <netinet/if_ether.h>
46
47#include "if_hdlcsubr.h"
48
49/*
50 * Number of interfaces supported by this driver
51 */
52#define NIFACES 1
53
54/*
55 * Default number of buffer descriptors set aside for this driver.
56 * The number of transmit buffer descriptors has to be quite large
57 * since a single frame often uses four or more buffer descriptors.
58 */
59#define RX_BUF_COUNT     32
60#define TX_BUF_COUNT     8
61#define TX_BD_PER_BUF    4
62
63#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
64
65
66extern void m8xx_dump_brgs( void );
67
68/*
69 * RTEMS event used by interrupt handler to signal daemons.
70 * This must *not* be the same event used by the TCP/IP task synchronization.
71 */
72#define INTERRUPT_EVENT RTEMS_EVENT_1
73
74/*
75 * RTEMS event used to start transmit daemon.
76 * This must not be the same as INTERRUPT_EVENT.
77 */
78#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
79
80
81/*
82 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
83 * Round off to nearest multiple of RBUF_ALIGN.
84 */
85#define MAX_MTU_SIZE    1518
86/*#define MAX_MTU_SIZE  2050*/
87#define RBUF_ALIGN      4
88#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
89
90#if (MCLBYTES < RBUF_SIZE)
91# error "Driver must have MCLBYTES > RBUF_SIZE"
92#endif
93
94/*
95 * Per-device data
96 */
97struct m8260_hdlc_struct {
98        struct ifnet            ac_if;
99        struct mbuf             **rxMbuf;
100        struct mbuf             **txMbuf;
101        int                     acceptBroadcast;
102        int                     rxBdCount;
103        int                     txBdCount;
104        int                     txBdHead;
105        int                     txBdTail;
106        int                     txBdActiveCount;
107        m8260BufferDescriptor_t  *rxBdBase;
108        m8260BufferDescriptor_t  *txBdBase;
109        rtems_id                rxDaemonTid;
110        rtems_id                txDaemonTid;
111
112        /*
113         * Statistics
114         */
115        unsigned long   rxNotFirst;
116        unsigned long   rxNotLast;
117        unsigned long   rxInterrupts;
118        unsigned long   rxGiant;
119        unsigned long   rxNonOctet;
120        unsigned long   rxAbort;
121        unsigned long   rxBadCRC;
122        unsigned long   rxOverrun;
123        unsigned long   rxLostCarrier;
124        unsigned long   txInterrupts;
125        unsigned long   txUnderrun;
126        unsigned long   txLostCarrier;
127        unsigned long   txRawWait;
128};
129static struct m8260_hdlc_struct hdlc_driver[NIFACES];
130
131
132static void  m8xx_scc3_hdlc_on(const rtems_irq_connect_data* ptr)
133{
134}
135
136static void  m8xx_scc3_hdlc_off(const rtems_irq_connect_data* ptr)
137{
138  /*
139   * Please put relevant code there
140   */
141}
142
143static int  m8xx_scc3_hdlc_isOn(const rtems_irq_connect_data* ptr)
144{
145  return BSP_irq_enabled_at_cpm (ptr->name);
146}
147
148/*
149 * SCC interrupt handler
150 * TBD: Can we work out which SCC generated the interrupt from the
151 *      value of v? If so we can use the same handler for multiple
152 *      SCCs.
153 */
154static void
155m8xx_scc3_interrupt_handler ()
156{
157  /*
158   * Frame received?
159   */
160  if ((m8260.scc3.sccm & M8260_SCCE_RXF) &&
161      (m8260.scc3.scce & M8260_SCCE_RXF) ) {
162    m8260.scc3.scce = M8260_SCCE_RXF;
163/*    m8260.scc3.sccm &= ~M8260_SCCE_RXF; */
164    hdlc_driver[0].rxInterrupts++;
165    rtems_event_send (hdlc_driver[0].rxDaemonTid, INTERRUPT_EVENT);
166/*
167    printk( "Rx " );
168*/
169  }
170
171  /*
172   * Buffer transmitted or transmitter error?
173   */
174  if ((m8260.scc3.sccm & (M8260_SCCE_TX | M8260_SCCE_TXE) ) &&
175      (m8260.scc3.scce & (M8260_SCCE_TX | M8260_SCCE_TXE) )) {
176    m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
177/*    m8260.scc3.sccm &= ~(M8260_SCCE_TX | M8260_SCCE_TXE); */
178    hdlc_driver[0].txInterrupts++;
179    rtems_event_send (hdlc_driver[0].txDaemonTid, INTERRUPT_EVENT);
180/*
181    printk( "Tx " );
182*/
183  }
184
185#if 0
186  m8260.sipnr_l = M8260_SIMASK_SCC3; /* Clear SCC3 interrupt-in-service bit */
187#endif
188}
189
190
191static rtems_irq_connect_data hdlcSCC3IrqData = {
192  BSP_CPM_IRQ_SCC3,
193  (rtems_irq_hdl) m8xx_scc3_interrupt_handler,
194  (rtems_irq_enable) m8xx_scc3_hdlc_on,
195  (rtems_irq_disable) m8xx_scc3_hdlc_off,
196  (rtems_irq_is_enabled)m8xx_scc3_hdlc_isOn
197};
198
199
200/*
201 * Initialize the SCC hardware
202 * Configure I/O ports for SCC3
203 * Internal Tx clock, External Rx clock
204 */
205static void
206m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc)
207{
208  int i;
209  int brg;
210
211/*
212  unsigned char *hwaddr;
213*/
214  rtems_status_code status;
215/*
216  rtems_isr_entry old_handler;
217*/
218
219  /* RxD PB14 */
220  m8260.pparb |=  0x00020000;
221  m8260.psorb &= ~0x00020000;
222  m8260.pdirb &= ~0x00020000;
223
224  /* RxC (CLK5) PC27 */
225  m8260.pparc |=  0x00000010;
226  m8260.psorc &= ~0x00000010;
227  m8260.pdirc &= ~0x00000010;
228
229  /* TxD PD24 and TxC PD10 (BRG4) */
230  m8260.ppard |=  0x00200080;
231  m8260.psord |=  0x00200000;
232  m8260.psord &= ~0x00000080;
233  m8260.pdird |=  0x00200080;
234
235
236  /* External Rx Clock from CLK5 */
237  if( m8xx_get_clk( M8xx_CLK_5 ) == -1 )
238    printk( "Error allocating CLK5 for network device.\n" );
239  else
240    m8260.cmxscr |= 0x00002000;
241
242  /* Internal Tx Clock from BRG4 */
243  if( (brg = m8xx_get_brg(M8xx_BRG_4, 8000000 )) == -1 )
244    printk( "Error allocating BRG for network device\n" );
245  else
246    m8260.cmxscr |= ((unsigned)brg << 8);
247
248
249
250  /*
251   * Allocate mbuf pointers
252   */
253  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, 
254                       M_MBUF, M_NOWAIT);
255  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, 
256                       M_MBUF, M_NOWAIT);
257  if (!sc->rxMbuf || !sc->txMbuf)
258    rtems_panic ("No memory for mbuf pointers");
259 
260  /*
261   * Set receiver and transmitter buffer descriptor bases
262   */
263  sc->rxBdBase = m8xx_bd_allocate (sc->rxBdCount);
264  sc->txBdBase = m8xx_bd_allocate (sc->txBdCount);
265
266  m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260;
267  m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260;
268 
269  /*
270   * Send "Init parameters" command
271   */
272
273  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
274
275  /*
276   * Set receive and transmit function codes
277   */
278  m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS;
279  m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS;
280 
281  /*
282   * Set maximum receive buffer length
283   */
284  m8260.scc3p.mrblr = RBUF_SIZE;
285
286
287  m8260.scc3p.un.hdlc.c_mask = 0xF0B8;
288  m8260.scc3p.un.hdlc.c_pres = 0xFFFF;
289  m8260.scc3p.un.hdlc.disfc  = 0;
290  m8260.scc3p.un.hdlc.crcec  = 0;
291  m8260.scc3p.un.hdlc.abtsc  = 0;
292  m8260.scc3p.un.hdlc.nmarc  = 0;
293  m8260.scc3p.un.hdlc.retrc  = 0;
294  m8260.scc3p.un.hdlc.rfthr  = 1;
295  m8260.scc3p.un.hdlc.mflr   = RBUF_SIZE;
296
297  m8260.scc3p.un.hdlc.hmask  = 0x0000;  /* promiscuous */
298
299  m8260.scc3p.un.hdlc.haddr1 = 0xFFFF;  /* Broadcast address */
300  m8260.scc3p.un.hdlc.haddr2 = 0xFFFF;  /* Station address */
301  m8260.scc3p.un.hdlc.haddr3 = 0xFFFF;  /* Dummy */
302  m8260.scc3p.un.hdlc.haddr4 = 0xFFFF;  /* Dummy */
303
304
305  /*
306   * Send "Init parameters" command
307   */
308/*
309  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
310*/
311
312  /*
313   * Set up receive buffer descriptors
314   */
315  for (i = 0 ; i < sc->rxBdCount ; i++) {
316    (sc->rxBdBase + i)->status = 0;
317  }
318
319  /*
320   * Set up transmit buffer descriptors
321   */
322  for (i = 0 ; i < sc->txBdCount ; i++) {
323    (sc->txBdBase + i)->status = 0;
324    sc->txMbuf[i] = NULL;
325  }
326  sc->txBdHead = sc->txBdTail = 0;
327  sc->txBdActiveCount = 0;
328
329
330  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
331
332  /*
333   * Clear any outstanding events
334   */
335  m8260.scc3.scce = 0xFFFF;
336
337  /*
338   * Set up interrupts
339   */
340  status = BSP_install_rtems_irq_handler (&hdlcSCC3IrqData);
341/*
342  printk( "status = %d, Success = %d\n", status, RTEMS_SUCCESSFUL );
343*/
344  if (status != 1 /*RTEMS_SUCCESSFUL*/ ) {
345    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
346                 rtems_status_text (status));
347  }
348  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
349
350#if 0
351  /*
352   * Set up interrupts
353   */
354  status = rtems_interrupt_catch (m8260_scc3_interrupt_handler,
355                                  PPC_IRQ_CPM_SCC3,
356                                  &old_handler);
357  if (status != RTEMS_SUCCESSFUL) {
358    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
359                 rtems_status_text (status));
360  }
361
362  m8260.sipnr_l = M8260_SIMASK_SCC3; /* clear pending event */
363  m8260.simr_l |= M8260_SIMASK_SCC3; /* Enable SCC interrupt */
364
365#endif
366
367
368
369  m8260.scc3.gsmr_h  = 0;
370  m8260.scc3.gsmr_l  = 0x10000000;
371  m8260.scc3.dsr     = 0x7E7E;  /* flag character */
372  m8260.scc3.psmr    = 0x2000;  /* 2 flags between Tx'd frames */
373
374/*  printk("scc3 init\n" ); */
375
376  m8260.scc3.gsmr_l |=  0x00000030;  /* Set ENR and ENT to enable Rx and Tx */
377
378}
379
380
381
382/*
383 * Soak up buffer descriptors that have been sent
384 * Note that a buffer descriptor can't be retired as soon as it becomes
385 * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
386 *  made up of multiple buffers, the user should not reuse the first buffer
387 * descriptor until the last buffer descriptor of the frame has had its
388 * ready bit cleared by the CPM".
389 */
390static void
391m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc)
392{
393  rtems_unsigned16 status;
394  int i;
395  int nRetired;
396  struct mbuf *m, *n;
397 
398  i = sc->txBdTail;
399  nRetired = 0;
400  while ((sc->txBdActiveCount != 0)
401         &&  (((status = (sc->txBdBase + i)->status) & M8260_BD_READY) == 0)) {
402    /*
403     * See if anything went wrong
404     */
405    if (status & (M8260_BD_UNDERRUN |
406                  M8260_BD_CTS_LOST)) {
407      /*
408       * Check for errors which stop the transmitter.
409       */
410      if( status & M8260_BD_UNDERRUN ) {
411          hdlc_driver[0].txUnderrun++;
412       
413        /*
414         * Restart the transmitter
415         */
416        /* FIXME: this should get executed only if using the SCC */
417        m8xx_cp_execute_cmd (M8260_CR_OP_RESTART_TX | M8260_CR_SCC3);
418      }
419      if (status & M8260_BD_CTS_LOST)
420        hdlc_driver[0].txLostCarrier++;
421    }
422    nRetired++;
423    if (status & M8260_BD_LAST) {
424      /*
425       * A full frame has been transmitted.
426       * Free all the associated buffer descriptors.
427       */
428      sc->txBdActiveCount -= nRetired;
429      while (nRetired) {
430        nRetired--;
431        m = sc->txMbuf[sc->txBdTail];
432        MFREE (m, n);
433        if (++sc->txBdTail == sc->txBdCount)
434          sc->txBdTail = 0;
435      }
436    }
437    if (++i == sc->txBdCount)
438      i = 0;
439  }
440}
441
442/*
443 * reader task
444 */
445static void
446scc_rxDaemon (void *arg)
447{
448  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
449  struct ifnet *ifp = &sc->ac_if;
450  struct mbuf *m;
451  rtems_unsigned16 status;
452  m8260BufferDescriptor_t *rxBd;
453  int rxBdIndex;
454 
455  /*
456   * Allocate space for incoming packets and start reception
457   */
458  for (rxBdIndex = 0 ; ;) {
459    rxBd = sc->rxBdBase + rxBdIndex;
460    MGETHDR (m, M_WAIT, MT_DATA);
461    MCLGET (m, M_WAIT);
462    m->m_pkthdr.rcvif = ifp;
463    sc->rxMbuf[rxBdIndex] = m;
464    rxBd->buffer = mtod (m, void *);
465    rxBd->status = M8260_BD_EMPTY | M8260_BD_INTERRUPT;
466    if (++rxBdIndex == sc->rxBdCount) {
467      rxBd->status |= M8260_BD_WRAP;
468      break;
469    }
470  }
471
472/*
473  m8260.scc3.sccm |= M8260_SCCE_RXF;
474*/
475
476  /*
477   * Input packet handling loop
478   */
479  rxBdIndex = 0;
480  for (;;) {
481    rxBd = sc->rxBdBase + rxBdIndex;
482   
483    /*
484     * Wait for packet if there's not one ready
485     */
486    if ((status = rxBd->status) & M8260_BD_EMPTY) {
487      /*
488       * Clear old events
489       */
490
491      m8260.scc3.scce = M8260_SCCE_RXF;
492
493      /*
494       * Wait for packet
495       * Note that the buffer descriptor is checked
496       * *before* the event wait -- this catches the
497       * possibility that a packet arrived between the
498       * `if' above, and the clearing of the event register.
499       */
500      while ((status = rxBd->status) & M8260_BD_EMPTY) {
501        rtems_event_set events;
502
503        /*
504         * Unmask RXF (Full frame received) event
505         */
506        m8260.scc3.sccm |= M8260_SCCE_RXF;
507
508/*        printk( "Rxdwait "); */
509       
510        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
511                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
512                                    RTEMS_NO_TIMEOUT,
513                                    &events);
514
515/*        printk( "Rxd " ); */
516      }
517    }
518   
519    /*
520     * Check that packet is valid
521     */
522    if ((status & (M8260_BD_LAST |
523                   M8260_BD_FIRST_IN_FRAME |
524                   M8260_BD_LONG |
525                   M8260_BD_NONALIGNED |
526                   M8260_BD_ABORT |
527                   M8260_BD_CRC_ERROR |
528                   M8260_BD_OVERRUN /*|
529                   M8260_BD_CARRIER_LOST*/)) ==
530                   (M8260_BD_LAST |
531                   M8260_BD_FIRST_IN_FRAME ) ) {
532
533/*      printk( "RxV " ); */
534
535/*
536 * Invalidate the buffer for this descriptor
537 */
538
539      rtems_cache_invalidate_multiple_data_lines(rxBd->buffer, rxBd->length);
540
541      m = sc->rxMbuf[rxBdIndex];
542
543      /* strip off HDLC CRC */
544      m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(rtems_unsigned16);
545
546      hdlc_input( ifp, m );
547
548      /*
549       * Allocate a new mbuf
550       */
551      MGETHDR (m, M_WAIT, MT_DATA);
552      MCLGET (m, M_WAIT);
553      m->m_pkthdr.rcvif = ifp;
554      sc->rxMbuf[rxBdIndex] = m;
555      rxBd->buffer = mtod (m, void *);
556    }
557    else {
558      printk( "RxErr[%04X,%d]", status, rxBd->length );
559      /*
560       * Something went wrong with the reception
561       */
562      if (!(status & M8260_BD_LAST))
563        sc->rxNotLast++;
564      if (!(status & M8260_BD_FIRST_IN_FRAME))
565        sc->rxNotFirst++;
566
567      if (status & M8260_BD_LONG)
568        sc->rxGiant++;
569      if (status & M8260_BD_NONALIGNED)
570        sc->rxNonOctet++;
571      if (status & M8260_BD_ABORT)
572        sc->rxAbort++;
573      if (status & M8260_BD_CRC_ERROR)
574        sc->rxBadCRC++;
575      if (status & M8260_BD_OVERRUN)
576        sc->rxOverrun++;
577      if (status & M8260_BD_CARRIER_LOST)
578        sc->rxLostCarrier++;
579    }
580   
581    /*
582     * Reenable the buffer descriptor
583     */
584    rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) |
585                    M8260_BD_EMPTY;
586   
587    /*
588     * Move to next buffer descriptor
589     */
590    if (++rxBdIndex == sc->rxBdCount)
591      rxBdIndex = 0;
592  }
593}
594
595
596static void
597scc_sendpacket (struct ifnet *ifp, struct mbuf *m)
598{
599  struct m8260_hdlc_struct *sc = ifp->if_softc;
600  volatile m8260BufferDescriptor_t *firstTxBd, *txBd;
601  struct mbuf *l = NULL;
602  rtems_unsigned16 status;
603  int nAdded;
604 
605  /*
606   * Free up buffer descriptors
607   */
608  m8260Enet_retire_tx_bd (sc);
609 
610  /*
611   * Set up the transmit buffer descriptors.
612   * No need to pad out short packets since the
613   * hardware takes care of that automatically.
614   * No need to copy the packet to a contiguous buffer
615   * since the hardware is capable of scatter/gather DMA.
616   */
617  nAdded = 0;
618  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
619
620/*
621  m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
622*/
623
624  for (;;) {
625    /*
626     * Wait for buffer descriptor to become available.
627     */
628    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
629      /*
630       * Clear old events
631       */
632      m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
633     
634      /*
635       * Wait for buffer descriptor to become available.
636       * Note that the buffer descriptors are checked
637       * *before* * entering the wait loop -- this catches
638       * the possibility that a buffer descriptor became
639       * available between the `if' above, and the clearing
640       * of the event register.
641       * This is to catch the case where the transmitter
642       * stops in the middle of a frame -- and only the
643       * last buffer descriptor in a frame can generate
644       * an interrupt.
645       */
646      m8260Enet_retire_tx_bd (sc);
647      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
648        rtems_event_set events;
649       
650        /*
651         * Unmask TX (buffer transmitted) event
652         */
653        m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
654
655        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
656                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
657                                    RTEMS_NO_TIMEOUT,
658                                    &events);
659        m8260Enet_retire_tx_bd (sc);
660      }
661    }
662   
663    /*
664     * Don't set the READY flag till the
665     * whole packet has been readied.
666     */
667    status = nAdded ? M8260_BD_READY : 0;
668   
669    /*
670     *  FIXME: Why not deal with empty mbufs at at higher level?
671     * The IP fragmentation routine in ip_output
672     * can produce packet fragments with zero length.
673     * I think that ip_output should be changed to get
674     * rid of these zero-length mbufs, but for now,
675     * I'll deal with them here.
676     */
677    if (m->m_len) {
678      /*
679       * Fill in the buffer descriptor
680       */
681
682      txBd->buffer = mtod (m, void *);
683      txBd->length = m->m_len;
684
685
686      /*
687       * Flush the buffer for this descriptor
688       */
689
690      rtems_cache_flush_multiple_data_lines(txBd->buffer, txBd->length);
691
692
693/* throw off the header for Ethernet Emulation mode */
694/*
695      txBd->buffer = mtod (m, void *);
696      txBd->buffer += sizeof( struct ether_header ) + 2;
697      txBd->length = m->m_len - sizeof( struct ether_header ) - 2;
698*/
699      sc->txMbuf[sc->txBdHead] = m;
700      nAdded++;
701      if (++sc->txBdHead == sc->txBdCount) {
702        status |= M8260_BD_WRAP;
703        sc->txBdHead = 0;
704      }
705      l = m;
706      m = m->m_next;
707    }
708    else {
709      /*
710       * Just toss empty mbufs
711       */
712      struct mbuf *n;
713      MFREE (m, n);
714      m = n;
715      if (l != NULL)
716        l->m_next = m;
717    }
718   
719    /*
720     * Set the transmit buffer status.
721     * Break out of the loop if this mbuf is the last in the frame.
722     */
723    if (m == NULL) {
724      if (nAdded) {
725        status |= M8260_BD_LAST | M8260_BD_TX_CRC | M8260_BD_INTERRUPT;
726        txBd->status = status;
727        firstTxBd->status |= M8260_BD_READY;
728        sc->txBdActiveCount += nAdded;
729      }
730      break;
731    }
732    txBd->status = status;
733    txBd = sc->txBdBase + sc->txBdHead;
734  }
735}
736
737
738/*
739 * Driver transmit daemon
740 */
741void
742scc_txDaemon (void *arg)
743{
744  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
745  struct ifnet *ifp = &sc->ac_if;
746  struct mbuf *m;
747  rtems_event_set events;
748 
749  for (;;) {
750    /*
751     * Wait for packet
752     */
753    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
754   
755    /*
756     * Send packets till queue is empty
757     */
758    for (;;) {
759      /*
760       * Get the next mbuf chain to transmit.
761       */
762      IF_DEQUEUE(&ifp->if_snd, m);
763      if (!m)
764        break;
765
766
767      scc_sendpacket (ifp, m);
768
769
770    }
771    ifp->if_flags &= ~IFF_OACTIVE;
772  }
773}
774
775
776/*
777 * Send packet (caller provides header).
778 */
779static void
780m8260_hdlc_start (struct ifnet *ifp)
781{
782  struct m8260_hdlc_struct *sc = ifp->if_softc;
783 
784  rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
785  ifp->if_flags |= IFF_OACTIVE;
786}
787
788/*
789 * Initialize and start the device
790 */
791static void
792scc_init (void *arg)
793{
794  struct m8260_hdlc_struct *sc = arg;
795  struct ifnet *ifp = &sc->ac_if;
796 
797  if (sc->txDaemonTid == 0) {
798   
799    /*
800     * Set up SCC hardware
801     */
802    m8260_scc_initialize_hardware (sc);
803   
804    /*
805     * Start driver tasks
806     */
807    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
808    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
809   
810  }
811 
812#if 0
813  /*
814   * Set flags appropriately
815   */
816  if (ifp->if_flags & IFF_PROMISC)
817    m8260.scc3.psmr |= 0x200;
818  else
819    m8260.scc3.psmr &= ~0x200;
820#endif
821
822  /*
823   * Tell the world that we're running.
824   */
825  ifp->if_flags |= IFF_RUNNING;
826 
827  /*
828   * Enable receiver and transmitter
829   */
830  m8260.scc3.gsmr_l |= 0x30;
831}
832
833
834
835/*
836 * Stop the device
837 */
838static void
839scc_stop (struct m8260_hdlc_struct *sc)
840{
841  struct ifnet *ifp = &sc->ac_if;
842 
843  ifp->if_flags &= ~IFF_RUNNING;
844 
845  /*
846   * Shut down receiver and transmitter
847   */
848  m8260.scc3.gsmr_l &= ~0x30;
849}
850
851
852/*
853 * Show interface statistics
854 */
855static void
856hdlc_stats (struct m8260_hdlc_struct *sc)
857{
858  printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
859  printf ("              Giant:%-8lu", sc->rxGiant);
860  printf ("          Non-octet:%-8lu\n", sc->rxNonOctet);
861  printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
862  printf ("            Overrun:%-8lu", sc->rxOverrun);
863  printf ("         No Carrier:%-8lu\n", sc->rxLostCarrier);
864  printf ("          Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc);
865 
866  printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
867  printf ("         No Carrier:%-8lu", sc->txLostCarrier);
868  printf ("           Underrun:%-8lu\n", sc->txUnderrun);
869  printf ("    Raw output wait:%-8lu\n", sc->txRawWait);
870}
871
872/*
873 * Driver ioctl handler
874 */
875static int
876scc_ioctl (struct ifnet *ifp, int command, caddr_t data)
877{
878  struct m8260_hdlc_struct *sc = ifp->if_softc;
879  int error = 0;
880 
881  switch (command) {
882  case SIOCGIFADDR:
883  case SIOCSIFADDR:
884    hdlc_ioctl (ifp, command, data);
885    break;
886   
887  case SIOCSIFFLAGS:
888    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
889    case IFF_RUNNING:
890      scc_stop (sc);
891      break;
892     
893    case IFF_UP:
894      scc_init (sc);
895      break;
896     
897    case IFF_UP | IFF_RUNNING:
898      scc_stop (sc);
899      scc_init (sc);
900      break;
901     
902    default:
903      break;
904    }
905    break;
906   
907  case SIO_RTEMS_SHOW_STATS:
908    hdlc_stats (sc);
909    break;
910   
911    /*
912     * FIXME: All sorts of multicast commands need to be added here!
913     */
914  default:
915    error = EINVAL;
916    break;
917  }
918  return error;
919}
920
921
922
923/*
924 * Attach an SCC driver to the system
925 */
926int
927rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config)
928{
929  struct m8260_hdlc_struct *sc;
930  struct ifnet *ifp;
931  int mtu;
932  int i;
933 
934  /*
935   * Find a free driver
936   */
937  for (i = 0 ; i < NIFACES ; i++) {
938    sc = &hdlc_driver[i];
939    ifp = &sc->ac_if;
940    if (ifp->if_softc == NULL)
941      break;
942  }
943  if (i >= NIFACES) {
944    printf ("Too many SCC drivers.\n");
945    return 0;
946  }
947
948#if 0
949  /*
950   * Process options
951   */
952
953  if (config->hardware_address) {
954    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
955  }
956  else {
957    sc->arpcom.ac_enaddr[0] = 0x44;
958    sc->arpcom.ac_enaddr[1] = 0x22;
959    sc->arpcom.ac_enaddr[2] = 0x33;
960    sc->arpcom.ac_enaddr[3] = 0x33;
961    sc->arpcom.ac_enaddr[4] = 0x22;
962    sc->arpcom.ac_enaddr[5] = 0x44;
963  }
964#endif
965
966  if (config->mtu)
967    mtu = config->mtu;
968  else
969    mtu = ETHERMTU;
970  if (config->rbuf_count)
971    sc->rxBdCount = config->rbuf_count;
972  else
973    sc->rxBdCount = RX_BUF_COUNT;
974  if (config->xbuf_count)
975    sc->txBdCount = config->xbuf_count;
976  else
977    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
978  sc->acceptBroadcast = !config->ignore_broadcast;
979 
980  /*
981   * Set up network interface values
982   */
983  ifp->if_softc = sc;
984  ifp->if_unit = i + 1;
985  ifp->if_name = "eth";
986  ifp->if_mtu = mtu;
987  ifp->if_init = scc_init;
988  ifp->if_ioctl = scc_ioctl;
989  ifp->if_start = m8260_hdlc_start;
990  ifp->if_output = hdlc_output;
991  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP;
992  if (ifp->if_snd.ifq_maxlen == 0)
993    ifp->if_snd.ifq_maxlen = ifqmaxlen;
994 
995  /*
996   * Attach the interface
997   */
998  if_attach (ifp);
999  hdlc_ifattach (ifp);
1000  return 1;
1001};
1002
1003
1004int
1005rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
1006{
1007  return rtems_scc3_driver_attach( config );
1008
1009/*
1010  if ((m8260.fec.mii_data & 0xffff) == 0x2000) {
1011    return rtems_fec_driver_attach(config);
1012  }
1013  else {
1014    return rtems_scc1_driver_attach(config);
1015  }
1016*/
1017}
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