source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/network/network.c @ 0d979ac

4.104.115
Last change on this file since 0d979ac was 0d979ac, checked in by Joel Sherrill <joel.sherrill@…>, on 08/10/09 at 13:31:43

2009-08-10 Joel Sherrill <joel.sherrill@…>

  • network/network.c: Disable use of simple vectored interrupt install until updated and this can be removed.
  • Property mode set to 100644
File size: 23.5 KB
Line 
1/*
2 * RTEMS/TCPIP driver for MPC8260 SCC
3 *
4 * Modified for MPC8260 by Andy Dachs <a.dachs@sstl.co.uk>
5 * Surrey Satellite Technology Limited
6 *
7 *   On the ADS board the ethernet interface is connected to FCC2
8 *   but in my application I want TCP over HDLC (see README)
9 *   so will use SCC3 as the network interface. I have other plans
10 *   for the FCCs so am unlikely to add true ethernet support to
11 *   this BSP.  Contributions welcome!
12 *
13 * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com)
14 *
15 *  This supports ethernet on either SCC1 or the FEC of the MPC860T.
16 *  Right now, we only do 10 Mbps, even with the FEC. The function
17 *  rtems_m860_enet_driver_attach determines which one to use. Currently,
18 *  only one may be used at a time.
19 *
20 * W. Eric Norum
21 * Saskatchewan Accelerator Laboratory
22 * University of Saskatchewan
23 * Saskatoon, Saskatchewan, CANADA
24 * eric@skatter.usask.ca
25 *
26 *  $Id$
27 */
28#include <bsp.h>
29#include <bsp/irq.h>
30#include <mpc8260.h>
31#include <mpc8260/cpm.h>
32#include <stdio.h>
33#include <rtems/error.h>
34#include <rtems/rtems_bsdnet.h>
35#include <rtems/bspIo.h>
36
37#include <sys/param.h>
38#include <sys/mbuf.h>
39#include <sys/socket.h>
40#include <sys/sockio.h>
41#include <errno.h>
42
43#include <net/if.h>
44
45#include <netinet/in.h>
46#include <netinet/if_ether.h>
47
48#include "if_hdlcsubr.h"
49
50/*
51 * Number of interfaces supported by this driver
52 */
53#define NIFACES 1
54
55/*
56 * Default number of buffer descriptors set aside for this driver.
57 * The number of transmit buffer descriptors has to be quite large
58 * since a single frame often uses four or more buffer descriptors.
59 */
60#define RX_BUF_COUNT     32
61#define TX_BUF_COUNT     8
62#define TX_BD_PER_BUF    4
63
64#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
65
66extern void m8xx_dump_brgs( void );
67
68/*
69 * RTEMS event used by interrupt handler to signal daemons.
70 * This must *not* be the same event used by the TCP/IP task synchronization.
71 */
72#define INTERRUPT_EVENT RTEMS_EVENT_1
73
74/*
75 * RTEMS event used to start transmit daemon.
76 * This must not be the same as INTERRUPT_EVENT.
77 */
78#define START_TRANSMIT_EVENT    RTEMS_EVENT_2
79
80/*
81 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
82 * Round off to nearest multiple of RBUF_ALIGN.
83 */
84#define MAX_MTU_SIZE    1518
85/*#define MAX_MTU_SIZE  2050*/
86#define RBUF_ALIGN      4
87#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
88
89#if (MCLBYTES < RBUF_SIZE)
90# error "Driver must have MCLBYTES > RBUF_SIZE"
91#endif
92
93/*
94 * Per-device data
95 */
96struct m8260_hdlc_struct {
97        struct ifnet            ac_if;
98        struct mbuf             **rxMbuf;
99        struct mbuf             **txMbuf;
100        int                     acceptBroadcast;
101        int                     rxBdCount;
102        int                     txBdCount;
103        int                     txBdHead;
104        int                     txBdTail;
105        int                     txBdActiveCount;
106        m8260BufferDescriptor_t  *rxBdBase;
107        m8260BufferDescriptor_t  *txBdBase;
108        rtems_id                rxDaemonTid;
109        rtems_id                txDaemonTid;
110
111        /*
112         * Statistics
113         */
114        unsigned long   rxNotFirst;
115        unsigned long   rxNotLast;
116        unsigned long   rxInterrupts;
117        unsigned long   rxGiant;
118        unsigned long   rxNonOctet;
119        unsigned long   rxAbort;
120        unsigned long   rxBadCRC;
121        unsigned long   rxOverrun;
122        unsigned long   rxLostCarrier;
123        unsigned long   txInterrupts;
124        unsigned long   txUnderrun;
125        unsigned long   txLostCarrier;
126        unsigned long   txRawWait;
127};
128static struct m8260_hdlc_struct hdlc_driver[NIFACES];
129
130static void  m8xx_scc3_hdlc_on(const rtems_irq_connect_data* ptr)
131{
132}
133
134static void  m8xx_scc3_hdlc_off(const rtems_irq_connect_data* ptr)
135{
136  /*
137   * Please put relevant code there
138   */
139}
140
141static int  m8xx_scc3_hdlc_isOn(const rtems_irq_connect_data* ptr)
142{
143  return BSP_irq_enabled_at_cpm (ptr->name);
144}
145
146/*
147 * SCC interrupt handler
148 * TBD: Can we work out which SCC generated the interrupt from the
149 *      value of v? If so we can use the same handler for multiple
150 *      SCCs.
151 */
152static void
153m8xx_scc3_interrupt_handler (rtems_irq_hdl_param unused)
154{
155  /*
156   * Frame received?
157   */
158  if ((m8260.scc3.sccm & M8260_SCCE_RXF) &&
159      (m8260.scc3.scce & M8260_SCCE_RXF) ) {
160    m8260.scc3.scce = M8260_SCCE_RXF;
161/*    m8260.scc3.sccm &= ~M8260_SCCE_RXF; */
162    hdlc_driver[0].rxInterrupts++;
163    rtems_event_send (hdlc_driver[0].rxDaemonTid, INTERRUPT_EVENT);
164/*
165    printk( "Rx " );
166*/
167  }
168
169  /*
170   * Buffer transmitted or transmitter error?
171   */
172  if ((m8260.scc3.sccm & (M8260_SCCE_TX | M8260_SCCE_TXE) ) &&
173      (m8260.scc3.scce & (M8260_SCCE_TX | M8260_SCCE_TXE) )) {
174    m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
175/*    m8260.scc3.sccm &= ~(M8260_SCCE_TX | M8260_SCCE_TXE); */
176    hdlc_driver[0].txInterrupts++;
177    rtems_event_send (hdlc_driver[0].txDaemonTid, INTERRUPT_EVENT);
178/*
179    printk( "Tx " );
180*/
181  }
182
183#if 0
184  m8260.sipnr_l = M8260_SIMASK_SCC3; /* Clear SCC3 interrupt-in-service bit */
185#endif
186}
187
188static rtems_irq_connect_data hdlcSCC3IrqData = {
189  BSP_CPM_IRQ_SCC3,
190  (rtems_irq_hdl) m8xx_scc3_interrupt_handler,
191  NULL,
192  (rtems_irq_enable) m8xx_scc3_hdlc_on,
193  (rtems_irq_disable) m8xx_scc3_hdlc_off,
194  (rtems_irq_is_enabled)m8xx_scc3_hdlc_isOn
195};
196
197/*
198 * Initialize the SCC hardware
199 * Configure I/O ports for SCC3
200 * Internal Tx clock, External Rx clock
201 */
202static void
203m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc)
204{
205  int i;
206  int brg;
207
208/*
209  unsigned char *hwaddr;
210*/
211  rtems_status_code status;
212/*
213  rtems_isr_entry old_handler;
214*/
215
216  /* RxD PB14 */
217  m8260.pparb |=  0x00020000;
218  m8260.psorb &= ~0x00020000;
219  m8260.pdirb &= ~0x00020000;
220
221  /* RxC (CLK5) PC27 */
222  m8260.pparc |=  0x00000010;
223  m8260.psorc &= ~0x00000010;
224  m8260.pdirc &= ~0x00000010;
225
226  /* TxD PD24 and TxC PD10 (BRG4) */
227  m8260.ppard |=  0x00200080;
228  m8260.psord |=  0x00200000;
229  m8260.psord &= ~0x00000080;
230  m8260.pdird |=  0x00200080;
231
232  /* External Rx Clock from CLK5 */
233  if( m8xx_get_clk( M8xx_CLK_5 ) == -1 )
234    printk( "Error allocating CLK5 for network device.\n" );
235  else
236    m8260.cmxscr |= 0x00002000;
237
238  /* Internal Tx Clock from BRG4 */
239  if( (brg = m8xx_get_brg(M8xx_BRG_4, 8000000 )) == -1 )
240    printk( "Error allocating BRG for network device\n" );
241  else
242    m8260.cmxscr |= ((unsigned)brg << 8);
243
244  /*
245   * Allocate mbuf pointers
246   */
247  sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf,
248                       M_MBUF, M_NOWAIT);
249  sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf,
250                       M_MBUF, M_NOWAIT);
251  if (!sc->rxMbuf || !sc->txMbuf)
252    rtems_panic ("No memory for mbuf pointers");
253
254  /*
255   * Set receiver and transmitter buffer descriptor bases
256   */
257  sc->rxBdBase = m8xx_bd_allocate (sc->rxBdCount);
258  sc->txBdBase = m8xx_bd_allocate (sc->txBdCount);
259
260  m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260;
261  m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260;
262
263  /*
264   * Send "Init parameters" command
265   */
266
267  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
268
269  /*
270   * Set receive and transmit function codes
271   */
272  m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS;
273  m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS;
274
275  /*
276   * Set maximum receive buffer length
277   */
278  m8260.scc3p.mrblr = RBUF_SIZE;
279
280  m8260.scc3p.un.hdlc.c_mask = 0xF0B8;
281  m8260.scc3p.un.hdlc.c_pres = 0xFFFF;
282  m8260.scc3p.un.hdlc.disfc  = 0;
283  m8260.scc3p.un.hdlc.crcec  = 0;
284  m8260.scc3p.un.hdlc.abtsc  = 0;
285  m8260.scc3p.un.hdlc.nmarc  = 0;
286  m8260.scc3p.un.hdlc.retrc  = 0;
287  m8260.scc3p.un.hdlc.rfthr  = 1;
288  m8260.scc3p.un.hdlc.mflr   = RBUF_SIZE;
289
290  m8260.scc3p.un.hdlc.hmask  = 0x0000;  /* promiscuous */
291
292  m8260.scc3p.un.hdlc.haddr1 = 0xFFFF;  /* Broadcast address */
293  m8260.scc3p.un.hdlc.haddr2 = 0xFFFF;  /* Station address */
294  m8260.scc3p.un.hdlc.haddr3 = 0xFFFF;  /* Dummy */
295  m8260.scc3p.un.hdlc.haddr4 = 0xFFFF;  /* Dummy */
296
297  /*
298   * Send "Init parameters" command
299   */
300/*
301  m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 );
302*/
303
304  /*
305   * Set up receive buffer descriptors
306   */
307  for (i = 0 ; i < sc->rxBdCount ; i++) {
308    (sc->rxBdBase + i)->status = 0;
309  }
310
311  /*
312   * Set up transmit buffer descriptors
313   */
314  for (i = 0 ; i < sc->txBdCount ; i++) {
315    (sc->txBdBase + i)->status = 0;
316    sc->txMbuf[i] = NULL;
317  }
318  sc->txBdHead = sc->txBdTail = 0;
319  sc->txBdActiveCount = 0;
320
321  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
322
323  /*
324   * Clear any outstanding events
325   */
326  m8260.scc3.scce = 0xFFFF;
327
328  /*
329   * Set up interrupts
330   */
331  status = BSP_install_rtems_irq_handler (&hdlcSCC3IrqData);
332/*
333  printk( "status = %d, Success = %d\n", status, RTEMS_SUCCESSFUL );
334*/
335  if (status != 1 /*RTEMS_SUCCESSFUL*/ ) {
336    rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n",
337                 rtems_status_text (status));
338  }
339  m8260.scc3.sccm = 0;     /* No interrupts unmasked till necessary */
340
341  m8260.scc3.gsmr_h  = 0;
342  m8260.scc3.gsmr_l  = 0x10000000;
343  m8260.scc3.dsr     = 0x7E7E;  /* flag character */
344  m8260.scc3.psmr    = 0x2000;  /* 2 flags between Tx'd frames */
345
346/*  printk("scc3 init\n" ); */
347
348  m8260.scc3.gsmr_l |=  0x00000030;  /* Set ENR and ENT to enable Rx and Tx */
349
350}
351
352/*
353 * Soak up buffer descriptors that have been sent
354 * Note that a buffer descriptor can't be retired as soon as it becomes
355 * ready.  The MC68360 Errata (May 96) says that, "If an Ethernet frame is
356 *  made up of multiple buffers, the user should not reuse the first buffer
357 * descriptor until the last buffer descriptor of the frame has had its
358 * ready bit cleared by the CPM".
359 */
360static void
361m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc)
362{
363  uint16_t         status;
364  int i;
365  int nRetired;
366  struct mbuf *m, *n;
367
368  i = sc->txBdTail;
369  nRetired = 0;
370  while ((sc->txBdActiveCount != 0)
371         &&  (((status = (sc->txBdBase + i)->status) & M8260_BD_READY) == 0)) {
372    /*
373     * See if anything went wrong
374     */
375    if (status & (M8260_BD_UNDERRUN |
376                  M8260_BD_CTS_LOST)) {
377      /*
378       * Check for errors which stop the transmitter.
379       */
380      if( status & M8260_BD_UNDERRUN ) {
381          hdlc_driver[0].txUnderrun++;
382
383        /*
384         * Restart the transmitter
385         */
386        /* FIXME: this should get executed only if using the SCC */
387        m8xx_cp_execute_cmd (M8260_CR_OP_RESTART_TX | M8260_CR_SCC3);
388      }
389      if (status & M8260_BD_CTS_LOST)
390        hdlc_driver[0].txLostCarrier++;
391    }
392    nRetired++;
393    if (status & M8260_BD_LAST) {
394      /*
395       * A full frame has been transmitted.
396       * Free all the associated buffer descriptors.
397       */
398      sc->txBdActiveCount -= nRetired;
399      while (nRetired) {
400        nRetired--;
401        m = sc->txMbuf[sc->txBdTail];
402        MFREE (m, n);
403        if (++sc->txBdTail == sc->txBdCount)
404          sc->txBdTail = 0;
405      }
406    }
407    if (++i == sc->txBdCount)
408      i = 0;
409  }
410}
411
412/*
413 * reader task
414 */
415static void
416scc_rxDaemon (void *arg)
417{
418  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
419  struct ifnet *ifp = &sc->ac_if;
420  struct mbuf *m;
421  uint16_t         status;
422  m8260BufferDescriptor_t *rxBd;
423  int rxBdIndex;
424
425  /*
426   * Allocate space for incoming packets and start reception
427   */
428  for (rxBdIndex = 0 ; ;) {
429    rxBd = sc->rxBdBase + rxBdIndex;
430    MGETHDR (m, M_WAIT, MT_DATA);
431    MCLGET (m, M_WAIT);
432    m->m_pkthdr.rcvif = ifp;
433    sc->rxMbuf[rxBdIndex] = m;
434    rxBd->buffer = mtod (m, void *);
435    rxBd->status = M8260_BD_EMPTY | M8260_BD_INTERRUPT;
436    if (++rxBdIndex == sc->rxBdCount) {
437      rxBd->status |= M8260_BD_WRAP;
438      break;
439    }
440  }
441
442/*
443  m8260.scc3.sccm |= M8260_SCCE_RXF;
444*/
445
446  /*
447   * Input packet handling loop
448   */
449  rxBdIndex = 0;
450  for (;;) {
451    rxBd = sc->rxBdBase + rxBdIndex;
452
453    /*
454     * Wait for packet if there's not one ready
455     */
456    if ((status = rxBd->status) & M8260_BD_EMPTY) {
457      /*
458       * Clear old events
459       */
460
461      m8260.scc3.scce = M8260_SCCE_RXF;
462
463      /*
464       * Wait for packet
465       * Note that the buffer descriptor is checked
466       * *before* the event wait -- this catches the
467       * possibility that a packet arrived between the
468       * `if' above, and the clearing of the event register.
469       */
470      while ((status = rxBd->status) & M8260_BD_EMPTY) {
471        rtems_event_set events;
472
473        /*
474         * Unmask RXF (Full frame received) event
475         */
476        m8260.scc3.sccm |= M8260_SCCE_RXF;
477
478/*        printk( "Rxdwait "); */
479
480        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
481                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
482                                    RTEMS_NO_TIMEOUT,
483                                    &events);
484
485/*        printk( "Rxd " ); */
486      }
487    }
488
489    /*
490     * Check that packet is valid
491     */
492    if ((status & (M8260_BD_LAST |
493                   M8260_BD_FIRST_IN_FRAME |
494                   M8260_BD_LONG |
495                   M8260_BD_NONALIGNED |
496                   M8260_BD_ABORT |
497                   M8260_BD_CRC_ERROR |
498                   M8260_BD_OVERRUN /*|
499                   M8260_BD_CARRIER_LOST*/)) ==
500                   (M8260_BD_LAST |
501                   M8260_BD_FIRST_IN_FRAME ) ) {
502
503/*      printk( "RxV " ); */
504
505/*
506 * Invalidate the buffer for this descriptor
507 */
508
509      rtems_cache_invalidate_multiple_data_lines((void *)rxBd->buffer, rxBd->length);
510
511      m = sc->rxMbuf[rxBdIndex];
512
513      /* strip off HDLC CRC */
514      m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint16_t);
515
516      hdlc_input( ifp, m );
517
518      /*
519       * Allocate a new mbuf
520       */
521      MGETHDR (m, M_WAIT, MT_DATA);
522      MCLGET (m, M_WAIT);
523      m->m_pkthdr.rcvif = ifp;
524      sc->rxMbuf[rxBdIndex] = m;
525      rxBd->buffer = mtod (m, void *);
526    }
527    else {
528      printk( "RxErr[%04X,%d]", status, rxBd->length );
529      /*
530       * Something went wrong with the reception
531       */
532      if (!(status & M8260_BD_LAST))
533        sc->rxNotLast++;
534      if (!(status & M8260_BD_FIRST_IN_FRAME))
535        sc->rxNotFirst++;
536
537      if (status & M8260_BD_LONG)
538        sc->rxGiant++;
539      if (status & M8260_BD_NONALIGNED)
540        sc->rxNonOctet++;
541      if (status & M8260_BD_ABORT)
542        sc->rxAbort++;
543      if (status & M8260_BD_CRC_ERROR)
544        sc->rxBadCRC++;
545      if (status & M8260_BD_OVERRUN)
546        sc->rxOverrun++;
547      if (status & M8260_BD_CARRIER_LOST)
548        sc->rxLostCarrier++;
549    }
550
551    /*
552     * Reenable the buffer descriptor
553     */
554    rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) |
555                    M8260_BD_EMPTY;
556
557    /*
558     * Move to next buffer descriptor
559     */
560    if (++rxBdIndex == sc->rxBdCount)
561      rxBdIndex = 0;
562  }
563}
564
565static void
566scc_sendpacket (struct ifnet *ifp, struct mbuf *m)
567{
568  struct m8260_hdlc_struct *sc = ifp->if_softc;
569  volatile m8260BufferDescriptor_t *firstTxBd, *txBd;
570  struct mbuf *l = NULL;
571  uint16_t         status;
572  int nAdded;
573
574  /*
575   * Free up buffer descriptors
576   */
577  m8260Enet_retire_tx_bd (sc);
578
579  /*
580   * Set up the transmit buffer descriptors.
581   * No need to pad out short packets since the
582   * hardware takes care of that automatically.
583   * No need to copy the packet to a contiguous buffer
584   * since the hardware is capable of scatter/gather DMA.
585   */
586  nAdded = 0;
587  txBd = firstTxBd = sc->txBdBase + sc->txBdHead;
588
589/*
590  m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
591*/
592
593  for (;;) {
594    /*
595     * Wait for buffer descriptor to become available.
596     */
597    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
598      /*
599       * Clear old events
600       */
601      m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE;
602
603      /*
604       * Wait for buffer descriptor to become available.
605       * Note that the buffer descriptors are checked
606       * *before* * entering the wait loop -- this catches
607       * the possibility that a buffer descriptor became
608       * available between the `if' above, and the clearing
609       * of the event register.
610       * This is to catch the case where the transmitter
611       * stops in the middle of a frame -- and only the
612       * last buffer descriptor in a frame can generate
613       * an interrupt.
614       */
615      m8260Enet_retire_tx_bd (sc);
616      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
617        rtems_event_set events;
618
619        /*
620         * Unmask TX (buffer transmitted) event
621         */
622        m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE);
623
624        rtems_bsdnet_event_receive (INTERRUPT_EVENT,
625                                    RTEMS_WAIT|RTEMS_EVENT_ANY,
626                                    RTEMS_NO_TIMEOUT,
627                                    &events);
628        m8260Enet_retire_tx_bd (sc);
629      }
630    }
631
632    /*
633     * Don't set the READY flag till the
634     * whole packet has been readied.
635     */
636    status = nAdded ? M8260_BD_READY : 0;
637
638    /*
639     *  FIXME: Why not deal with empty mbufs at at higher level?
640     * The IP fragmentation routine in ip_output
641     * can produce packet fragments with zero length.
642     * I think that ip_output should be changed to get
643     * rid of these zero-length mbufs, but for now,
644     * I'll deal with them here.
645     */
646    if (m->m_len) {
647      /*
648       * Fill in the buffer descriptor
649       */
650
651      txBd->buffer = mtod (m, void *);
652      txBd->length = m->m_len;
653
654      /*
655       * Flush the buffer for this descriptor
656       */
657
658      rtems_cache_flush_multiple_data_lines((void *)txBd->buffer, txBd->length);
659
660/* throw off the header for Ethernet Emulation mode */
661/*
662      txBd->buffer = mtod (m, void *);
663      txBd->buffer += sizeof( struct ether_header ) + 2;
664      txBd->length = m->m_len - sizeof( struct ether_header ) - 2;
665*/
666      sc->txMbuf[sc->txBdHead] = m;
667      nAdded++;
668      if (++sc->txBdHead == sc->txBdCount) {
669        status |= M8260_BD_WRAP;
670        sc->txBdHead = 0;
671      }
672      l = m;
673      m = m->m_next;
674    }
675    else {
676      /*
677       * Just toss empty mbufs
678       */
679      struct mbuf *n;
680      MFREE (m, n);
681      m = n;
682      if (l != NULL)
683        l->m_next = m;
684    }
685
686    /*
687     * Set the transmit buffer status.
688     * Break out of the loop if this mbuf is the last in the frame.
689     */
690    if (m == NULL) {
691      if (nAdded) {
692        status |= M8260_BD_LAST | M8260_BD_TX_CRC | M8260_BD_INTERRUPT;
693        txBd->status = status;
694        firstTxBd->status |= M8260_BD_READY;
695        sc->txBdActiveCount += nAdded;
696      }
697      break;
698    }
699    txBd->status = status;
700    txBd = sc->txBdBase + sc->txBdHead;
701  }
702}
703
704/*
705 * Driver transmit daemon
706 */
707void
708scc_txDaemon (void *arg)
709{
710  struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg;
711  struct ifnet *ifp = &sc->ac_if;
712  struct mbuf *m;
713  rtems_event_set events;
714
715  for (;;) {
716    /*
717     * Wait for packet
718     */
719    rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events);
720
721    /*
722     * Send packets till queue is empty
723     */
724    for (;;) {
725      /*
726       * Get the next mbuf chain to transmit.
727       */
728      IF_DEQUEUE(&ifp->if_snd, m);
729      if (!m)
730        break;
731
732      scc_sendpacket (ifp, m);
733
734    }
735    ifp->if_flags &= ~IFF_OACTIVE;
736  }
737}
738
739/*
740 * Send packet (caller provides header).
741 */
742static void
743m8260_hdlc_start (struct ifnet *ifp)
744{
745  struct m8260_hdlc_struct *sc = ifp->if_softc;
746
747  rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT);
748  ifp->if_flags |= IFF_OACTIVE;
749}
750
751/*
752 * Initialize and start the device
753 */
754static void
755scc_init (void *arg)
756{
757  struct m8260_hdlc_struct *sc = arg;
758  struct ifnet *ifp = &sc->ac_if;
759
760  if (sc->txDaemonTid == 0) {
761
762    /*
763     * Set up SCC hardware
764     */
765    m8260_scc_initialize_hardware (sc);
766
767    /*
768     * Start driver tasks
769     */
770    sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc);
771    sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc);
772
773  }
774
775#if 0
776  /*
777   * Set flags appropriately
778   */
779  if (ifp->if_flags & IFF_PROMISC)
780    m8260.scc3.psmr |= 0x200;
781  else
782    m8260.scc3.psmr &= ~0x200;
783#endif
784
785  /*
786   * Tell the world that we're running.
787   */
788  ifp->if_flags |= IFF_RUNNING;
789
790  /*
791   * Enable receiver and transmitter
792   */
793  m8260.scc3.gsmr_l |= 0x30;
794}
795
796/*
797 * Stop the device
798 */
799static void
800scc_stop (struct m8260_hdlc_struct *sc)
801{
802  struct ifnet *ifp = &sc->ac_if;
803
804  ifp->if_flags &= ~IFF_RUNNING;
805
806  /*
807   * Shut down receiver and transmitter
808   */
809  m8260.scc3.gsmr_l &= ~0x30;
810}
811
812/*
813 * Show interface statistics
814 */
815static void
816hdlc_stats (struct m8260_hdlc_struct *sc)
817{
818  printf ("      Rx Interrupts:%-8lu", sc->rxInterrupts);
819  printf ("              Giant:%-8lu", sc->rxGiant);
820  printf ("          Non-octet:%-8lu\n", sc->rxNonOctet);
821  printf ("            Bad CRC:%-8lu", sc->rxBadCRC);
822  printf ("            Overrun:%-8lu", sc->rxOverrun);
823  printf ("         No Carrier:%-8lu\n", sc->rxLostCarrier);
824  printf ("          Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc);
825
826  printf ("      Tx Interrupts:%-8lu", sc->txInterrupts);
827  printf ("         No Carrier:%-8lu", sc->txLostCarrier);
828  printf ("           Underrun:%-8lu\n", sc->txUnderrun);
829  printf ("    Raw output wait:%-8lu\n", sc->txRawWait);
830}
831
832/*
833 * Driver ioctl handler
834 */
835static int
836scc_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data)
837{
838  struct m8260_hdlc_struct *sc = ifp->if_softc;
839  int error = 0;
840
841  switch (command) {
842  case SIOCGIFADDR:
843  case SIOCSIFADDR:
844    hdlc_ioctl (ifp, command, data);
845    break;
846
847  case SIOCSIFFLAGS:
848    switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
849    case IFF_RUNNING:
850      scc_stop (sc);
851      break;
852
853    case IFF_UP:
854      scc_init (sc);
855      break;
856
857    case IFF_UP | IFF_RUNNING:
858      scc_stop (sc);
859      scc_init (sc);
860      break;
861
862    default:
863      break;
864    }
865    break;
866
867  case SIO_RTEMS_SHOW_STATS:
868    hdlc_stats (sc);
869    break;
870
871    /*
872     * FIXME: All sorts of multicast commands need to be added here!
873     */
874  default:
875    error = EINVAL;
876    break;
877  }
878  return error;
879}
880
881/*
882 * Attach an SCC driver to the system
883 */
884int
885rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config)
886{
887  struct m8260_hdlc_struct *sc;
888  struct ifnet *ifp;
889  int mtu;
890  int i;
891
892  /*
893   * Find a free driver
894   */
895  for (i = 0 ; i < NIFACES ; i++) {
896    sc = &hdlc_driver[i];
897    ifp = &sc->ac_if;
898    if (ifp->if_softc == NULL)
899      break;
900  }
901  if (i >= NIFACES) {
902    printf ("Too many SCC drivers.\n");
903    return 0;
904  }
905
906#if 0
907  /*
908   * Process options
909   */
910
911  if (config->hardware_address) {
912    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
913  }
914  else {
915    sc->arpcom.ac_enaddr[0] = 0x44;
916    sc->arpcom.ac_enaddr[1] = 0x22;
917    sc->arpcom.ac_enaddr[2] = 0x33;
918    sc->arpcom.ac_enaddr[3] = 0x33;
919    sc->arpcom.ac_enaddr[4] = 0x22;
920    sc->arpcom.ac_enaddr[5] = 0x44;
921  }
922#endif
923
924  if (config->mtu)
925    mtu = config->mtu;
926  else
927    mtu = ETHERMTU;
928  if (config->rbuf_count)
929    sc->rxBdCount = config->rbuf_count;
930  else
931    sc->rxBdCount = RX_BUF_COUNT;
932  if (config->xbuf_count)
933    sc->txBdCount = config->xbuf_count;
934  else
935    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
936  sc->acceptBroadcast = !config->ignore_broadcast;
937
938  /*
939   * Set up network interface values
940   */
941  ifp->if_softc = sc;
942  ifp->if_unit = i + 1;
943  ifp->if_name = "eth";
944  ifp->if_mtu = mtu;
945  ifp->if_init = scc_init;
946  ifp->if_ioctl = scc_ioctl;
947  ifp->if_start = m8260_hdlc_start;
948  ifp->if_output = hdlc_output;
949  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP;
950  if (ifp->if_snd.ifq_maxlen == 0)
951    ifp->if_snd.ifq_maxlen = ifqmaxlen;
952
953  /*
954   * Attach the interface
955   */
956  if_attach (ifp);
957  hdlc_ifattach (ifp);
958  return 1;
959};
960
961int
962rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
963{
964  return rtems_scc3_driver_attach( config );
965
966/*
967  if ((m8260.fec.mii_data & 0xffff) == 0x2000) {
968    return rtems_fec_driver_attach(config);
969  }
970  else {
971    return rtems_scc1_driver_attach(config);
972  }
973*/
974}
Note: See TracBrowser for help on using the repository browser.