1 | /* |
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2 | * RTEMS/TCPIP driver for MPC8260 SCC |
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3 | * |
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4 | * Modified for MPC8260 by Andy Dachs <a.dachs@sstl.co.uk> |
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5 | * Surrey Satellite Technology Limited |
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6 | * |
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7 | * On the ADS board the ethernet interface is connected to FCC2 |
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8 | * but in my application I want TCP over HDLC (see README) |
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9 | * so will use SCC3 as the network interface. I have other plans |
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10 | * for the FCCs so am unlikely to add true ethernet support to |
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11 | * this BSP. Contributions welcome! |
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12 | * |
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13 | * Modified for MPC860 by Jay Monkman (jmonkman@frasca.com) |
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14 | * |
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15 | * This supports ethernet on either SCC1 or the FEC of the MPC860T. |
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16 | * Right now, we only do 10 Mbps, even with the FEC. The function |
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17 | * rtems_m860_enet_driver_attach determines which one to use. Currently, |
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18 | * only one may be used at a time. |
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19 | * |
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20 | * W. Eric Norum |
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21 | * Saskatchewan Accelerator Laboratory |
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22 | * University of Saskatchewan |
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23 | * Saskatoon, Saskatchewan, CANADA |
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24 | * eric@skatter.usask.ca |
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25 | * |
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26 | * $Id$ |
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27 | */ |
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28 | #include <bsp.h> |
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29 | #include <bsp/irq.h> |
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30 | #include <mpc8260.h> |
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31 | #include <mpc8260/cpm.h> |
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32 | #include <stdio.h> |
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33 | #include <rtems/error.h> |
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34 | #include <rtems/rtems_bsdnet.h> |
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35 | #include <rtems/bspIo.h> |
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36 | |
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37 | #include <sys/param.h> |
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38 | #include <sys/mbuf.h> |
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39 | #include <sys/socket.h> |
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40 | #include <sys/sockio.h> |
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41 | #include <errno.h> |
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42 | |
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43 | #include <net/if.h> |
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44 | |
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45 | #include <netinet/in.h> |
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46 | #include <netinet/if_ether.h> |
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47 | |
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48 | #include "if_hdlcsubr.h" |
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49 | |
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50 | /* |
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51 | * Number of interfaces supported by this driver |
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52 | */ |
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53 | #define NIFACES 1 |
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54 | |
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55 | /* |
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56 | * Default number of buffer descriptors set aside for this driver. |
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57 | * The number of transmit buffer descriptors has to be quite large |
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58 | * since a single frame often uses four or more buffer descriptors. |
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59 | */ |
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60 | #define RX_BUF_COUNT 32 |
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61 | #define TX_BUF_COUNT 8 |
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62 | #define TX_BD_PER_BUF 4 |
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63 | |
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64 | #define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255") |
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65 | |
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66 | extern void m8xx_dump_brgs( void ); |
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67 | |
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68 | /* |
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69 | * RTEMS event used by interrupt handler to signal daemons. |
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70 | * This must *not* be the same event used by the TCP/IP task synchronization. |
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71 | */ |
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72 | #define INTERRUPT_EVENT RTEMS_EVENT_1 |
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73 | |
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74 | /* |
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75 | * RTEMS event used to start transmit daemon. |
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76 | * This must not be the same as INTERRUPT_EVENT. |
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77 | */ |
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78 | #define START_TRANSMIT_EVENT RTEMS_EVENT_2 |
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79 | |
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80 | /* |
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81 | * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518). |
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82 | * Round off to nearest multiple of RBUF_ALIGN. |
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83 | */ |
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84 | #define MAX_MTU_SIZE 1518 |
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85 | /*#define MAX_MTU_SIZE 2050*/ |
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86 | #define RBUF_ALIGN 4 |
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87 | #define RBUF_SIZE ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN) |
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88 | |
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89 | #if (MCLBYTES < RBUF_SIZE) |
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90 | # error "Driver must have MCLBYTES > RBUF_SIZE" |
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91 | #endif |
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92 | |
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93 | /* |
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94 | * Per-device data |
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95 | */ |
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96 | struct m8260_hdlc_struct { |
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97 | struct ifnet ac_if; |
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98 | struct mbuf **rxMbuf; |
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99 | struct mbuf **txMbuf; |
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100 | int acceptBroadcast; |
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101 | int rxBdCount; |
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102 | int txBdCount; |
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103 | int txBdHead; |
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104 | int txBdTail; |
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105 | int txBdActiveCount; |
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106 | m8260BufferDescriptor_t *rxBdBase; |
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107 | m8260BufferDescriptor_t *txBdBase; |
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108 | rtems_id rxDaemonTid; |
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109 | rtems_id txDaemonTid; |
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110 | |
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111 | /* |
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112 | * Statistics |
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113 | */ |
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114 | unsigned long rxNotFirst; |
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115 | unsigned long rxNotLast; |
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116 | unsigned long rxInterrupts; |
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117 | unsigned long rxGiant; |
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118 | unsigned long rxNonOctet; |
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119 | unsigned long rxAbort; |
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120 | unsigned long rxBadCRC; |
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121 | unsigned long rxOverrun; |
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122 | unsigned long rxLostCarrier; |
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123 | unsigned long txInterrupts; |
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124 | unsigned long txUnderrun; |
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125 | unsigned long txLostCarrier; |
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126 | unsigned long txRawWait; |
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127 | }; |
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128 | static struct m8260_hdlc_struct hdlc_driver[NIFACES]; |
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129 | |
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130 | static void m8xx_scc3_hdlc_on(const rtems_irq_connect_data* ptr) |
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131 | { |
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132 | } |
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133 | |
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134 | static void m8xx_scc3_hdlc_off(const rtems_irq_connect_data* ptr) |
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135 | { |
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136 | /* |
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137 | * Please put relevant code there |
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138 | */ |
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139 | } |
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140 | |
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141 | static int m8xx_scc3_hdlc_isOn(const rtems_irq_connect_data* ptr) |
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142 | { |
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143 | return BSP_irq_enabled_at_cpm (ptr->name); |
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144 | } |
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145 | |
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146 | /* |
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147 | * SCC interrupt handler |
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148 | * TBD: Can we work out which SCC generated the interrupt from the |
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149 | * value of v? If so we can use the same handler for multiple |
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150 | * SCCs. |
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151 | */ |
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152 | static void |
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153 | m8xx_scc3_interrupt_handler (rtems_irq_hdl_param unused) |
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154 | { |
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155 | /* |
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156 | * Frame received? |
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157 | */ |
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158 | if ((m8260.scc3.sccm & M8260_SCCE_RXF) && |
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159 | (m8260.scc3.scce & M8260_SCCE_RXF) ) { |
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160 | m8260.scc3.scce = M8260_SCCE_RXF; |
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161 | /* m8260.scc3.sccm &= ~M8260_SCCE_RXF; */ |
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162 | hdlc_driver[0].rxInterrupts++; |
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163 | rtems_event_send (hdlc_driver[0].rxDaemonTid, INTERRUPT_EVENT); |
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164 | /* |
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165 | printk( "Rx " ); |
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166 | */ |
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167 | } |
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168 | |
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169 | /* |
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170 | * Buffer transmitted or transmitter error? |
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171 | */ |
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172 | if ((m8260.scc3.sccm & (M8260_SCCE_TX | M8260_SCCE_TXE) ) && |
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173 | (m8260.scc3.scce & (M8260_SCCE_TX | M8260_SCCE_TXE) )) { |
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174 | m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE; |
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175 | /* m8260.scc3.sccm &= ~(M8260_SCCE_TX | M8260_SCCE_TXE); */ |
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176 | hdlc_driver[0].txInterrupts++; |
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177 | rtems_event_send (hdlc_driver[0].txDaemonTid, INTERRUPT_EVENT); |
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178 | /* |
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179 | printk( "Tx " ); |
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180 | */ |
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181 | } |
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182 | |
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183 | #if 0 |
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184 | m8260.sipnr_l = M8260_SIMASK_SCC3; /* Clear SCC3 interrupt-in-service bit */ |
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185 | #endif |
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186 | } |
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187 | |
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188 | static rtems_irq_connect_data hdlcSCC3IrqData = { |
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189 | BSP_CPM_IRQ_SCC3, |
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190 | (rtems_irq_hdl) m8xx_scc3_interrupt_handler, |
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191 | NULL, |
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192 | (rtems_irq_enable) m8xx_scc3_hdlc_on, |
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193 | (rtems_irq_disable) m8xx_scc3_hdlc_off, |
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194 | (rtems_irq_is_enabled)m8xx_scc3_hdlc_isOn |
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195 | }; |
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196 | |
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197 | /* |
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198 | * Initialize the SCC hardware |
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199 | * Configure I/O ports for SCC3 |
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200 | * Internal Tx clock, External Rx clock |
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201 | */ |
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202 | static void |
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203 | m8260_scc_initialize_hardware (struct m8260_hdlc_struct *sc) |
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204 | { |
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205 | int i; |
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206 | int brg; |
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207 | |
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208 | /* |
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209 | unsigned char *hwaddr; |
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210 | */ |
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211 | rtems_status_code status; |
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212 | /* |
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213 | rtems_isr_entry old_handler; |
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214 | */ |
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215 | |
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216 | /* RxD PB14 */ |
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217 | m8260.pparb |= 0x00020000; |
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218 | m8260.psorb &= ~0x00020000; |
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219 | m8260.pdirb &= ~0x00020000; |
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220 | |
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221 | /* RxC (CLK5) PC27 */ |
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222 | m8260.pparc |= 0x00000010; |
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223 | m8260.psorc &= ~0x00000010; |
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224 | m8260.pdirc &= ~0x00000010; |
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225 | |
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226 | /* TxD PD24 and TxC PD10 (BRG4) */ |
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227 | m8260.ppard |= 0x00200080; |
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228 | m8260.psord |= 0x00200000; |
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229 | m8260.psord &= ~0x00000080; |
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230 | m8260.pdird |= 0x00200080; |
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231 | |
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232 | /* External Rx Clock from CLK5 */ |
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233 | if( m8xx_get_clk( M8xx_CLK_5 ) == -1 ) |
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234 | printk( "Error allocating CLK5 for network device.\n" ); |
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235 | else |
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236 | m8260.cmxscr |= 0x00002000; |
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237 | |
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238 | /* Internal Tx Clock from BRG4 */ |
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239 | if( (brg = m8xx_get_brg(M8xx_BRG_4, 8000000 )) == -1 ) |
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240 | printk( "Error allocating BRG for network device\n" ); |
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241 | else |
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242 | m8260.cmxscr |= ((unsigned)brg << 8); |
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243 | |
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244 | /* |
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245 | * Allocate mbuf pointers |
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246 | */ |
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247 | sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, |
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248 | M_MBUF, M_NOWAIT); |
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249 | sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, |
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250 | M_MBUF, M_NOWAIT); |
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251 | if (!sc->rxMbuf || !sc->txMbuf) |
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252 | rtems_panic ("No memory for mbuf pointers"); |
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253 | |
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254 | /* |
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255 | * Set receiver and transmitter buffer descriptor bases |
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256 | */ |
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257 | sc->rxBdBase = m8xx_bd_allocate (sc->rxBdCount); |
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258 | sc->txBdBase = m8xx_bd_allocate (sc->txBdCount); |
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259 | |
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260 | m8260.scc3p.rbase = (char *)sc->rxBdBase - (char *)&m8260; |
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261 | m8260.scc3p.tbase = (char *)sc->txBdBase - (char *)&m8260; |
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262 | |
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263 | /* |
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264 | * Send "Init parameters" command |
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265 | */ |
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266 | |
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267 | m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 ); |
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268 | |
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269 | /* |
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270 | * Set receive and transmit function codes |
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271 | */ |
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272 | m8260.scc3p.rfcr = M8260_RFCR_MOT | M8260_RFCR_60X_BUS; |
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273 | m8260.scc3p.tfcr = M8260_TFCR_MOT | M8260_TFCR_60X_BUS; |
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274 | |
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275 | /* |
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276 | * Set maximum receive buffer length |
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277 | */ |
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278 | m8260.scc3p.mrblr = RBUF_SIZE; |
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279 | |
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280 | m8260.scc3p.un.hdlc.c_mask = 0xF0B8; |
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281 | m8260.scc3p.un.hdlc.c_pres = 0xFFFF; |
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282 | m8260.scc3p.un.hdlc.disfc = 0; |
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283 | m8260.scc3p.un.hdlc.crcec = 0; |
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284 | m8260.scc3p.un.hdlc.abtsc = 0; |
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285 | m8260.scc3p.un.hdlc.nmarc = 0; |
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286 | m8260.scc3p.un.hdlc.retrc = 0; |
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287 | m8260.scc3p.un.hdlc.rfthr = 1; |
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288 | m8260.scc3p.un.hdlc.mflr = RBUF_SIZE; |
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289 | |
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290 | m8260.scc3p.un.hdlc.hmask = 0x0000; /* promiscuous */ |
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291 | |
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292 | m8260.scc3p.un.hdlc.haddr1 = 0xFFFF; /* Broadcast address */ |
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293 | m8260.scc3p.un.hdlc.haddr2 = 0xFFFF; /* Station address */ |
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294 | m8260.scc3p.un.hdlc.haddr3 = 0xFFFF; /* Dummy */ |
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295 | m8260.scc3p.un.hdlc.haddr4 = 0xFFFF; /* Dummy */ |
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296 | |
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297 | /* |
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298 | * Send "Init parameters" command |
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299 | */ |
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300 | /* |
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301 | m8xx_cp_execute_cmd (M8260_CR_OP_INIT_RX_TX | M8260_CR_SCC3 ); |
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302 | */ |
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303 | |
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304 | /* |
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305 | * Set up receive buffer descriptors |
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306 | */ |
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307 | for (i = 0 ; i < sc->rxBdCount ; i++) { |
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308 | (sc->rxBdBase + i)->status = 0; |
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309 | } |
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310 | |
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311 | /* |
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312 | * Set up transmit buffer descriptors |
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313 | */ |
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314 | for (i = 0 ; i < sc->txBdCount ; i++) { |
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315 | (sc->txBdBase + i)->status = 0; |
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316 | sc->txMbuf[i] = NULL; |
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317 | } |
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318 | sc->txBdHead = sc->txBdTail = 0; |
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319 | sc->txBdActiveCount = 0; |
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320 | |
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321 | m8260.scc3.sccm = 0; /* No interrupts unmasked till necessary */ |
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322 | |
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323 | /* |
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324 | * Clear any outstanding events |
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325 | */ |
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326 | m8260.scc3.scce = 0xFFFF; |
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327 | |
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328 | /* |
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329 | * Set up interrupts |
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330 | */ |
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331 | status = BSP_install_rtems_irq_handler (&hdlcSCC3IrqData); |
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332 | /* |
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333 | printk( "status = %d, Success = %d\n", status, RTEMS_SUCCESSFUL ); |
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334 | */ |
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335 | if (status != 1 /*RTEMS_SUCCESSFUL*/ ) { |
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336 | rtems_panic ("Can't attach M8260 SCC3 interrupt handler: %s\n", |
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337 | rtems_status_text (status)); |
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338 | } |
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339 | m8260.scc3.sccm = 0; /* No interrupts unmasked till necessary */ |
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340 | |
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341 | m8260.scc3.gsmr_h = 0; |
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342 | m8260.scc3.gsmr_l = 0x10000000; |
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343 | m8260.scc3.dsr = 0x7E7E; /* flag character */ |
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344 | m8260.scc3.psmr = 0x2000; /* 2 flags between Tx'd frames */ |
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345 | |
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346 | /* printk("scc3 init\n" ); */ |
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347 | |
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348 | m8260.scc3.gsmr_l |= 0x00000030; /* Set ENR and ENT to enable Rx and Tx */ |
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349 | |
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350 | } |
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351 | |
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352 | /* |
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353 | * Soak up buffer descriptors that have been sent |
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354 | * Note that a buffer descriptor can't be retired as soon as it becomes |
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355 | * ready. The MC68360 Errata (May 96) says that, "If an Ethernet frame is |
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356 | * made up of multiple buffers, the user should not reuse the first buffer |
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357 | * descriptor until the last buffer descriptor of the frame has had its |
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358 | * ready bit cleared by the CPM". |
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359 | */ |
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360 | static void |
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361 | m8260Enet_retire_tx_bd (struct m8260_hdlc_struct *sc) |
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362 | { |
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363 | uint16_t status; |
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364 | int i; |
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365 | int nRetired; |
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366 | struct mbuf *m, *n; |
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367 | |
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368 | i = sc->txBdTail; |
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369 | nRetired = 0; |
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370 | while ((sc->txBdActiveCount != 0) |
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371 | && (((status = (sc->txBdBase + i)->status) & M8260_BD_READY) == 0)) { |
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372 | /* |
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373 | * See if anything went wrong |
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374 | */ |
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375 | if (status & (M8260_BD_UNDERRUN | |
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376 | M8260_BD_CTS_LOST)) { |
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377 | /* |
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378 | * Check for errors which stop the transmitter. |
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379 | */ |
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380 | if( status & M8260_BD_UNDERRUN ) { |
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381 | hdlc_driver[0].txUnderrun++; |
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382 | |
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383 | /* |
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384 | * Restart the transmitter |
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385 | */ |
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386 | /* FIXME: this should get executed only if using the SCC */ |
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387 | m8xx_cp_execute_cmd (M8260_CR_OP_RESTART_TX | M8260_CR_SCC3); |
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388 | } |
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389 | if (status & M8260_BD_CTS_LOST) |
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390 | hdlc_driver[0].txLostCarrier++; |
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391 | } |
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392 | nRetired++; |
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393 | if (status & M8260_BD_LAST) { |
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394 | /* |
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395 | * A full frame has been transmitted. |
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396 | * Free all the associated buffer descriptors. |
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397 | */ |
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398 | sc->txBdActiveCount -= nRetired; |
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399 | while (nRetired) { |
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400 | nRetired--; |
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401 | m = sc->txMbuf[sc->txBdTail]; |
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402 | MFREE (m, n); |
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403 | if (++sc->txBdTail == sc->txBdCount) |
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404 | sc->txBdTail = 0; |
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405 | } |
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406 | } |
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407 | if (++i == sc->txBdCount) |
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408 | i = 0; |
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409 | } |
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410 | } |
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411 | |
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412 | /* |
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413 | * reader task |
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414 | */ |
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415 | static void |
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416 | scc_rxDaemon (void *arg) |
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417 | { |
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418 | struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg; |
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419 | struct ifnet *ifp = &sc->ac_if; |
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420 | struct mbuf *m; |
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421 | uint16_t status; |
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422 | m8260BufferDescriptor_t *rxBd; |
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423 | int rxBdIndex; |
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424 | |
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425 | /* |
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426 | * Allocate space for incoming packets and start reception |
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427 | */ |
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428 | for (rxBdIndex = 0 ; ;) { |
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429 | rxBd = sc->rxBdBase + rxBdIndex; |
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430 | MGETHDR (m, M_WAIT, MT_DATA); |
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431 | MCLGET (m, M_WAIT); |
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432 | m->m_pkthdr.rcvif = ifp; |
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433 | sc->rxMbuf[rxBdIndex] = m; |
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434 | rxBd->buffer = mtod (m, void *); |
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435 | rxBd->status = M8260_BD_EMPTY | M8260_BD_INTERRUPT; |
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436 | if (++rxBdIndex == sc->rxBdCount) { |
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437 | rxBd->status |= M8260_BD_WRAP; |
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438 | break; |
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439 | } |
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440 | } |
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441 | |
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442 | /* |
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443 | m8260.scc3.sccm |= M8260_SCCE_RXF; |
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444 | */ |
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445 | |
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446 | /* |
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447 | * Input packet handling loop |
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448 | */ |
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449 | rxBdIndex = 0; |
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450 | for (;;) { |
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451 | rxBd = sc->rxBdBase + rxBdIndex; |
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452 | |
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453 | /* |
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454 | * Wait for packet if there's not one ready |
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455 | */ |
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456 | if ((status = rxBd->status) & M8260_BD_EMPTY) { |
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457 | /* |
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458 | * Clear old events |
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459 | */ |
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460 | |
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461 | m8260.scc3.scce = M8260_SCCE_RXF; |
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462 | |
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463 | /* |
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464 | * Wait for packet |
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465 | * Note that the buffer descriptor is checked |
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466 | * *before* the event wait -- this catches the |
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467 | * possibility that a packet arrived between the |
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468 | * `if' above, and the clearing of the event register. |
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469 | */ |
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470 | while ((status = rxBd->status) & M8260_BD_EMPTY) { |
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471 | rtems_event_set events; |
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472 | |
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473 | /* |
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474 | * Unmask RXF (Full frame received) event |
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475 | */ |
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476 | m8260.scc3.sccm |= M8260_SCCE_RXF; |
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477 | |
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478 | /* printk( "Rxdwait "); */ |
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479 | |
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480 | rtems_bsdnet_event_receive (INTERRUPT_EVENT, |
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481 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
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482 | RTEMS_NO_TIMEOUT, |
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483 | &events); |
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484 | |
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485 | /* printk( "Rxd " ); */ |
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486 | } |
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487 | } |
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488 | |
---|
489 | /* |
---|
490 | * Check that packet is valid |
---|
491 | */ |
---|
492 | if ((status & (M8260_BD_LAST | |
---|
493 | M8260_BD_FIRST_IN_FRAME | |
---|
494 | M8260_BD_LONG | |
---|
495 | M8260_BD_NONALIGNED | |
---|
496 | M8260_BD_ABORT | |
---|
497 | M8260_BD_CRC_ERROR | |
---|
498 | M8260_BD_OVERRUN /*| |
---|
499 | M8260_BD_CARRIER_LOST*/)) == |
---|
500 | (M8260_BD_LAST | |
---|
501 | M8260_BD_FIRST_IN_FRAME ) ) { |
---|
502 | |
---|
503 | /* printk( "RxV " ); */ |
---|
504 | |
---|
505 | /* |
---|
506 | * Invalidate the buffer for this descriptor |
---|
507 | */ |
---|
508 | |
---|
509 | rtems_cache_invalidate_multiple_data_lines((void *)rxBd->buffer, rxBd->length); |
---|
510 | |
---|
511 | m = sc->rxMbuf[rxBdIndex]; |
---|
512 | |
---|
513 | /* strip off HDLC CRC */ |
---|
514 | m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint16_t); |
---|
515 | |
---|
516 | hdlc_input( ifp, m ); |
---|
517 | |
---|
518 | /* |
---|
519 | * Allocate a new mbuf |
---|
520 | */ |
---|
521 | MGETHDR (m, M_WAIT, MT_DATA); |
---|
522 | MCLGET (m, M_WAIT); |
---|
523 | m->m_pkthdr.rcvif = ifp; |
---|
524 | sc->rxMbuf[rxBdIndex] = m; |
---|
525 | rxBd->buffer = mtod (m, void *); |
---|
526 | } |
---|
527 | else { |
---|
528 | printk( "RxErr[%04X,%d]", status, rxBd->length ); |
---|
529 | /* |
---|
530 | * Something went wrong with the reception |
---|
531 | */ |
---|
532 | if (!(status & M8260_BD_LAST)) |
---|
533 | sc->rxNotLast++; |
---|
534 | if (!(status & M8260_BD_FIRST_IN_FRAME)) |
---|
535 | sc->rxNotFirst++; |
---|
536 | |
---|
537 | if (status & M8260_BD_LONG) |
---|
538 | sc->rxGiant++; |
---|
539 | if (status & M8260_BD_NONALIGNED) |
---|
540 | sc->rxNonOctet++; |
---|
541 | if (status & M8260_BD_ABORT) |
---|
542 | sc->rxAbort++; |
---|
543 | if (status & M8260_BD_CRC_ERROR) |
---|
544 | sc->rxBadCRC++; |
---|
545 | if (status & M8260_BD_OVERRUN) |
---|
546 | sc->rxOverrun++; |
---|
547 | if (status & M8260_BD_CARRIER_LOST) |
---|
548 | sc->rxLostCarrier++; |
---|
549 | } |
---|
550 | |
---|
551 | /* |
---|
552 | * Reenable the buffer descriptor |
---|
553 | */ |
---|
554 | rxBd->status = (status & (M8260_BD_WRAP | M8260_BD_INTERRUPT)) | |
---|
555 | M8260_BD_EMPTY; |
---|
556 | |
---|
557 | /* |
---|
558 | * Move to next buffer descriptor |
---|
559 | */ |
---|
560 | if (++rxBdIndex == sc->rxBdCount) |
---|
561 | rxBdIndex = 0; |
---|
562 | } |
---|
563 | } |
---|
564 | |
---|
565 | static void |
---|
566 | scc_sendpacket (struct ifnet *ifp, struct mbuf *m) |
---|
567 | { |
---|
568 | struct m8260_hdlc_struct *sc = ifp->if_softc; |
---|
569 | volatile m8260BufferDescriptor_t *firstTxBd, *txBd; |
---|
570 | struct mbuf *l = NULL; |
---|
571 | uint16_t status; |
---|
572 | int nAdded; |
---|
573 | |
---|
574 | /* |
---|
575 | * Free up buffer descriptors |
---|
576 | */ |
---|
577 | m8260Enet_retire_tx_bd (sc); |
---|
578 | |
---|
579 | /* |
---|
580 | * Set up the transmit buffer descriptors. |
---|
581 | * No need to pad out short packets since the |
---|
582 | * hardware takes care of that automatically. |
---|
583 | * No need to copy the packet to a contiguous buffer |
---|
584 | * since the hardware is capable of scatter/gather DMA. |
---|
585 | */ |
---|
586 | nAdded = 0; |
---|
587 | txBd = firstTxBd = sc->txBdBase + sc->txBdHead; |
---|
588 | |
---|
589 | /* |
---|
590 | m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE); |
---|
591 | */ |
---|
592 | |
---|
593 | for (;;) { |
---|
594 | /* |
---|
595 | * Wait for buffer descriptor to become available. |
---|
596 | */ |
---|
597 | if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { |
---|
598 | /* |
---|
599 | * Clear old events |
---|
600 | */ |
---|
601 | m8260.scc3.scce = M8260_SCCE_TX | M8260_SCCE_TXE; |
---|
602 | |
---|
603 | /* |
---|
604 | * Wait for buffer descriptor to become available. |
---|
605 | * Note that the buffer descriptors are checked |
---|
606 | * *before* * entering the wait loop -- this catches |
---|
607 | * the possibility that a buffer descriptor became |
---|
608 | * available between the `if' above, and the clearing |
---|
609 | * of the event register. |
---|
610 | * This is to catch the case where the transmitter |
---|
611 | * stops in the middle of a frame -- and only the |
---|
612 | * last buffer descriptor in a frame can generate |
---|
613 | * an interrupt. |
---|
614 | */ |
---|
615 | m8260Enet_retire_tx_bd (sc); |
---|
616 | while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { |
---|
617 | rtems_event_set events; |
---|
618 | |
---|
619 | /* |
---|
620 | * Unmask TX (buffer transmitted) event |
---|
621 | */ |
---|
622 | m8260.scc3.sccm |= (M8260_SCCE_TX | M8260_SCCE_TXE); |
---|
623 | |
---|
624 | rtems_bsdnet_event_receive (INTERRUPT_EVENT, |
---|
625 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
626 | RTEMS_NO_TIMEOUT, |
---|
627 | &events); |
---|
628 | m8260Enet_retire_tx_bd (sc); |
---|
629 | } |
---|
630 | } |
---|
631 | |
---|
632 | /* |
---|
633 | * Don't set the READY flag till the |
---|
634 | * whole packet has been readied. |
---|
635 | */ |
---|
636 | status = nAdded ? M8260_BD_READY : 0; |
---|
637 | |
---|
638 | /* |
---|
639 | * FIXME: Why not deal with empty mbufs at at higher level? |
---|
640 | * The IP fragmentation routine in ip_output |
---|
641 | * can produce packet fragments with zero length. |
---|
642 | * I think that ip_output should be changed to get |
---|
643 | * rid of these zero-length mbufs, but for now, |
---|
644 | * I'll deal with them here. |
---|
645 | */ |
---|
646 | if (m->m_len) { |
---|
647 | /* |
---|
648 | * Fill in the buffer descriptor |
---|
649 | */ |
---|
650 | |
---|
651 | txBd->buffer = mtod (m, void *); |
---|
652 | txBd->length = m->m_len; |
---|
653 | |
---|
654 | /* |
---|
655 | * Flush the buffer for this descriptor |
---|
656 | */ |
---|
657 | |
---|
658 | rtems_cache_flush_multiple_data_lines((void *)txBd->buffer, txBd->length); |
---|
659 | |
---|
660 | /* throw off the header for Ethernet Emulation mode */ |
---|
661 | /* |
---|
662 | txBd->buffer = mtod (m, void *); |
---|
663 | txBd->buffer += sizeof( struct ether_header ) + 2; |
---|
664 | txBd->length = m->m_len - sizeof( struct ether_header ) - 2; |
---|
665 | */ |
---|
666 | sc->txMbuf[sc->txBdHead] = m; |
---|
667 | nAdded++; |
---|
668 | if (++sc->txBdHead == sc->txBdCount) { |
---|
669 | status |= M8260_BD_WRAP; |
---|
670 | sc->txBdHead = 0; |
---|
671 | } |
---|
672 | l = m; |
---|
673 | m = m->m_next; |
---|
674 | } |
---|
675 | else { |
---|
676 | /* |
---|
677 | * Just toss empty mbufs |
---|
678 | */ |
---|
679 | struct mbuf *n; |
---|
680 | MFREE (m, n); |
---|
681 | m = n; |
---|
682 | if (l != NULL) |
---|
683 | l->m_next = m; |
---|
684 | } |
---|
685 | |
---|
686 | /* |
---|
687 | * Set the transmit buffer status. |
---|
688 | * Break out of the loop if this mbuf is the last in the frame. |
---|
689 | */ |
---|
690 | if (m == NULL) { |
---|
691 | if (nAdded) { |
---|
692 | status |= M8260_BD_LAST | M8260_BD_TX_CRC | M8260_BD_INTERRUPT; |
---|
693 | txBd->status = status; |
---|
694 | firstTxBd->status |= M8260_BD_READY; |
---|
695 | sc->txBdActiveCount += nAdded; |
---|
696 | } |
---|
697 | break; |
---|
698 | } |
---|
699 | txBd->status = status; |
---|
700 | txBd = sc->txBdBase + sc->txBdHead; |
---|
701 | } |
---|
702 | } |
---|
703 | |
---|
704 | /* |
---|
705 | * Driver transmit daemon |
---|
706 | */ |
---|
707 | void |
---|
708 | scc_txDaemon (void *arg) |
---|
709 | { |
---|
710 | struct m8260_hdlc_struct *sc = (struct m8260_hdlc_struct *)arg; |
---|
711 | struct ifnet *ifp = &sc->ac_if; |
---|
712 | struct mbuf *m; |
---|
713 | rtems_event_set events; |
---|
714 | |
---|
715 | for (;;) { |
---|
716 | /* |
---|
717 | * Wait for packet |
---|
718 | */ |
---|
719 | rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); |
---|
720 | |
---|
721 | /* |
---|
722 | * Send packets till queue is empty |
---|
723 | */ |
---|
724 | for (;;) { |
---|
725 | /* |
---|
726 | * Get the next mbuf chain to transmit. |
---|
727 | */ |
---|
728 | IF_DEQUEUE(&ifp->if_snd, m); |
---|
729 | if (!m) |
---|
730 | break; |
---|
731 | |
---|
732 | scc_sendpacket (ifp, m); |
---|
733 | |
---|
734 | } |
---|
735 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
736 | } |
---|
737 | } |
---|
738 | |
---|
739 | /* |
---|
740 | * Send packet (caller provides header). |
---|
741 | */ |
---|
742 | static void |
---|
743 | m8260_hdlc_start (struct ifnet *ifp) |
---|
744 | { |
---|
745 | struct m8260_hdlc_struct *sc = ifp->if_softc; |
---|
746 | |
---|
747 | rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); |
---|
748 | ifp->if_flags |= IFF_OACTIVE; |
---|
749 | } |
---|
750 | |
---|
751 | /* |
---|
752 | * Initialize and start the device |
---|
753 | */ |
---|
754 | static void |
---|
755 | scc_init (void *arg) |
---|
756 | { |
---|
757 | struct m8260_hdlc_struct *sc = arg; |
---|
758 | struct ifnet *ifp = &sc->ac_if; |
---|
759 | |
---|
760 | if (sc->txDaemonTid == 0) { |
---|
761 | |
---|
762 | /* |
---|
763 | * Set up SCC hardware |
---|
764 | */ |
---|
765 | m8260_scc_initialize_hardware (sc); |
---|
766 | |
---|
767 | /* |
---|
768 | * Start driver tasks |
---|
769 | */ |
---|
770 | sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc); |
---|
771 | sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc); |
---|
772 | |
---|
773 | } |
---|
774 | |
---|
775 | #if 0 |
---|
776 | /* |
---|
777 | * Set flags appropriately |
---|
778 | */ |
---|
779 | if (ifp->if_flags & IFF_PROMISC) |
---|
780 | m8260.scc3.psmr |= 0x200; |
---|
781 | else |
---|
782 | m8260.scc3.psmr &= ~0x200; |
---|
783 | #endif |
---|
784 | |
---|
785 | /* |
---|
786 | * Tell the world that we're running. |
---|
787 | */ |
---|
788 | ifp->if_flags |= IFF_RUNNING; |
---|
789 | |
---|
790 | /* |
---|
791 | * Enable receiver and transmitter |
---|
792 | */ |
---|
793 | m8260.scc3.gsmr_l |= 0x30; |
---|
794 | } |
---|
795 | |
---|
796 | /* |
---|
797 | * Stop the device |
---|
798 | */ |
---|
799 | static void |
---|
800 | scc_stop (struct m8260_hdlc_struct *sc) |
---|
801 | { |
---|
802 | struct ifnet *ifp = &sc->ac_if; |
---|
803 | |
---|
804 | ifp->if_flags &= ~IFF_RUNNING; |
---|
805 | |
---|
806 | /* |
---|
807 | * Shut down receiver and transmitter |
---|
808 | */ |
---|
809 | m8260.scc3.gsmr_l &= ~0x30; |
---|
810 | } |
---|
811 | |
---|
812 | /* |
---|
813 | * Show interface statistics |
---|
814 | */ |
---|
815 | static void |
---|
816 | hdlc_stats (struct m8260_hdlc_struct *sc) |
---|
817 | { |
---|
818 | printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); |
---|
819 | printf (" Giant:%-8lu", sc->rxGiant); |
---|
820 | printf (" Non-octet:%-8lu\n", sc->rxNonOctet); |
---|
821 | printf (" Bad CRC:%-8lu", sc->rxBadCRC); |
---|
822 | printf (" Overrun:%-8lu", sc->rxOverrun); |
---|
823 | printf (" No Carrier:%-8lu\n", sc->rxLostCarrier); |
---|
824 | printf (" Discarded:%-8lu\n", (unsigned long)m8260.scc3p.un.hdlc.disfc); |
---|
825 | |
---|
826 | printf (" Tx Interrupts:%-8lu", sc->txInterrupts); |
---|
827 | printf (" No Carrier:%-8lu", sc->txLostCarrier); |
---|
828 | printf (" Underrun:%-8lu\n", sc->txUnderrun); |
---|
829 | printf (" Raw output wait:%-8lu\n", sc->txRawWait); |
---|
830 | } |
---|
831 | |
---|
832 | /* |
---|
833 | * Driver ioctl handler |
---|
834 | */ |
---|
835 | static int |
---|
836 | scc_ioctl (struct ifnet *ifp, ioctl_command_t command, caddr_t data) |
---|
837 | { |
---|
838 | struct m8260_hdlc_struct *sc = ifp->if_softc; |
---|
839 | int error = 0; |
---|
840 | |
---|
841 | switch (command) { |
---|
842 | case SIOCGIFADDR: |
---|
843 | case SIOCSIFADDR: |
---|
844 | hdlc_ioctl (ifp, command, data); |
---|
845 | break; |
---|
846 | |
---|
847 | case SIOCSIFFLAGS: |
---|
848 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { |
---|
849 | case IFF_RUNNING: |
---|
850 | scc_stop (sc); |
---|
851 | break; |
---|
852 | |
---|
853 | case IFF_UP: |
---|
854 | scc_init (sc); |
---|
855 | break; |
---|
856 | |
---|
857 | case IFF_UP | IFF_RUNNING: |
---|
858 | scc_stop (sc); |
---|
859 | scc_init (sc); |
---|
860 | break; |
---|
861 | |
---|
862 | default: |
---|
863 | break; |
---|
864 | } |
---|
865 | break; |
---|
866 | |
---|
867 | case SIO_RTEMS_SHOW_STATS: |
---|
868 | hdlc_stats (sc); |
---|
869 | break; |
---|
870 | |
---|
871 | /* |
---|
872 | * FIXME: All sorts of multicast commands need to be added here! |
---|
873 | */ |
---|
874 | default: |
---|
875 | error = EINVAL; |
---|
876 | break; |
---|
877 | } |
---|
878 | return error; |
---|
879 | } |
---|
880 | |
---|
881 | /* |
---|
882 | * Attach an SCC driver to the system |
---|
883 | */ |
---|
884 | int |
---|
885 | rtems_scc3_driver_attach (struct rtems_bsdnet_ifconfig *config) |
---|
886 | { |
---|
887 | struct m8260_hdlc_struct *sc; |
---|
888 | struct ifnet *ifp; |
---|
889 | int mtu; |
---|
890 | int i; |
---|
891 | |
---|
892 | /* |
---|
893 | * Find a free driver |
---|
894 | */ |
---|
895 | for (i = 0 ; i < NIFACES ; i++) { |
---|
896 | sc = &hdlc_driver[i]; |
---|
897 | ifp = &sc->ac_if; |
---|
898 | if (ifp->if_softc == NULL) |
---|
899 | break; |
---|
900 | } |
---|
901 | if (i >= NIFACES) { |
---|
902 | printf ("Too many SCC drivers.\n"); |
---|
903 | return 0; |
---|
904 | } |
---|
905 | |
---|
906 | #if 0 |
---|
907 | /* |
---|
908 | * Process options |
---|
909 | */ |
---|
910 | |
---|
911 | if (config->hardware_address) { |
---|
912 | memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN); |
---|
913 | } |
---|
914 | else { |
---|
915 | sc->arpcom.ac_enaddr[0] = 0x44; |
---|
916 | sc->arpcom.ac_enaddr[1] = 0x22; |
---|
917 | sc->arpcom.ac_enaddr[2] = 0x33; |
---|
918 | sc->arpcom.ac_enaddr[3] = 0x33; |
---|
919 | sc->arpcom.ac_enaddr[4] = 0x22; |
---|
920 | sc->arpcom.ac_enaddr[5] = 0x44; |
---|
921 | } |
---|
922 | #endif |
---|
923 | |
---|
924 | if (config->mtu) |
---|
925 | mtu = config->mtu; |
---|
926 | else |
---|
927 | mtu = ETHERMTU; |
---|
928 | if (config->rbuf_count) |
---|
929 | sc->rxBdCount = config->rbuf_count; |
---|
930 | else |
---|
931 | sc->rxBdCount = RX_BUF_COUNT; |
---|
932 | if (config->xbuf_count) |
---|
933 | sc->txBdCount = config->xbuf_count; |
---|
934 | else |
---|
935 | sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; |
---|
936 | sc->acceptBroadcast = !config->ignore_broadcast; |
---|
937 | |
---|
938 | /* |
---|
939 | * Set up network interface values |
---|
940 | */ |
---|
941 | ifp->if_softc = sc; |
---|
942 | ifp->if_unit = i + 1; |
---|
943 | ifp->if_name = "eth"; |
---|
944 | ifp->if_mtu = mtu; |
---|
945 | ifp->if_init = scc_init; |
---|
946 | ifp->if_ioctl = scc_ioctl; |
---|
947 | ifp->if_start = m8260_hdlc_start; |
---|
948 | ifp->if_output = hdlc_output; |
---|
949 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | /*IFF_PROMISC |*/ IFF_NOARP; |
---|
950 | if (ifp->if_snd.ifq_maxlen == 0) |
---|
951 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
---|
952 | |
---|
953 | /* |
---|
954 | * Attach the interface |
---|
955 | */ |
---|
956 | if_attach (ifp); |
---|
957 | hdlc_ifattach (ifp); |
---|
958 | return 1; |
---|
959 | }; |
---|
960 | |
---|
961 | int |
---|
962 | rtems_enet_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching) |
---|
963 | { |
---|
964 | return rtems_scc3_driver_attach( config ); |
---|
965 | |
---|
966 | /* |
---|
967 | if ((m8260.fec.mii_data & 0xffff) == 0x2000) { |
---|
968 | return rtems_fec_driver_attach(config); |
---|
969 | } |
---|
970 | else { |
---|
971 | return rtems_scc1_driver_attach(config); |
---|
972 | } |
---|
973 | */ |
---|
974 | } |
---|