1 | /* irq.h |
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2 | * |
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3 | * This include file describe the data structure and the functions implemented |
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4 | * by rtems to write interrupt handlers. |
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5 | * |
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6 | * CopyRight (C) 1999 valette@crf.canon.fr |
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7 | * |
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8 | * This code is heavilly inspired by the public specification of STREAM V2 |
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9 | * that can be found at : |
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10 | * |
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11 | * <http://www.chorus.com/Documentation/index.html> by following |
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12 | * the STREAM API Specification Document link. |
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13 | * |
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14 | * Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk> |
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15 | * Surrey Satellite Technology Limited |
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16 | * The interrupt handling on the mpc8260 seems quite different from |
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17 | * the 860 (I don't know the 860 well). Although some interrupts |
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18 | * are routed via the CPM irq and some are direct to the SIU they all |
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19 | * appear logically the same. Therefore I removed the distinction |
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20 | * between SIU and CPM interrupts. |
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21 | * |
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22 | * The license and distribution terms for this file may be |
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23 | * found in found in the file LICENSE in this distribution or at |
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24 | * http://www.rtems.com/license/LICENSE. |
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25 | * |
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26 | * $Id$ |
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27 | */ |
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28 | |
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29 | #ifndef LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H |
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30 | #define LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H |
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31 | |
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32 | #define BSP_ASM_IRQ_VECTOR_BASE 0x0 |
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33 | |
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34 | #ifndef ASM |
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35 | |
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36 | #ifdef __cplusplus |
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37 | extern "C" { |
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38 | #endif |
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39 | |
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40 | /* |
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41 | extern volatile unsigned int ppc_cached_irq_mask; |
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42 | */ |
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43 | |
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44 | /* |
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45 | * Symblolic IRQ names and related definitions. |
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46 | */ |
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47 | |
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48 | typedef enum { |
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49 | /* Base vector for our SIU IRQ handlers. */ |
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50 | BSP_SIU_VECTOR_BASE = BSP_ASM_IRQ_VECTOR_BASE, |
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51 | |
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52 | /* |
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53 | * CPM IRQ handlers related definitions |
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54 | * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE |
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55 | */ |
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56 | BSP_CPM_IRQ_NUMBER = 64, |
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57 | BSP_CPM_IRQ_LOWEST_OFFSET = BSP_SIU_VECTOR_BASE, |
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58 | BSP_CPM_IRQ_MAX_OFFSET = BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1, |
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59 | /* |
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60 | * PowerPc exceptions handled as interrupt where a rtems managed interrupt |
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61 | * handler might be connected |
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62 | */ |
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63 | BSP_PROCESSOR_IRQ_NUMBER = 1, |
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64 | BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_CPM_IRQ_MAX_OFFSET + 1, |
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65 | BSP_PROCESSOR_IRQ_MAX_OFFSET = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1, |
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66 | /* |
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67 | * Summary |
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68 | */ |
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69 | BSP_IRQ_NUMBER = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1, |
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70 | BSP_LOWEST_OFFSET = BSP_CPM_IRQ_LOWEST_OFFSET, |
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71 | BSP_MAX_OFFSET = BSP_PROCESSOR_IRQ_MAX_OFFSET, |
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72 | |
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73 | /* |
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74 | * Some SIU IRQ symbolic name definition. Please note that |
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75 | * INT IRQ are defined but a single one will be used to |
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76 | * redirect all CPM interrupt. |
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77 | * |
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78 | * On the mpc8260 all this seems to be transparent. Although the |
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79 | * CPM, PIT and TMCNT interrupt may well be the only interrupts routed |
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80 | * to the SIU at the hardware level all of them appear as CPM interupts |
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81 | * to software apart from the registers for setting priority. |
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82 | * |
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83 | * The MPC8260 User Manual seems shot through with inconsistencies |
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84 | * about this whole area. |
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85 | */ |
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86 | |
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87 | /* |
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88 | * Some CPM IRQ symbolic name definition |
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89 | */ |
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90 | BSP_CPM_IRQ_ERROR = BSP_CPM_IRQ_LOWEST_OFFSET, |
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91 | BSP_CPM_IRQ_I2C = BSP_CPM_IRQ_LOWEST_OFFSET + 1, |
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92 | BSP_CPM_IRQ_SPI = BSP_CPM_IRQ_LOWEST_OFFSET + 2, |
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93 | BSP_CPM_IRQ_RISC_TIMERS = BSP_CPM_IRQ_LOWEST_OFFSET + 3, |
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94 | BSP_CPM_IRQ_SMC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 4, |
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95 | BSP_CPM_IRQ_SMC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 5, |
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96 | BSP_CPM_IRQ_IDMA1 = BSP_CPM_IRQ_LOWEST_OFFSET + 6, |
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97 | BSP_CPM_IRQ_IDMA2 = BSP_CPM_IRQ_LOWEST_OFFSET + 7, |
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98 | BSP_CPM_IRQ_IDMA3 = BSP_CPM_IRQ_LOWEST_OFFSET + 8, |
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99 | BSP_CPM_IRQ_IDMA4 = BSP_CPM_IRQ_LOWEST_OFFSET + 9, |
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100 | BSP_CPM_IRQ_SDMA = BSP_CPM_IRQ_LOWEST_OFFSET + 10, |
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101 | |
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102 | BSP_CPM_IRQ_TIMER_1 = BSP_CPM_IRQ_LOWEST_OFFSET + 12, |
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103 | BSP_CPM_IRQ_TIMER_2 = BSP_CPM_IRQ_LOWEST_OFFSET + 13, |
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104 | BSP_CPM_IRQ_TIMER_3 = BSP_CPM_IRQ_LOWEST_OFFSET + 14, |
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105 | BSP_CPM_IRQ_TIMER_4 = BSP_CPM_IRQ_LOWEST_OFFSET + 15, |
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106 | BSP_CPM_IRQ_TMCNT = BSP_CPM_IRQ_LOWEST_OFFSET + 16, |
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107 | BSP_CPM_IRQ_PIT = BSP_CPM_IRQ_LOWEST_OFFSET + 17, |
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108 | |
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109 | BSP_CPM_IRQ_IRQ1 = BSP_CPM_IRQ_LOWEST_OFFSET + 19, |
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110 | BSP_CPM_IRQ_IRQ2 = BSP_CPM_IRQ_LOWEST_OFFSET + 20, |
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111 | BSP_CPM_IRQ_IRQ3 = BSP_CPM_IRQ_LOWEST_OFFSET + 21, |
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112 | BSP_CPM_IRQ_IRQ4 = BSP_CPM_IRQ_LOWEST_OFFSET + 22, |
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113 | BSP_CPM_IRQ_IRQ5 = BSP_CPM_IRQ_LOWEST_OFFSET + 23, |
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114 | BSP_CPM_IRQ_IRQ6 = BSP_CPM_IRQ_LOWEST_OFFSET + 24, |
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115 | BSP_CPM_IRQ_IRQ7 = BSP_CPM_IRQ_LOWEST_OFFSET + 25, |
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116 | |
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117 | BSP_CPM_IRQ_FCC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 32, |
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118 | BSP_CPM_IRQ_FCC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 33, |
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119 | BSP_CPM_IRQ_FCC3 = BSP_CPM_IRQ_LOWEST_OFFSET + 34, |
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120 | |
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121 | BSP_CPM_IRQ_MCC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 36, |
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122 | BSP_CPM_IRQ_MCC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 37, |
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123 | |
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124 | BSP_CPM_IRQ_SCC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 40, |
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125 | BSP_CPM_IRQ_SCC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 41, |
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126 | BSP_CPM_IRQ_SCC3 = BSP_CPM_IRQ_LOWEST_OFFSET + 42, |
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127 | BSP_CPM_IRQ_SCC4 = BSP_CPM_IRQ_LOWEST_OFFSET + 43, |
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128 | |
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129 | BSP_CPM_IRQ_PC15 = BSP_CPM_IRQ_LOWEST_OFFSET + 48, |
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130 | BSP_CPM_IRQ_PC14 = BSP_CPM_IRQ_LOWEST_OFFSET + 49, |
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131 | BSP_CPM_IRQ_PC13 = BSP_CPM_IRQ_LOWEST_OFFSET + 50, |
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132 | BSP_CPM_IRQ_PC12 = BSP_CPM_IRQ_LOWEST_OFFSET + 51, |
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133 | BSP_CPM_IRQ_PC11 = BSP_CPM_IRQ_LOWEST_OFFSET + 52, |
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134 | BSP_CPM_IRQ_PC10 = BSP_CPM_IRQ_LOWEST_OFFSET + 53, |
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135 | BSP_CPM_IRQ_PC9 = BSP_CPM_IRQ_LOWEST_OFFSET + 54, |
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136 | BSP_CPM_IRQ_PC8 = BSP_CPM_IRQ_LOWEST_OFFSET + 55, |
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137 | BSP_CPM_IRQ_PC7 = BSP_CPM_IRQ_LOWEST_OFFSET + 56, |
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138 | BSP_CPM_IRQ_PC6 = BSP_CPM_IRQ_LOWEST_OFFSET + 57, |
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139 | BSP_CPM_IRQ_PC5 = BSP_CPM_IRQ_LOWEST_OFFSET + 58, |
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140 | BSP_CPM_IRQ_PC4 = BSP_CPM_IRQ_LOWEST_OFFSET + 59, |
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141 | BSP_CPM_IRQ_PC3 = BSP_CPM_IRQ_LOWEST_OFFSET + 60, |
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142 | BSP_CPM_IRQ_PC2 = BSP_CPM_IRQ_LOWEST_OFFSET + 61, |
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143 | BSP_CPM_IRQ_PC1 = BSP_CPM_IRQ_LOWEST_OFFSET + 62, |
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144 | BSP_CPM_IRQ_PC0 = BSP_CPM_IRQ_LOWEST_OFFSET + 63, |
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145 | |
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146 | /* |
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147 | * Some Processor exception handled as rtems IRQ symbolic name definition |
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148 | */ |
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149 | BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET, |
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150 | BSP_PERIODIC_TIMER = BSP_DECREMENTER |
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151 | |
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152 | }rtems_irq_symbolic_name; |
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153 | |
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154 | #define CPM_INTERRUPT |
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155 | |
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156 | /* |
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157 | * Type definition for RTEMS managed interrupts |
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158 | */ |
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159 | typedef unsigned char rtems_irq_prio; |
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160 | struct __rtems_irq_connect_data__; /* forward declaratiuon */ |
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161 | |
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162 | typedef void (*rtems_irq_hdl) (void); |
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163 | typedef void (*rtems_irq_enable) (const struct __rtems_irq_connect_data__*); |
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164 | typedef void (*rtems_irq_disable) (const struct __rtems_irq_connect_data__*); |
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165 | typedef int (*rtems_irq_is_enabled) (const struct __rtems_irq_connect_data__*); |
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166 | |
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167 | typedef struct __rtems_irq_connect_data__ { |
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168 | /* |
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169 | * IRQ line |
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170 | */ |
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171 | rtems_irq_symbolic_name name; |
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172 | /* |
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173 | * handler. See comment on handler properties below in function prototype. |
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174 | */ |
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175 | rtems_irq_hdl hdl; |
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176 | /* |
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177 | * function for enabling interrupts at device level (ONLY!). |
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178 | * The BSP code will automatically enable it at SIU level and CPM level. |
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179 | * RATIONALE : anyway such code has to exist in current driver code. |
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180 | * It is usually called immediately AFTER connecting the interrupt handler. |
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181 | * RTEMS may well need such a function when restoring normal interrupt |
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182 | * processing after a debug session. |
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183 | * |
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184 | */ |
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185 | rtems_irq_enable on; |
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186 | /* |
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187 | * function for disabling interrupts at device level (ONLY!). |
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188 | * The code will disable it at SIU and CPM level. RATIONALE : anyway |
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189 | * such code has to exist for clean shutdown. It is usually called |
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190 | * BEFORE disconnecting the interrupt. RTEMS may well need such |
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191 | * a function when disabling normal interrupt processing for |
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192 | * a debug session. May well be a NOP function. |
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193 | */ |
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194 | rtems_irq_disable off; |
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195 | /* |
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196 | * function enabling to know what interrupt may currently occur |
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197 | * if someone manipulates the i8259s interrupt mask without care... |
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198 | */ |
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199 | rtems_irq_is_enabled isOn; |
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200 | } rtems_irq_connect_data; |
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201 | |
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202 | typedef struct { |
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203 | /* |
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204 | * size of all the table fields (*Tbl) described below. |
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205 | */ |
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206 | unsigned int irqNb; |
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207 | /* |
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208 | * Default handler used when disconnecting interrupts. |
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209 | */ |
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210 | rtems_irq_connect_data defaultEntry; |
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211 | /* |
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212 | * Table containing initials/current value. |
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213 | */ |
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214 | rtems_irq_connect_data* irqHdlTbl; |
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215 | /* |
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216 | * actual value of BSP_SIU_IRQ_VECTOR_BASE... |
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217 | */ |
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218 | rtems_irq_symbolic_name irqBase; |
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219 | /* |
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220 | * software priorities associated with interrupts. |
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221 | * if irqPrio [i] > intrPrio [j] it means that |
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222 | * interrupt handler hdl connected for interrupt name i |
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223 | * will not be interrupted by the handler connected for interrupt j |
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224 | * The interrupt source will be physically masked at i8259 level. |
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225 | */ |
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226 | rtems_irq_prio* irqPrioTbl; |
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227 | }rtems_irq_global_settings; |
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228 | |
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229 | /*-------------------------------------------------------------------------+ |
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230 | | Function Prototypes. |
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231 | +--------------------------------------------------------------------------*/ |
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232 | /* |
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233 | * ------------------------ PPC CPM Mngt Routines ------- |
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234 | */ |
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235 | |
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236 | /* |
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237 | * function to disable a particular irq. After calling |
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238 | * this function, even if the device asserts the interrupt line it will |
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239 | * not be propagated further to the processor |
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240 | */ |
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241 | int BSP_irq_disable_at_cpm (const rtems_irq_symbolic_name irqLine); |
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242 | /* |
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243 | * function to enable a particular irq. After calling |
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244 | * this function, if the device asserts the interrupt line it will |
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245 | * be propagated further to the processor |
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246 | */ |
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247 | int BSP_irq_enable_at_cpm (const rtems_irq_symbolic_name irqLine); |
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248 | /* |
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249 | * function to acknoledge a particular irq. After calling |
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250 | * this function, if a device asserts an enabled interrupt line it will |
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251 | * be propagated further to the processor. Mainly usefull for people |
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252 | * writting raw handlers as this is automagically done for rtems managed |
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253 | * handlers. |
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254 | */ |
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255 | int BSP_irq_ack_at_cpm (const rtems_irq_symbolic_name irqLine); |
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256 | /* |
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257 | * function to check if a particular irq is enabled. After calling |
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258 | */ |
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259 | int BSP_irq_enabled_at_cpm (const rtems_irq_symbolic_name irqLine); |
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260 | |
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261 | /* |
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262 | * ------------------------ RTEMS Single Irq Handler Mngt Routines ---------------- |
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263 | */ |
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264 | /* |
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265 | * function to connect a particular irq handler. This hanlder will NOT be called |
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266 | * directly as the result of the corresponding interrupt. Instead, a RTEMS |
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267 | * irq prologue will be called that will : |
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268 | * |
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269 | * 1) save the C scratch registers, |
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270 | * 2) switch to a interrupt stack if the interrupt is not nested, |
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271 | * 4) modify them to disable the current interrupt at SIU level (and may |
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272 | * be others depending on software priorities) |
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273 | * 5) aknowledge the SIU', |
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274 | * 6) demask the processor, |
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275 | * 7) call the application handler |
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276 | * |
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277 | * As a result the hdl function provided |
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278 | * |
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279 | * a) can perfectly be written is C, |
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280 | * b) may also well directly call the part of the RTEMS API that can be used |
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281 | * from interrupt level, |
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282 | * c) It only responsible for handling the jobs that need to be done at |
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283 | * the device level including (aknowledging/re-enabling the interrupt at device, |
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284 | * level, getting the data,...) |
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285 | * |
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286 | * When returning from the function, the following will be performed by |
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287 | * the RTEMS irq epilogue : |
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288 | * |
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289 | * 1) masks the interrupts again, |
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290 | * 2) restore the original SIU interrupt masks |
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291 | * 3) switch back on the orinal stack if needed, |
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292 | * 4) perform rescheduling when necessary, |
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293 | * 5) restore the C scratch registers... |
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294 | * 6) restore initial execution flow |
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295 | * |
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296 | */ |
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297 | int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); |
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298 | /* |
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299 | * function to get the current RTEMS irq handler for ptr->name. It enables to |
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300 | * define hanlder chain... |
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301 | */ |
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302 | int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* ptr); |
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303 | /* |
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304 | * function to get disconnect the RTEMS irq handler for ptr->name. |
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305 | * This function checks that the value given is the current one for safety reason. |
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306 | * The user can use the previous function to get it. |
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307 | */ |
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308 | int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data*); |
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309 | |
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310 | /* |
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311 | * ------------------------ RTEMS Global Irq Handler Mngt Routines ---------------- |
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312 | */ |
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313 | /* |
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314 | * (Re) Initialize the RTEMS interrupt management. |
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315 | * |
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316 | * The result of calling this function will be the same as if each individual |
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317 | * handler (config->irqHdlTbl[i].hdl) different from "config->defaultEntry.hdl" |
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318 | * has been individualy connected via |
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319 | * BSP_install_rtems_irq_handler(&config->irqHdlTbl[i]) |
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320 | * And each handler currently equal to config->defaultEntry.hdl |
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321 | * has been previously disconnected via |
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322 | * BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i]) |
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323 | * |
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324 | * This is to say that all information given will be used and not just |
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325 | * only the space. |
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326 | * |
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327 | * CAUTION : the various table address contained in config will be used |
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328 | * directly by the interrupt mangement code in order to save |
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329 | * data size so they must stay valid after the call => they should |
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330 | * not be modified or declared on a stack. |
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331 | */ |
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332 | |
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333 | int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); |
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334 | /* |
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335 | * (Re) get info on current RTEMS interrupt management. |
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336 | */ |
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337 | int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); |
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338 | |
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339 | extern void BSP_rtems_irq_mng_init(unsigned cpuId); |
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340 | |
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341 | #ifdef __cplusplus |
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342 | } |
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343 | #endif |
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344 | |
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345 | #endif |
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346 | |
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347 | #endif |
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