source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h @ f05b2ac

4.104.114.84.9
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 21, 2004 at 4:01:48 PM

Remove duplicate white lines.

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1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to write interrupt handlers.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk>
15 *  Surrey Satellite Technology Limited
16 *    The interrupt handling on the mpc8260 seems quite different from
17 *    the 860 (I don't know the 860 well).  Although some interrupts
18 *    are routed via the CPM irq and some are direct to the SIU they all
19 *    appear logically the same.  Therefore I removed the distinction
20 *    between SIU and CPM interrupts.
21 *
22 *  The license and distribution terms for this file may be
23 *  found in found in the file LICENSE in this distribution or at
24 *  http://www.rtems.com/license/LICENSE.
25 *
26 *  $Id$
27 */
28
29#ifndef LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
30#define LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
31
32#define BSP_ASM_IRQ_VECTOR_BASE 0x0
33
34#ifndef ASM
35
36#ifdef __cplusplus
37extern "C" {
38#endif
39
40/*
41extern volatile unsigned int ppc_cached_irq_mask;
42*/
43
44/*
45 * Symblolic IRQ names and related definitions.
46 */
47
48typedef enum {
49  /* Base vector for our SIU IRQ handlers. */
50  BSP_SIU_VECTOR_BASE   =       BSP_ASM_IRQ_VECTOR_BASE,
51
52  /*
53   * CPM IRQ handlers related definitions
54   * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
55   */
56  BSP_CPM_IRQ_NUMBER            =       64,
57  BSP_CPM_IRQ_LOWEST_OFFSET     =       BSP_SIU_VECTOR_BASE,
58  BSP_CPM_IRQ_MAX_OFFSET        =       BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1,
59  /*
60   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
61   * handler might be connected
62   */
63  BSP_PROCESSOR_IRQ_NUMBER      =       1,
64  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_CPM_IRQ_MAX_OFFSET + 1,
65  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
66  /*
67   * Summary
68   */
69  BSP_IRQ_NUMBER                =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
70  BSP_LOWEST_OFFSET             =       BSP_CPM_IRQ_LOWEST_OFFSET,
71  BSP_MAX_OFFSET                =       BSP_PROCESSOR_IRQ_MAX_OFFSET,
72
73  /*
74   * Some SIU IRQ symbolic name definition. Please note that
75   * INT IRQ are defined but a single one will be used to
76   * redirect all CPM interrupt.
77   *
78   * On the mpc8260 all this seems to be transparent.  Although the
79   * CPM, PIT and TMCNT interrupt may well be the only interrupts routed
80   * to the SIU at the hardware level all of them appear as CPM interupts
81   * to software apart from the registers for setting priority.
82   *
83   * The MPC8260 User Manual seems shot through with inconsistencies
84   * about this whole area.
85   */
86
87  /*
88   * Some CPM IRQ symbolic name definition
89   */
90  BSP_CPM_IRQ_ERROR             =       BSP_CPM_IRQ_LOWEST_OFFSET,
91  BSP_CPM_IRQ_I2C               =       BSP_CPM_IRQ_LOWEST_OFFSET + 1,
92  BSP_CPM_IRQ_SPI               =       BSP_CPM_IRQ_LOWEST_OFFSET + 2,
93  BSP_CPM_IRQ_RISC_TIMERS       =       BSP_CPM_IRQ_LOWEST_OFFSET + 3,
94  BSP_CPM_IRQ_SMC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 4,
95  BSP_CPM_IRQ_SMC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 5,
96  BSP_CPM_IRQ_IDMA1             =       BSP_CPM_IRQ_LOWEST_OFFSET + 6,
97  BSP_CPM_IRQ_IDMA2             =       BSP_CPM_IRQ_LOWEST_OFFSET + 7,
98  BSP_CPM_IRQ_IDMA3             =       BSP_CPM_IRQ_LOWEST_OFFSET + 8,
99  BSP_CPM_IRQ_IDMA4             =       BSP_CPM_IRQ_LOWEST_OFFSET + 9,
100  BSP_CPM_IRQ_SDMA              =       BSP_CPM_IRQ_LOWEST_OFFSET + 10,
101
102  BSP_CPM_IRQ_TIMER_1           =       BSP_CPM_IRQ_LOWEST_OFFSET + 12,
103  BSP_CPM_IRQ_TIMER_2           =       BSP_CPM_IRQ_LOWEST_OFFSET + 13,
104  BSP_CPM_IRQ_TIMER_3           =       BSP_CPM_IRQ_LOWEST_OFFSET + 14,
105  BSP_CPM_IRQ_TIMER_4           =       BSP_CPM_IRQ_LOWEST_OFFSET + 15,
106  BSP_CPM_IRQ_TMCNT             =       BSP_CPM_IRQ_LOWEST_OFFSET + 16,
107  BSP_CPM_IRQ_PIT               =       BSP_CPM_IRQ_LOWEST_OFFSET + 17,
108
109  BSP_CPM_IRQ_IRQ1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 19,
110  BSP_CPM_IRQ_IRQ2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 20,
111  BSP_CPM_IRQ_IRQ3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 21,
112  BSP_CPM_IRQ_IRQ4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 22,
113  BSP_CPM_IRQ_IRQ5              =       BSP_CPM_IRQ_LOWEST_OFFSET + 23,
114  BSP_CPM_IRQ_IRQ6              =       BSP_CPM_IRQ_LOWEST_OFFSET + 24,
115  BSP_CPM_IRQ_IRQ7              =       BSP_CPM_IRQ_LOWEST_OFFSET + 25,
116
117  BSP_CPM_IRQ_FCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 32,
118  BSP_CPM_IRQ_FCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 33,
119  BSP_CPM_IRQ_FCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 34,
120
121  BSP_CPM_IRQ_MCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 36,
122  BSP_CPM_IRQ_MCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 37,
123
124  BSP_CPM_IRQ_SCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 40,
125  BSP_CPM_IRQ_SCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 41,
126  BSP_CPM_IRQ_SCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 42,
127  BSP_CPM_IRQ_SCC4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 43,
128
129  BSP_CPM_IRQ_PC15              =       BSP_CPM_IRQ_LOWEST_OFFSET + 48,
130  BSP_CPM_IRQ_PC14              =       BSP_CPM_IRQ_LOWEST_OFFSET + 49,
131  BSP_CPM_IRQ_PC13              =       BSP_CPM_IRQ_LOWEST_OFFSET + 50,
132  BSP_CPM_IRQ_PC12              =       BSP_CPM_IRQ_LOWEST_OFFSET + 51,
133  BSP_CPM_IRQ_PC11              =       BSP_CPM_IRQ_LOWEST_OFFSET + 52,
134  BSP_CPM_IRQ_PC10              =       BSP_CPM_IRQ_LOWEST_OFFSET + 53,
135  BSP_CPM_IRQ_PC9               =       BSP_CPM_IRQ_LOWEST_OFFSET + 54,
136  BSP_CPM_IRQ_PC8               =       BSP_CPM_IRQ_LOWEST_OFFSET + 55,
137  BSP_CPM_IRQ_PC7               =       BSP_CPM_IRQ_LOWEST_OFFSET + 56,
138  BSP_CPM_IRQ_PC6               =       BSP_CPM_IRQ_LOWEST_OFFSET + 57,
139  BSP_CPM_IRQ_PC5               =       BSP_CPM_IRQ_LOWEST_OFFSET + 58,
140  BSP_CPM_IRQ_PC4               =       BSP_CPM_IRQ_LOWEST_OFFSET + 59,
141  BSP_CPM_IRQ_PC3               =       BSP_CPM_IRQ_LOWEST_OFFSET + 60,
142  BSP_CPM_IRQ_PC2               =       BSP_CPM_IRQ_LOWEST_OFFSET + 61,
143  BSP_CPM_IRQ_PC1               =       BSP_CPM_IRQ_LOWEST_OFFSET + 62,
144  BSP_CPM_IRQ_PC0               =       BSP_CPM_IRQ_LOWEST_OFFSET + 63,
145
146    /*
147     * Some Processor exception handled as rtems IRQ symbolic name definition
148     */
149  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET,
150  BSP_PERIODIC_TIMER            =       BSP_DECREMENTER
151
152}rtems_irq_symbolic_name;
153
154#define CPM_INTERRUPT
155
156/*
157 * Type definition for RTEMS managed interrupts
158 */
159typedef unsigned char  rtems_irq_prio;
160struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
161
162typedef void (*rtems_irq_hdl)           (void);
163typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
164typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
165typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
166
167typedef struct __rtems_irq_connect_data__ {
168  /*
169   * IRQ line
170   */
171  rtems_irq_symbolic_name       name;
172  /*
173   * handler. See comment on handler properties below in function prototype.
174   */
175  rtems_irq_hdl                 hdl;
176  /*
177   * function for enabling interrupts at device level (ONLY!).
178   * The BSP code will automatically enable it at SIU level and CPM level.
179   * RATIONALE : anyway such code has to exist in current driver code.
180   * It is usually called immediately AFTER connecting the interrupt handler.
181   * RTEMS may well need such a function when restoring normal interrupt
182   * processing after a debug session.
183   *
184   */
185    rtems_irq_enable            on;
186  /*
187   * function for disabling interrupts at device level (ONLY!).
188   * The code will disable it at SIU and CPM level. RATIONALE : anyway
189   * such code has to exist for clean shutdown. It is usually called
190   * BEFORE disconnecting the interrupt. RTEMS may well need such
191   * a function when disabling normal interrupt processing for
192   * a debug session. May well be a NOP function.
193   */
194  rtems_irq_disable             off;
195  /*
196   * function enabling to know what interrupt may currently occur
197   * if someone manipulates the i8259s interrupt mask without care...
198   */
199    rtems_irq_is_enabled        isOn;
200} rtems_irq_connect_data;
201
202typedef struct {
203  /*
204   * size of all the table fields (*Tbl) described below.
205   */
206  unsigned int                  irqNb;
207  /*
208   * Default handler used when disconnecting interrupts.
209   */
210  rtems_irq_connect_data        defaultEntry;
211  /*
212   * Table containing initials/current value.
213   */
214  rtems_irq_connect_data*       irqHdlTbl;
215  /*
216   * actual value of BSP_SIU_IRQ_VECTOR_BASE...
217   */
218  rtems_irq_symbolic_name       irqBase;
219  /*
220   * software priorities associated with interrupts.
221   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
222   * interrupt handler hdl connected for interrupt name i
223   * will  not be interrupted by the handler connected for interrupt j
224   * The interrupt source  will be physically masked at i8259 level.
225   */
226    rtems_irq_prio*             irqPrioTbl;
227}rtems_irq_global_settings;
228
229/*-------------------------------------------------------------------------+
230| Function Prototypes.
231+--------------------------------------------------------------------------*/
232/*
233 * ------------------------ PPC CPM Mngt Routines -------
234 */
235
236/*
237 * function to disable a particular irq. After calling
238 * this function, even if the device asserts the interrupt line it will
239 * not be propagated further to the processor
240 */
241int BSP_irq_disable_at_cpm        (const rtems_irq_symbolic_name irqLine);
242/*
243 * function to enable a particular irq. After calling
244 * this function, if the device asserts the interrupt line it will
245 * be propagated further to the processor
246 */
247int BSP_irq_enable_at_cpm               (const rtems_irq_symbolic_name irqLine);
248/*
249 * function to acknoledge a particular irq. After calling
250 * this function, if a device asserts an enabled interrupt line it will
251 * be propagated further to the processor. Mainly usefull for people
252 * writting raw handlers as this is automagically done for rtems managed
253 * handlers.
254 */
255int BSP_irq_ack_at_cpm                  (const rtems_irq_symbolic_name irqLine);
256/*
257 * function to check if a particular irq is enabled. After calling
258 */
259int BSP_irq_enabled_at_cpm      (const rtems_irq_symbolic_name irqLine);
260
261/*
262 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
263 */
264/*
265 * function to connect a particular irq handler. This hanlder will NOT be called
266 * directly as the result of the corresponding interrupt. Instead, a RTEMS
267 * irq prologue will be called that will :
268 *
269 *      1) save the C scratch registers,
270 *      2) switch to a interrupt stack if the interrupt is not nested,
271 *      4) modify them to disable the current interrupt at  SIU level (and may
272 *      be others depending on software priorities)
273 *      5) aknowledge the SIU',
274 *      6) demask the processor,
275 *      7) call the application handler
276 *
277 * As a result the hdl function provided
278 *
279 *      a) can perfectly be written is C,
280 *      b) may also well directly call the part of the RTEMS API that can be used
281 *      from interrupt level,
282 *      c) It only responsible for handling the jobs that need to be done at
283 *      the device level including (aknowledging/re-enabling the interrupt at device,
284 *      level, getting the data,...)
285 *
286 *      When returning from the function, the following will be performed by
287 *      the RTEMS irq epilogue :
288 *
289 *      1) masks the interrupts again,
290 *      2) restore the original SIU interrupt masks
291 *      3) switch back on the orinal stack if needed,
292 *      4) perform rescheduling when necessary,
293 *      5) restore the C scratch registers...
294 *      6) restore initial execution flow
295 *
296 */
297int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
298/*
299 * function to get the current RTEMS irq handler for ptr->name. It enables to
300 * define hanlder chain...
301 */
302int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
303/*
304 * function to get disconnect the RTEMS irq handler for ptr->name.
305 * This function checks that the value given is the current one for safety reason.
306 * The user can use the previous function to get it.
307 */
308int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
309
310/*
311 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
312 */
313/*
314 * (Re) Initialize the RTEMS interrupt management.
315 *
316 * The result of calling this function will be the same as if each individual
317 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
318 * has been individualy connected via
319 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
320 * And each handler currently equal to config->defaultEntry.hdl
321 * has been previously disconnected via
322 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
323 *
324 * This is to say that all information given will be used and not just
325 * only the space.
326 *
327 * CAUTION : the various table address contained in config will be used
328 *           directly by the interrupt mangement code in order to save
329 *           data size so they must stay valid after the call => they should
330 *           not be modified or declared on a stack.
331 */
332
333int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
334/*
335 * (Re) get info on current RTEMS interrupt management.
336 */
337int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
338
339extern void BSP_rtems_irq_mng_init(unsigned cpuId);
340
341#ifdef __cplusplus
342}
343#endif
344
345#endif
346
347#endif
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