source: rtems/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h @ 68aef00

4.104.114.84.9
Last change on this file since 68aef00 was 68aef00, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 3, 2004 at 2:21:12 PM

2004-03-03 Joel Sherrill <joel@…>

  • irq/irq.h: Correct typo.
  • Property mode set to 100644
File size: 12.3 KB
Line 
1/* irq.h
2 *
3 *  This include file describe the data structure and the functions implemented
4 *  by rtems to write interrupt handlers.
5 *
6 *  CopyRight (C) 1999 valette@crf.canon.fr
7 *
8 *  This code is heavilly inspired by the public specification of STREAM V2
9 *  that can be found at :
10 *
11 *      <http://www.chorus.com/Documentation/index.html> by following
12 *  the STREAM API Specification Document link.
13 *
14 *  Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk>
15 *  Surrey Satellite Technology Limited
16 *    The interrupt handling on the mpc8260 seems quite different from
17 *    the 860 (I don't know the 860 well).  Although some interrupts
18 *    are routed via the CPM irq and some are direct to the SIU they all
19 *    appear logically the same.  Therefore I removed the distinction
20 *    between SIU and CPM interrupts.
21 *
22 *  The license and distribution terms for this file may be
23 *  found in found in the file LICENSE in this distribution or at
24 *  http://www.rtems.com/license/LICENSE.
25 *
26 *  $Id$
27 */
28
29#ifndef LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
30#define LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
31
32
33#define BSP_ASM_IRQ_VECTOR_BASE 0x0
34
35#ifndef ASM
36
37#ifdef __cplusplus
38extern "C" {
39#endif
40
41/*
42extern volatile unsigned int ppc_cached_irq_mask;
43*/
44
45/*
46 * Symblolic IRQ names and related definitions.
47 */
48
49typedef enum {
50  /* Base vector for our SIU IRQ handlers. */
51  BSP_SIU_VECTOR_BASE   =       BSP_ASM_IRQ_VECTOR_BASE,
52
53  /*
54   * CPM IRQ handlers related definitions
55   * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
56   */
57  BSP_CPM_IRQ_NUMBER            =       64,
58  BSP_CPM_IRQ_LOWEST_OFFSET     =       BSP_SIU_VECTOR_BASE,
59  BSP_CPM_IRQ_MAX_OFFSET        =       BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1,
60  /*
61   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
62   * handler might be connected
63   */
64  BSP_PROCESSOR_IRQ_NUMBER      =       1,
65  BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_CPM_IRQ_MAX_OFFSET + 1,
66  BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
67  /*
68   * Summary
69   */
70  BSP_IRQ_NUMBER                =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
71  BSP_LOWEST_OFFSET             =       BSP_CPM_IRQ_LOWEST_OFFSET,
72  BSP_MAX_OFFSET                =       BSP_PROCESSOR_IRQ_MAX_OFFSET,
73
74  /*
75   * Some SIU IRQ symbolic name definition. Please note that
76   * INT IRQ are defined but a single one will be used to
77   * redirect all CPM interrupt.
78   *
79   * On the mpc8260 all this seems to be transparent.  Although the
80   * CPM, PIT and TMCNT interrupt may well be the only interrupts routed
81   * to the SIU at the hardware level all of them appear as CPM interupts
82   * to software apart from the registers for setting priority.
83   *
84   * The MPC8260 User Manual seems shot through with inconsistencies
85   * about this whole area.
86   */   
87
88  /*
89   * Some CPM IRQ symbolic name definition
90   */
91  BSP_CPM_IRQ_ERROR             =       BSP_CPM_IRQ_LOWEST_OFFSET,
92  BSP_CPM_IRQ_I2C               =       BSP_CPM_IRQ_LOWEST_OFFSET + 1,
93  BSP_CPM_IRQ_SPI               =       BSP_CPM_IRQ_LOWEST_OFFSET + 2,
94  BSP_CPM_IRQ_RISC_TIMERS       =       BSP_CPM_IRQ_LOWEST_OFFSET + 3,
95  BSP_CPM_IRQ_SMC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 4,
96  BSP_CPM_IRQ_SMC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 5,
97  BSP_CPM_IRQ_IDMA1             =       BSP_CPM_IRQ_LOWEST_OFFSET + 6,
98  BSP_CPM_IRQ_IDMA2             =       BSP_CPM_IRQ_LOWEST_OFFSET + 7,
99  BSP_CPM_IRQ_IDMA3             =       BSP_CPM_IRQ_LOWEST_OFFSET + 8,
100  BSP_CPM_IRQ_IDMA4             =       BSP_CPM_IRQ_LOWEST_OFFSET + 9,
101  BSP_CPM_IRQ_SDMA              =       BSP_CPM_IRQ_LOWEST_OFFSET + 10,
102
103  BSP_CPM_IRQ_TIMER_1           =       BSP_CPM_IRQ_LOWEST_OFFSET + 12,
104  BSP_CPM_IRQ_TIMER_2           =       BSP_CPM_IRQ_LOWEST_OFFSET + 13,
105  BSP_CPM_IRQ_TIMER_3           =       BSP_CPM_IRQ_LOWEST_OFFSET + 14,
106  BSP_CPM_IRQ_TIMER_4           =       BSP_CPM_IRQ_LOWEST_OFFSET + 15,
107  BSP_CPM_IRQ_TMCNT             =       BSP_CPM_IRQ_LOWEST_OFFSET + 16,
108  BSP_CPM_IRQ_PIT               =       BSP_CPM_IRQ_LOWEST_OFFSET + 17,
109
110  BSP_CPM_IRQ_IRQ1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 19,
111  BSP_CPM_IRQ_IRQ2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 20,
112  BSP_CPM_IRQ_IRQ3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 21,
113  BSP_CPM_IRQ_IRQ4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 22,
114  BSP_CPM_IRQ_IRQ5              =       BSP_CPM_IRQ_LOWEST_OFFSET + 23,
115  BSP_CPM_IRQ_IRQ6              =       BSP_CPM_IRQ_LOWEST_OFFSET + 24,
116  BSP_CPM_IRQ_IRQ7              =       BSP_CPM_IRQ_LOWEST_OFFSET + 25,
117
118  BSP_CPM_IRQ_FCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 32,
119  BSP_CPM_IRQ_FCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 33,
120  BSP_CPM_IRQ_FCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 34,
121
122  BSP_CPM_IRQ_MCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 36,
123  BSP_CPM_IRQ_MCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 37,
124
125  BSP_CPM_IRQ_SCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 40,
126  BSP_CPM_IRQ_SCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 41,
127  BSP_CPM_IRQ_SCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 42,
128  BSP_CPM_IRQ_SCC4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 43,
129
130  BSP_CPM_IRQ_PC15              =       BSP_CPM_IRQ_LOWEST_OFFSET + 48,
131  BSP_CPM_IRQ_PC14              =       BSP_CPM_IRQ_LOWEST_OFFSET + 49,
132  BSP_CPM_IRQ_PC13              =       BSP_CPM_IRQ_LOWEST_OFFSET + 50,
133  BSP_CPM_IRQ_PC12              =       BSP_CPM_IRQ_LOWEST_OFFSET + 51,
134  BSP_CPM_IRQ_PC11              =       BSP_CPM_IRQ_LOWEST_OFFSET + 52,
135  BSP_CPM_IRQ_PC10              =       BSP_CPM_IRQ_LOWEST_OFFSET + 53,
136  BSP_CPM_IRQ_PC9               =       BSP_CPM_IRQ_LOWEST_OFFSET + 54,
137  BSP_CPM_IRQ_PC8               =       BSP_CPM_IRQ_LOWEST_OFFSET + 55,
138  BSP_CPM_IRQ_PC7               =       BSP_CPM_IRQ_LOWEST_OFFSET + 56,
139  BSP_CPM_IRQ_PC6               =       BSP_CPM_IRQ_LOWEST_OFFSET + 57,
140  BSP_CPM_IRQ_PC5               =       BSP_CPM_IRQ_LOWEST_OFFSET + 58,
141  BSP_CPM_IRQ_PC4               =       BSP_CPM_IRQ_LOWEST_OFFSET + 59,
142  BSP_CPM_IRQ_PC3               =       BSP_CPM_IRQ_LOWEST_OFFSET + 60,
143  BSP_CPM_IRQ_PC2               =       BSP_CPM_IRQ_LOWEST_OFFSET + 61,
144  BSP_CPM_IRQ_PC1               =       BSP_CPM_IRQ_LOWEST_OFFSET + 62,
145  BSP_CPM_IRQ_PC0               =       BSP_CPM_IRQ_LOWEST_OFFSET + 63,
146
147
148    /*
149     * Some Processor exception handled as rtems IRQ symbolic name definition
150     */
151  BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET,
152  BSP_PERIODIC_TIMER            =       BSP_DECREMENTER
153
154}rtems_irq_symbolic_name;
155
156#define CPM_INTERRUPT               
157
158
159/*
160 * Type definition for RTEMS managed interrupts
161 */
162typedef unsigned char  rtems_irq_prio;
163struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
164
165typedef void (*rtems_irq_hdl)           (void);
166typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
167typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
168typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
169
170typedef struct __rtems_irq_connect_data__ {
171  /*
172   * IRQ line
173   */
174  rtems_irq_symbolic_name       name;
175  /*
176   * handler. See comment on handler properties below in function prototype.
177   */
178  rtems_irq_hdl                 hdl;
179  /*
180   * function for enabling interrupts at device level (ONLY!).
181   * The BSP code will automatically enable it at SIU level and CPM level.
182   * RATIONALE : anyway such code has to exist in current driver code.
183   * It is usually called immediately AFTER connecting the interrupt handler.
184   * RTEMS may well need such a function when restoring normal interrupt
185   * processing after a debug session.
186   *
187   */
188    rtems_irq_enable            on;     
189  /*
190   * function for disabling interrupts at device level (ONLY!).
191   * The code will disable it at SIU and CPM level. RATIONALE : anyway
192   * such code has to exist for clean shutdown. It is usually called
193   * BEFORE disconnecting the interrupt. RTEMS may well need such
194   * a function when disabling normal interrupt processing for
195   * a debug session. May well be a NOP function.
196   */
197  rtems_irq_disable             off;
198  /*
199   * function enabling to know what interrupt may currently occur
200   * if someone manipulates the i8259s interrupt mask without care...
201   */
202    rtems_irq_is_enabled        isOn;
203} rtems_irq_connect_data;
204
205typedef struct {
206  /*
207   * size of all the table fields (*Tbl) described below.
208   */
209  unsigned int                  irqNb;
210  /*
211   * Default handler used when disconnecting interrupts.
212   */
213  rtems_irq_connect_data        defaultEntry;
214  /*
215   * Table containing initials/current value.
216   */
217  rtems_irq_connect_data*       irqHdlTbl;
218  /*
219   * actual value of BSP_SIU_IRQ_VECTOR_BASE...
220   */
221  rtems_irq_symbolic_name       irqBase;
222  /*
223   * software priorities associated with interrupts.
224   * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
225   * interrupt handler hdl connected for interrupt name i
226   * will  not be interrupted by the handler connected for interrupt j
227   * The interrupt source  will be physically masked at i8259 level.
228   */
229    rtems_irq_prio*             irqPrioTbl;
230}rtems_irq_global_settings;
231
232
233
234
235/*-------------------------------------------------------------------------+
236| Function Prototypes.
237+--------------------------------------------------------------------------*/
238/*
239 * ------------------------ PPC CPM Mngt Routines -------
240 */
241
242/*
243 * function to disable a particular irq. After calling
244 * this function, even if the device asserts the interrupt line it will
245 * not be propagated further to the processor
246 */
247int BSP_irq_disable_at_cpm        (const rtems_irq_symbolic_name irqLine);
248/*
249 * function to enable a particular irq. After calling
250 * this function, if the device asserts the interrupt line it will
251 * be propagated further to the processor
252 */
253int BSP_irq_enable_at_cpm               (const rtems_irq_symbolic_name irqLine);
254/*
255 * function to acknoledge a particular irq. After calling
256 * this function, if a device asserts an enabled interrupt line it will
257 * be propagated further to the processor. Mainly usefull for people
258 * writting raw handlers as this is automagically done for rtems managed
259 * handlers.
260 */
261int BSP_irq_ack_at_cpm                  (const rtems_irq_symbolic_name irqLine);
262/*
263 * function to check if a particular irq is enabled. After calling
264 */
265int BSP_irq_enabled_at_cpm      (const rtems_irq_symbolic_name irqLine);
266
267
268
269/*
270 * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
271 */
272/*
273 * function to connect a particular irq handler. This hanlder will NOT be called
274 * directly as the result of the corresponding interrupt. Instead, a RTEMS
275 * irq prologue will be called that will :
276 *
277 *      1) save the C scratch registers,
278 *      2) switch to a interrupt stack if the interrupt is not nested,
279 *      4) modify them to disable the current interrupt at  SIU level (and may
280 *      be others depending on software priorities)
281 *      5) aknowledge the SIU',
282 *      6) demask the processor,
283 *      7) call the application handler
284 *
285 * As a result the hdl function provided
286 *
287 *      a) can perfectly be written is C,
288 *      b) may also well directly call the part of the RTEMS API that can be used
289 *      from interrupt level,
290 *      c) It only responsible for handling the jobs that need to be done at
291 *      the device level including (aknowledging/re-enabling the interrupt at device,
292 *      level, getting the data,...)
293 *
294 *      When returning from the function, the following will be performed by
295 *      the RTEMS irq epilogue :
296 *
297 *      1) masks the interrupts again,
298 *      2) restore the original SIU interrupt masks
299 *      3) switch back on the orinal stack if needed,
300 *      4) perform rescheduling when necessary,
301 *      5) restore the C scratch registers...
302 *      6) restore initial execution flow
303 *
304 */
305int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
306/*
307 * function to get the current RTEMS irq handler for ptr->name. It enables to
308 * define hanlder chain...
309 */
310int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
311/*
312 * function to get disconnect the RTEMS irq handler for ptr->name.
313 * This function checks that the value given is the current one for safety reason.
314 * The user can use the previous function to get it.
315 */
316int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
317
318
319/*
320 * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
321 */
322/*
323 * (Re) Initialize the RTEMS interrupt management.
324 *
325 * The result of calling this function will be the same as if each individual
326 * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
327 * has been individualy connected via
328 *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
329 * And each handler currently equal to config->defaultEntry.hdl
330 * has been previously disconnected via
331 *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
332 *
333 * This is to say that all information given will be used and not just
334 * only the space.
335 *
336 * CAUTION : the various table address contained in config will be used
337 *           directly by the interrupt mangement code in order to save
338 *           data size so they must stay valid after the call => they should
339 *           not be modified or declared on a stack.
340 */
341
342int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
343/*
344 * (Re) get info on current RTEMS interrupt management.
345 */
346int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
347 
348extern void BSP_rtems_irq_mng_init(unsigned cpuId);
349
350#ifdef __cplusplus
351}
352#endif
353
354#endif
355
356#endif
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