1 | /* irq.h |
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2 | * |
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3 | * This include file describe the data structure and the functions implemented |
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4 | * by rtems to write interrupt handlers. |
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5 | * |
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6 | * CopyRight (C) 1999 valette@crf.canon.fr |
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7 | * |
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8 | * This code is heavilly inspired by the public specification of STREAM V2 |
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9 | * that can be found at : |
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10 | * |
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11 | * <http://www.chorus.com/Documentation/index.html> by following |
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12 | * the STREAM API Specification Document link. |
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13 | * |
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14 | * Modified for mpc8260 by Andy Dachs <a.dachs@sstl.co.uk> |
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15 | * Surrey Satellite Technology Limited |
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16 | * The interrupt handling on the mpc8260 seems quite different from |
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17 | * the 860 (I don't know the 860 well). Although some interrupts |
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18 | * are routed via the CPM irq and some are direct to the SIU they all |
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19 | * appear logically the same. Therefore I removed the distinction |
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20 | * between SIU and CPM interrupts. |
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21 | * |
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22 | * The license and distribution terms for this file may be |
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23 | * found in the file LICENSE in this distribution or at |
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24 | * http://www.rtems.com/license/LICENSE. |
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25 | * |
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26 | * $Id$ |
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27 | */ |
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28 | |
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29 | #ifndef LIBBSP_POWERPC_IRQ_H |
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30 | #define LIBBSP_POWERPC_IRQ_H |
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31 | #include <rtems/irq.h> |
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32 | |
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33 | #ifndef ASM |
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34 | |
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35 | #ifdef __cplusplus |
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36 | extern "C" { |
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37 | #endif |
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38 | |
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39 | /* |
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40 | extern volatile unsigned int ppc_cached_irq_mask; |
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41 | */ |
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42 | |
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43 | /* |
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44 | * Symblolic IRQ names and related definitions. |
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45 | */ |
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46 | |
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47 | /* |
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48 | * CPM IRQ handlers related definitions |
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49 | * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE |
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50 | */ |
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51 | #define BSP_CPM_IRQ_NUMBER (64) |
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52 | #define BSP_CPM_IRQ_LOWEST_OFFSET (0) |
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53 | #define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1) |
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54 | /* |
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55 | * PowerPc exceptions handled as interrupt where a rtems managed interrupt |
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56 | * handler might be connected |
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57 | */ |
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58 | #define BSP_PROCESSOR_IRQ_NUMBER (1) |
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59 | #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1) |
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60 | #define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) |
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61 | /* |
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62 | * Summary |
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63 | */ |
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64 | #define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1) |
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65 | #define BSP_LOWEST_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET) |
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66 | #define BSP_MAX_OFFSET (BSP_PROCESSOR_IRQ_MAX_OFFSET) |
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67 | |
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68 | /* |
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69 | * Some SIU IRQ symbolic name definition. Please note that |
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70 | * INT IRQ are defined but a single one will be used to |
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71 | * redirect all CPM interrupt. |
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72 | * |
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73 | * On the mpc8260 all this seems to be transparent. Although the |
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74 | * CPM, PIT and TMCNT interrupt may well be the only interrupts routed |
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75 | * to the SIU at the hardware level all of them appear as CPM interupts |
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76 | * to software apart from the registers for setting priority. |
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77 | * |
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78 | * The MPC8260 User Manual seems shot through with inconsistencies |
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79 | * about this whole area. |
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80 | */ |
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81 | |
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82 | /* |
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83 | * Some CPM IRQ symbolic name definition |
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84 | */ |
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85 | #define BSP_CPM_IRQ_ERROR (BSP_CPM_IRQ_LOWEST_OFFSET + 0) |
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86 | #define BSP_CPM_IRQ_I2C (BSP_CPM_IRQ_LOWEST_OFFSET + 1) |
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87 | #define BSP_CPM_IRQ_SPI (BSP_CPM_IRQ_LOWEST_OFFSET + 2) |
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88 | #define BSP_CPM_IRQ_RISC_TIMERS (BSP_CPM_IRQ_LOWEST_OFFSET + 3) |
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89 | #define BSP_CPM_IRQ_SMC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 4) |
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90 | #define BSP_CPM_IRQ_SMC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 5) |
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91 | #define BSP_CPM_IRQ_IDMA1 (BSP_CPM_IRQ_LOWEST_OFFSET + 6) |
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92 | #define BSP_CPM_IRQ_IDMA2 (BSP_CPM_IRQ_LOWEST_OFFSET + 7) |
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93 | #define BSP_CPM_IRQ_IDMA3 (BSP_CPM_IRQ_LOWEST_OFFSET + 8) |
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94 | #define BSP_CPM_IRQ_IDMA4 (BSP_CPM_IRQ_LOWEST_OFFSET + 9) |
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95 | #define BSP_CPM_IRQ_SDMA (BSP_CPM_IRQ_LOWEST_OFFSET + 10) |
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96 | |
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97 | #define BSP_CPM_IRQ_TIMER_1 (BSP_CPM_IRQ_LOWEST_OFFSET + 12) |
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98 | #define BSP_CPM_IRQ_TIMER_2 (BSP_CPM_IRQ_LOWEST_OFFSET + 13) |
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99 | #define BSP_CPM_IRQ_TIMER_3 (BSP_CPM_IRQ_LOWEST_OFFSET + 14) |
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100 | #define BSP_CPM_IRQ_TIMER_4 (BSP_CPM_IRQ_LOWEST_OFFSET + 15) |
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101 | #define BSP_CPM_IRQ_TMCNT (BSP_CPM_IRQ_LOWEST_OFFSET + 16) |
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102 | #define BSP_CPM_IRQ_PIT (BSP_CPM_IRQ_LOWEST_OFFSET + 17) |
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103 | |
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104 | #define BSP_CPM_IRQ_IRQ1 (BSP_CPM_IRQ_LOWEST_OFFSET + 19) |
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105 | #define BSP_CPM_IRQ_IRQ2 (BSP_CPM_IRQ_LOWEST_OFFSET + 20) |
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106 | #define BSP_CPM_IRQ_IRQ3 (BSP_CPM_IRQ_LOWEST_OFFSET + 21) |
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107 | #define BSP_CPM_IRQ_IRQ4 (BSP_CPM_IRQ_LOWEST_OFFSET + 22) |
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108 | #define BSP_CPM_IRQ_IRQ5 (BSP_CPM_IRQ_LOWEST_OFFSET + 23) |
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109 | #define BSP_CPM_IRQ_IRQ6 (BSP_CPM_IRQ_LOWEST_OFFSET + 24) |
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110 | #define BSP_CPM_IRQ_IRQ7 (BSP_CPM_IRQ_LOWEST_OFFSET + 25) |
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111 | |
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112 | #define BSP_CPM_IRQ_FCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 32) |
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113 | #define BSP_CPM_IRQ_FCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 33) |
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114 | #define BSP_CPM_IRQ_FCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 34) |
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115 | #define BSP_CPM_IRQ_MCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 36) |
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116 | #define BSP_CPM_IRQ_MCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 37) |
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117 | |
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118 | #define BSP_CPM_IRQ_SCC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 40) |
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119 | #define BSP_CPM_IRQ_SCC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 41) |
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120 | #define BSP_CPM_IRQ_SCC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 42) |
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121 | #define BSP_CPM_IRQ_SCC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 43) |
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122 | |
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123 | #define BSP_CPM_IRQ_PC15 (BSP_CPM_IRQ_LOWEST_OFFSET + 48) |
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124 | #define BSP_CPM_IRQ_PC14 (BSP_CPM_IRQ_LOWEST_OFFSET + 49) |
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125 | #define BSP_CPM_IRQ_PC13 (BSP_CPM_IRQ_LOWEST_OFFSET + 50) |
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126 | #define BSP_CPM_IRQ_PC12 (BSP_CPM_IRQ_LOWEST_OFFSET + 51) |
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127 | #define BSP_CPM_IRQ_PC11 (BSP_CPM_IRQ_LOWEST_OFFSET + 52) |
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128 | #define BSP_CPM_IRQ_PC10 (BSP_CPM_IRQ_LOWEST_OFFSET + 53) |
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129 | #define BSP_CPM_IRQ_PC9 (BSP_CPM_IRQ_LOWEST_OFFSET + 54) |
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130 | #define BSP_CPM_IRQ_PC8 (BSP_CPM_IRQ_LOWEST_OFFSET + 55) |
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131 | #define BSP_CPM_IRQ_PC7 (BSP_CPM_IRQ_LOWEST_OFFSET + 56) |
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132 | #define BSP_CPM_IRQ_PC6 (BSP_CPM_IRQ_LOWEST_OFFSET + 57) |
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133 | #define BSP_CPM_IRQ_PC5 (BSP_CPM_IRQ_LOWEST_OFFSET + 58) |
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134 | #define BSP_CPM_IRQ_PC4 (BSP_CPM_IRQ_LOWEST_OFFSET + 59) |
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135 | #define BSP_CPM_IRQ_PC3 (BSP_CPM_IRQ_LOWEST_OFFSET + 60) |
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136 | #define BSP_CPM_IRQ_PC2 (BSP_CPM_IRQ_LOWEST_OFFSET + 61) |
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137 | #define BSP_CPM_IRQ_PC1 (BSP_CPM_IRQ_LOWEST_OFFSET + 62) |
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138 | #define BSP_CPM_IRQ_PC0 (BSP_CPM_IRQ_LOWEST_OFFSET + 63) |
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139 | |
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140 | /* |
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141 | * Some Processor exception handled as rtems IRQ symbolic name definition |
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142 | */ |
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143 | #define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) |
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144 | #define BSP_PERIODIC_TIMER (BSP_DECREMENTER) |
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145 | |
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146 | #define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET |
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147 | |
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148 | #define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET |
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149 | |
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150 | #define CPM_INTERRUPT |
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151 | |
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152 | /*-------------------------------------------------------------------------+ |
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153 | | Function Prototypes. |
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154 | +--------------------------------------------------------------------------*/ |
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155 | /* |
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156 | * ------------------------ PPC CPM Mngt Routines ------- |
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157 | */ |
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158 | |
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159 | /* |
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160 | * function to disable a particular irq. After calling |
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161 | * this function, even if the device asserts the interrupt line it will |
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162 | * not be propagated further to the processor |
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163 | */ |
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164 | int BSP_irq_disable_at_cpm (const rtems_irq_number irqLine); |
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165 | /* |
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166 | * function to enable a particular irq. After calling |
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167 | * this function, if the device asserts the interrupt line it will |
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168 | * be propagated further to the processor |
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169 | */ |
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170 | int BSP_irq_enable_at_cpm (const rtems_irq_number irqLine); |
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171 | /* |
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172 | * function to acknoledge a particular irq. After calling |
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173 | * this function, if a device asserts an enabled interrupt line it will |
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174 | * be propagated further to the processor. Mainly usefull for people |
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175 | * writting raw handlers as this is automagically done for rtems managed |
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176 | * handlers. |
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177 | */ |
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178 | int BSP_irq_ack_at_cpm (const rtems_irq_number irqLine); |
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179 | /* |
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180 | * function to check if a particular irq is enabled. After calling |
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181 | */ |
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182 | int BSP_irq_enabled_at_cpm (const rtems_irq_number irqLine); |
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183 | |
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184 | extern void BSP_rtems_irq_mng_init(unsigned cpuId); |
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185 | |
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186 | #ifdef __cplusplus |
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187 | } |
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188 | #endif |
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189 | |
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190 | /* Now that we have defined some basics, include the generic support */ |
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191 | #include <bsp/irq-generic.h> |
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192 | |
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193 | #endif |
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194 | |
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195 | #endif |
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